maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[RISCV] Modify a test line so it exercises the intended configuration once we turn on scalable vectorization

This commit is contained in:
Philip Reames 2022-06-24 08:45:53 -07:00 committed by Philip Reames
parent b064bc18c3
commit adbe718675
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
llvm/test/Transforms/LoopVectorize/RISCV/unroll-in-loop-vectorizer.ll
View File

@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -mtriple=riscv64 -mattr=+v -loop-vectorize < %s | FileCheck %s
; RUN: opt -S -mtriple=riscv64 -mattr=+v -loop-vectorize -scalable-vectorization=off -riscv-v-vector-bits-min=0 < %s | FileCheck %s
; Make sure we don't unroll scalar loops in the loop vectorizer.
;