forked from OSchip/llvm-project
[LoopInterchange] Add some optimization remarks.
Reviewers: anemet, karthikthecool, blitz.opensource Reviewed By: anemet Subscribers: mzolotukhin, llvm-commits Differential Revision: https://reviews.llvm.org/D35122 llvm-svn: 308094
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@ -22,6 +22,7 @@
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#include "llvm/Analysis/LoopInfo.h"
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#include "llvm/Analysis/LoopIterator.h"
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#include "llvm/Analysis/LoopPass.h"
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#include "llvm/Analysis/OptimizationDiagnosticInfo.h"
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#include "llvm/Analysis/ScalarEvolution.h"
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#include "llvm/Analysis/ScalarEvolutionExpander.h"
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#include "llvm/Analysis/ScalarEvolutionExpressions.h"
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@ -323,9 +324,10 @@ static PHINode *getInductionVariable(Loop *L, ScalarEvolution *SE) {
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class LoopInterchangeLegality {
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public:
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LoopInterchangeLegality(Loop *Outer, Loop *Inner, ScalarEvolution *SE,
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LoopInfo *LI, DominatorTree *DT, bool PreserveLCSSA)
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LoopInfo *LI, DominatorTree *DT, bool PreserveLCSSA,
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OptimizationRemarkEmitter *ORE)
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: OuterLoop(Outer), InnerLoop(Inner), SE(SE), LI(LI), DT(DT),
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PreserveLCSSA(PreserveLCSSA), InnerLoopHasReduction(false) {}
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PreserveLCSSA(PreserveLCSSA), ORE(ORE), InnerLoopHasReduction(false) {}
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/// Check if the loops can be interchanged.
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bool canInterchangeLoops(unsigned InnerLoopId, unsigned OuterLoopId,
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@ -353,6 +355,8 @@ private:
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LoopInfo *LI;
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DominatorTree *DT;
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bool PreserveLCSSA;
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/// Interface to emit optimization remarks.
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OptimizationRemarkEmitter *ORE;
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bool InnerLoopHasReduction;
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};
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@ -361,8 +365,9 @@ private:
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/// loop.
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class LoopInterchangeProfitability {
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public:
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LoopInterchangeProfitability(Loop *Outer, Loop *Inner, ScalarEvolution *SE)
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: OuterLoop(Outer), InnerLoop(Inner), SE(SE) {}
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LoopInterchangeProfitability(Loop *Outer, Loop *Inner, ScalarEvolution *SE,
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OptimizationRemarkEmitter *ORE)
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: OuterLoop(Outer), InnerLoop(Inner), SE(SE), ORE(ORE) {}
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/// Check if the loop interchange is profitable.
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bool isProfitable(unsigned InnerLoopId, unsigned OuterLoopId,
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@ -376,6 +381,8 @@ private:
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/// Scev analysis.
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ScalarEvolution *SE;
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/// Interface to emit optimization remarks.
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OptimizationRemarkEmitter *ORE;
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};
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/// LoopInterchangeTransform interchanges the loop.
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@ -422,6 +429,9 @@ struct LoopInterchange : public FunctionPass {
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DependenceInfo *DI;
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DominatorTree *DT;
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bool PreserveLCSSA;
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/// Interface to emit optimization remarks.
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OptimizationRemarkEmitter *ORE;
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LoopInterchange()
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: FunctionPass(ID), SE(nullptr), LI(nullptr), DI(nullptr), DT(nullptr) {
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initializeLoopInterchangePass(*PassRegistry::getPassRegistry());
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@ -435,6 +445,7 @@ struct LoopInterchange : public FunctionPass {
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AU.addRequired<DependenceAnalysisWrapperPass>();
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AU.addRequiredID(LoopSimplifyID);
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AU.addRequiredID(LCSSAID);
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AU.addRequired<OptimizationRemarkEmitterWrapperPass>();
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}
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bool runOnFunction(Function &F) override {
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@ -446,6 +457,7 @@ struct LoopInterchange : public FunctionPass {
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DI = &getAnalysis<DependenceAnalysisWrapperPass>().getDI();
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auto *DTWP = getAnalysisIfAvailable<DominatorTreeWrapperPass>();
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DT = DTWP ? &DTWP->getDomTree() : nullptr;
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ORE = &getAnalysis<OptimizationRemarkEmitterWrapperPass>().getORE();
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PreserveLCSSA = mustPreserveAnalysisID(LCSSAID);
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// Build up a worklist of loop pairs to analyze.
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@ -575,18 +587,23 @@ struct LoopInterchange : public FunctionPass {
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Loop *OuterLoop = LoopList[OuterLoopId];
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LoopInterchangeLegality LIL(OuterLoop, InnerLoop, SE, LI, DT,
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PreserveLCSSA);
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PreserveLCSSA, ORE);
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if (!LIL.canInterchangeLoops(InnerLoopId, OuterLoopId, DependencyMatrix)) {
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DEBUG(dbgs() << "Not interchanging Loops. Cannot prove legality\n");
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return false;
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}
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DEBUG(dbgs() << "Loops are legal to interchange\n");
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LoopInterchangeProfitability LIP(OuterLoop, InnerLoop, SE);
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LoopInterchangeProfitability LIP(OuterLoop, InnerLoop, SE, ORE);
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if (!LIP.isProfitable(InnerLoopId, OuterLoopId, DependencyMatrix)) {
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DEBUG(dbgs() << "Interchanging loops not profitable\n");
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return false;
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}
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ORE->emit(OptimizationRemark(DEBUG_TYPE, "Interchanged",
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InnerLoop->getStartLoc(),
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InnerLoop->getHeader())
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<< "Loop interchanged with enclosing loop.");
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LoopInterchangeTransform LIT(OuterLoop, InnerLoop, SE, LI, DT,
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LoopNestExit, LIL.hasInnerLoopReduction());
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LIT.transform();
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@ -760,6 +777,12 @@ bool LoopInterchangeLegality::currentLimitations() {
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if (!findInductionAndReductions(InnerLoop, Inductions, Reductions)) {
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DEBUG(dbgs() << "Only inner loops with induction or reduction PHI nodes "
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<< "are supported currently.\n");
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ORE->emit(OptimizationRemarkMissed(DEBUG_TYPE,
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"UnsupportedPHIInner",
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InnerLoop->getStartLoc(),
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InnerLoop->getHeader())
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<< "Only inner loops with induction or reduction PHI nodes can be"
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" interchange currently.");
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return true;
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}
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@ -767,6 +790,12 @@ bool LoopInterchangeLegality::currentLimitations() {
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if (Inductions.size() != 1) {
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DEBUG(dbgs() << "We currently only support loops with 1 induction variable."
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<< "Failed to interchange due to current limitation\n");
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ORE->emit(OptimizationRemarkMissed(DEBUG_TYPE,
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"MultiInductionInner",
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InnerLoop->getStartLoc(),
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InnerLoop->getHeader())
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<< "Only inner loops with 1 induction variable can be "
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"interchanged currently.");
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return true;
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}
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if (Reductions.size() > 0)
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@ -777,6 +806,12 @@ bool LoopInterchangeLegality::currentLimitations() {
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if (!findInductionAndReductions(OuterLoop, Inductions, Reductions)) {
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DEBUG(dbgs() << "Only outer loops with induction or reduction PHI nodes "
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<< "are supported currently.\n");
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ORE->emit(OptimizationRemarkMissed(DEBUG_TYPE,
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"UnsupportedPHIOuter",
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OuterLoop->getStartLoc(),
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OuterLoop->getHeader())
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<< "Only outer loops with induction or reduction PHI nodes can be"
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" interchanged currently.");
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return true;
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}
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@ -785,18 +820,35 @@ bool LoopInterchangeLegality::currentLimitations() {
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if (!Reductions.empty()) {
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DEBUG(dbgs() << "Outer loops with reductions are not supported "
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<< "currently.\n");
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ORE->emit(OptimizationRemarkMissed(DEBUG_TYPE,
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"ReductionsOuter",
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OuterLoop->getStartLoc(),
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OuterLoop->getHeader())
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<< "Outer loops with reductions cannot be interchangeed "
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"currently.");
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return true;
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}
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// TODO: Currently we handle only loops with 1 induction variable.
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if (Inductions.size() != 1) {
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DEBUG(dbgs() << "Loops with more than 1 induction variables are not "
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<< "supported currently.\n");
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ORE->emit(OptimizationRemarkMissed(DEBUG_TYPE,
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"MultiIndutionOuter",
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OuterLoop->getStartLoc(),
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OuterLoop->getHeader())
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<< "Only outer loops with 1 induction variable can be "
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"interchanged currently.");
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return true;
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}
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// TODO: Triangular loops are not handled for now.
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if (!isLoopStructureUnderstood(InnerInductionVar)) {
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DEBUG(dbgs() << "Loop structure not understood by pass\n");
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ORE->emit(OptimizationRemarkMissed(DEBUG_TYPE,
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"UnsupportedStructureInner",
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InnerLoop->getStartLoc(),
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InnerLoop->getHeader())
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<< "Inner loop structure not understood currently.");
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return true;
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}
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@ -805,12 +857,24 @@ bool LoopInterchangeLegality::currentLimitations() {
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getLoopLatchExitBlock(OuterLoopLatch, OuterLoopHeader);
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if (!LoopExitBlock || !containsSafePHI(LoopExitBlock, true)) {
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DEBUG(dbgs() << "Can only handle LCSSA PHIs in outer loops currently.\n");
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ORE->emit(OptimizationRemarkMissed(DEBUG_TYPE,
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"NoLCSSAPHIOuter",
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OuterLoop->getStartLoc(),
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OuterLoop->getHeader())
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<< "Only outer loops with LCSSA PHIs can be interchange "
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"currently.");
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return true;
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}
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LoopExitBlock = getLoopLatchExitBlock(InnerLoopLatch, InnerLoopHeader);
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if (!LoopExitBlock || !containsSafePHI(LoopExitBlock, false)) {
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DEBUG(dbgs() << "Can only handle LCSSA PHIs in inner loops currently.\n");
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ORE->emit(OptimizationRemarkMissed(DEBUG_TYPE,
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"NoLCSSAPHIOuterInner",
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InnerLoop->getStartLoc(),
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InnerLoop->getHeader())
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<< "Only inner loops with LCSSA PHIs can be interchange "
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"currently.");
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return true;
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}
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@ -835,6 +899,11 @@ bool LoopInterchangeLegality::currentLimitations() {
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if (!InnerIndexVarInc) {
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DEBUG(dbgs() << "Did not find an instruction to increment the induction "
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<< "variable.\n");
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ORE->emit(OptimizationRemarkMissed(DEBUG_TYPE,
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"NoIncrementInInner",
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InnerLoop->getStartLoc(),
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InnerLoop->getHeader())
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<< "The inner loop does not increment the induction variable.");
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return true;
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}
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@ -852,6 +921,12 @@ bool LoopInterchangeLegality::currentLimitations() {
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if (!I.isIdenticalTo(InnerIndexVarInc)) {
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DEBUG(dbgs() << "Found unsupported instructions between induction "
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<< "variable increment and branch.\n");
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ORE->emit(OptimizationRemarkMissed(DEBUG_TYPE,
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"UnsupportedInsBetweenInduction",
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InnerLoop->getStartLoc(),
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InnerLoop->getHeader())
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<< "Found unsupported instruction between induction variable "
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"increment and branch.");
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return true;
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}
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@ -862,6 +937,11 @@ bool LoopInterchangeLegality::currentLimitations() {
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// current limitation.
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if (!FoundInduction) {
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DEBUG(dbgs() << "Did not find the induction variable.\n");
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ORE->emit(OptimizationRemarkMissed(DEBUG_TYPE,
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"NoIndutionVariable",
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InnerLoop->getStartLoc(),
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InnerLoop->getHeader())
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<< "Did not find the induction variable.");
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return true;
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}
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return false;
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@ -875,6 +955,11 @@ bool LoopInterchangeLegality::canInterchangeLoops(unsigned InnerLoopId,
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DEBUG(dbgs() << "Failed interchange InnerLoopId = " << InnerLoopId
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<< " and OuterLoopId = " << OuterLoopId
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<< " due to dependence\n");
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ORE->emit(OptimizationRemarkMissed(DEBUG_TYPE,
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"Dependence",
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InnerLoop->getStartLoc(),
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InnerLoop->getHeader())
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<< "Cannot interchange loops due to dependences.");
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return false;
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}
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@ -910,6 +995,12 @@ bool LoopInterchangeLegality::canInterchangeLoops(unsigned InnerLoopId,
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// Check if the loops are tightly nested.
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if (!tightlyNested(OuterLoop, InnerLoop)) {
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DEBUG(dbgs() << "Loops not tightly nested\n");
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ORE->emit(OptimizationRemarkMissed(DEBUG_TYPE,
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"NotTightlyNested",
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InnerLoop->getStartLoc(),
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InnerLoop->getHeader())
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<< "Cannot interchange loops because they are not tightly "
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"nested.");
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return false;
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}
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@ -1005,9 +1096,18 @@ bool LoopInterchangeProfitability::isProfitable(unsigned InnerLoopId,
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// It is not profitable as per current cache profitability model. But check if
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// we can move this loop outside to improve parallelism.
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bool ImprovesPar =
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isProfitableForVectorization(InnerLoopId, OuterLoopId, DepMatrix);
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return ImprovesPar;
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if (isProfitableForVectorization(InnerLoopId, OuterLoopId, DepMatrix))
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return true;
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ORE->emit(OptimizationRemarkMissed(DEBUG_TYPE,
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"InterchangeNotProfitable",
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InnerLoop->getStartLoc(),
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InnerLoop->getHeader())
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<< "Interchanging loops is too costly (cost="
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<< ore::NV("Cost", Cost) << ", threshold="
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<< ore::NV("Threshold", LoopInterchangeCostThreshold) <<
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") and it does not improve parallelism.");
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return false;
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}
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void LoopInterchangeTransform::removeChildLoop(Loop *OuterLoop,
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@ -1291,6 +1391,7 @@ INITIALIZE_PASS_DEPENDENCY(ScalarEvolutionWrapperPass)
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INITIALIZE_PASS_DEPENDENCY(LoopSimplify)
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INITIALIZE_PASS_DEPENDENCY(LCSSAWrapperPass)
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INITIALIZE_PASS_DEPENDENCY(LoopInfoWrapperPass)
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INITIALIZE_PASS_DEPENDENCY(OptimizationRemarkEmitterWrapperPass)
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INITIALIZE_PASS_END(LoopInterchange, "loop-interchange",
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"Interchanges loops for cache reuse", false, false)
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@ -0,0 +1,220 @@
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; Test optimization remarks generated by the LoopInterchange pass.
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;
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; RUN: opt < %s -basicaa -loop-interchange -pass-remarks-output=%t -pass-remarks-missed='loop-interchange' \
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; RUN: -pass-remarks='loop-interchange' -S
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; RUN: cat %t | FileCheck %s
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@A = common global [100 x [100 x i32]] zeroinitializer
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@B = common global [100 x [100 x i32]] zeroinitializer
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@C = common global [100 x i32] zeroinitializer
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;;---------------------------------------Test case 01---------------------------------
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;; Loops interchange is not profitable.
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;; for(int i=1;i<N;i++)
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;; for(int j=1;j<N;j++)
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;; A[i-1][j-1] = A[i - 1][j-1] + B[i][j];
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define void @test01(i32 %N){
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entry:
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%cmp31 = icmp sgt i32 %N, 1
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br i1 %cmp31, label %for.cond1.preheader.lr.ph, label %for.end19
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for.cond1.preheader.lr.ph:
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%0 = add i32 %N, -1
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br label %for.body3.lr.ph
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for.body3.lr.ph:
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%indvars.iv34 = phi i64 [ 1, %for.cond1.preheader.lr.ph ], [ %indvars.iv.next35, %for.inc17 ]
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%1 = add nsw i64 %indvars.iv34, -1
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br label %for.body3
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for.body3:
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%indvars.iv = phi i64 [ 1, %for.body3.lr.ph ], [ %indvars.iv.next, %for.body3 ]
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%2 = add nsw i64 %indvars.iv, -1
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%arrayidx6 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %1, i64 %2
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%3 = load i32, i32* %arrayidx6
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%arrayidx10 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @B, i64 0, i64 %indvars.iv34, i64 %indvars.iv
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%4 = load i32, i32* %arrayidx10
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%add = add nsw i32 %4, %3
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store i32 %add, i32* %arrayidx6
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv to i32
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%exitcond = icmp eq i32 %lftr.wideiv, %0
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br i1 %exitcond, label %for.inc17, label %for.body3
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for.inc17:
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%indvars.iv.next35 = add nuw nsw i64 %indvars.iv34, 1
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%lftr.wideiv37 = trunc i64 %indvars.iv34 to i32
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%exitcond38 = icmp eq i32 %lftr.wideiv37, %0
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br i1 %exitcond38, label %for.end19, label %for.body3.lr.ph
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for.end19:
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ret void
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}
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; CHECK: --- !Missed
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; CHECK-NEXT: Pass: loop-interchange
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; CHECK-NEXT: Name: InterchangeNotProfitable
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; CHECK-NEXT: Function: test01
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; CHECK-NEXT: Args:
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; CHECK-NEXT: - String: 'Interchanging loops is too costly (cost='
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; CHECK-NEXT: - Cost: '2'
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; CHECK-NEXT: - String: ', threshold='
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; CHECK-NEXT: - Threshold: '0'
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; CHECK-NEXT: - String: ') and it does not improve parallelism.'
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; CHECK-NEXT: ...
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;;--------------------------------------Test case 02------------------------------------
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;; [FIXME] This loop though valid is currently not interchanged due to the
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;; limitation that we cannot split the inner loop latch due to multiple use of inner induction
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;; variable.(used to increment the loop counter and to access A[j+1][i+1]
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;; for(int i=0;i<N-1;i++)
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;; for(int j=1;j<N-1;j++)
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;; A[j+1][i+1] = A[j+1][i+1] + k;
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define void @test02(i32 %k, i32 %N) {
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entry:
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%sub = add nsw i32 %N, -1
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%cmp26 = icmp sgt i32 %N, 1
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br i1 %cmp26, label %for.cond1.preheader.lr.ph, label %for.end17
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for.cond1.preheader.lr.ph:
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%cmp324 = icmp sgt i32 %sub, 1
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%0 = add i32 %N, -2
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%1 = sext i32 %sub to i64
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br label %for.cond1.preheader
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for.cond.loopexit:
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%cmp = icmp slt i64 %indvars.iv.next29, %1
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br i1 %cmp, label %for.cond1.preheader, label %for.end17
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for.cond1.preheader:
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%indvars.iv28 = phi i64 [ 0, %for.cond1.preheader.lr.ph ], [ %indvars.iv.next29, %for.cond.loopexit ]
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%indvars.iv.next29 = add nuw nsw i64 %indvars.iv28, 1
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br i1 %cmp324, label %for.body4, label %for.cond.loopexit
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for.body4:
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body4 ], [ 1, %for.cond1.preheader ]
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%arrayidx7 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %indvars.iv.next, i64 %indvars.iv.next29
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%2 = load i32, i32* %arrayidx7
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%add8 = add nsw i32 %2, %k
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store i32 %add8, i32* %arrayidx7
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%lftr.wideiv = trunc i64 %indvars.iv to i32
|
||||
%exitcond = icmp eq i32 %lftr.wideiv, %0
|
||||
br i1 %exitcond, label %for.cond.loopexit, label %for.body4
|
||||
|
||||
for.end17:
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK: --- !Missed
|
||||
; CHECK-NEXT: Pass: loop-interchange
|
||||
; CHECK-NEXT: Name: UnsupportedInsBetweenInduction
|
||||
; CHECK-NEXT: Function: test02
|
||||
; CHECK-NEXT: Args:
|
||||
; CHECK-NEXT: - String: Found unsupported instruction between induction variable increment and branch.
|
||||
; CHECK-NEXT: ...
|
||||
|
||||
;;-----------------------------------Test case 03-------------------------------
|
||||
;; Test to make sure we can handle output dependencies.
|
||||
;;
|
||||
;; for (int i = 0; i < 2; ++i)
|
||||
;; for(int j = 0; j < 3; ++j) {
|
||||
;; A[j][i] = i;
|
||||
;; A[j][i+1] = j;
|
||||
;; }
|
||||
|
||||
@A10 = local_unnamed_addr global [3 x [3 x i32]] zeroinitializer, align 16
|
||||
|
||||
define void @test03() {
|
||||
entry:
|
||||
br label %for.cond1.preheader
|
||||
|
||||
for.cond.loopexit: ; preds = %for.body4
|
||||
%exitcond28 = icmp ne i64 %indvars.iv.next27, 2
|
||||
br i1 %exitcond28, label %for.cond1.preheader, label %for.cond.cleanup
|
||||
|
||||
for.cond1.preheader: ; preds = %for.cond.loopexit, %entry
|
||||
%indvars.iv26 = phi i64 [ 0, %entry ], [ %indvars.iv.next27, %for.cond.loopexit ]
|
||||
%indvars.iv.next27 = add nuw nsw i64 %indvars.iv26, 1
|
||||
br label %for.body4
|
||||
|
||||
for.cond.cleanup: ; preds = %for.cond.loopexit
|
||||
ret void
|
||||
|
||||
for.body4: ; preds = %for.body4, %for.cond1.preheader
|
||||
%indvars.iv = phi i64 [ 0, %for.cond1.preheader ], [ %indvars.iv.next, %for.body4 ]
|
||||
%arrayidx6 = getelementptr inbounds [3 x [3 x i32]], [3 x [3 x i32]]* @A10, i64 0, i64 %indvars.iv, i64 %indvars.iv26
|
||||
%tmp = trunc i64 %indvars.iv26 to i32
|
||||
store i32 %tmp, i32* %arrayidx6, align 4
|
||||
%arrayidx10 = getelementptr inbounds [3 x [3 x i32]], [3 x [3 x i32]]* @A10, i64 0, i64 %indvars.iv, i64 %indvars.iv.next27
|
||||
%tmp1 = trunc i64 %indvars.iv to i32
|
||||
store i32 %tmp1, i32* %arrayidx10, align 4
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%exitcond = icmp ne i64 %indvars.iv.next, 3
|
||||
br i1 %exitcond, label %for.body4, label %for.cond.loopexit
|
||||
}
|
||||
|
||||
; CHECK: --- !Passed
|
||||
; CHECK-NEXT: Pass: loop-interchange
|
||||
; CHECK-NEXT: Name: Interchanged
|
||||
; CHECK-NEXT: Function: test03
|
||||
; CHECK-NEXT: Args:
|
||||
; CHECK-NEXT: - String: Loop interchanged with enclosing loop.
|
||||
; CHECK-NEXT: ...
|
||||
|
||||
;;--------------------------------------Test case 04-------------------------------------
|
||||
;; Loops not tightly nested are not interchanged
|
||||
;; for(int j=0;j<N;j++) {
|
||||
;; B[j] = j+k;
|
||||
;; for(int i=0;i<N;i++)
|
||||
;; A[j][i] = A[j][i]+B[j];
|
||||
;; }
|
||||
|
||||
define void @test04(i32 %k, i32 %N){
|
||||
entry:
|
||||
%cmp30 = icmp sgt i32 %N, 0
|
||||
br i1 %cmp30, label %for.body.lr.ph, label %for.end17
|
||||
|
||||
for.body.lr.ph:
|
||||
%0 = add i32 %N, -1
|
||||
%1 = zext i32 %k to i64
|
||||
br label %for.body
|
||||
|
||||
for.body:
|
||||
%indvars.iv32 = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next33, %for.inc15 ]
|
||||
%2 = add nsw i64 %indvars.iv32, %1
|
||||
%arrayidx = getelementptr inbounds [100 x i32], [100 x i32]* @C, i64 0, i64 %indvars.iv32
|
||||
%3 = trunc i64 %2 to i32
|
||||
store i32 %3, i32* %arrayidx
|
||||
br label %for.body3
|
||||
|
||||
for.body3:
|
||||
%indvars.iv = phi i64 [ 0, %for.body ], [ %indvars.iv.next, %for.body3 ]
|
||||
%arrayidx7 = getelementptr inbounds [100 x [100 x i32]], [100 x [100 x i32]]* @A, i64 0, i64 %indvars.iv32, i64 %indvars.iv
|
||||
%4 = load i32, i32* %arrayidx7
|
||||
%add10 = add nsw i32 %3, %4
|
||||
store i32 %add10, i32* %arrayidx7
|
||||
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
|
||||
%lftr.wideiv = trunc i64 %indvars.iv to i32
|
||||
%exitcond = icmp eq i32 %lftr.wideiv, %0
|
||||
br i1 %exitcond, label %for.inc15, label %for.body3
|
||||
|
||||
for.inc15:
|
||||
%indvars.iv.next33 = add nuw nsw i64 %indvars.iv32, 1
|
||||
%lftr.wideiv35 = trunc i64 %indvars.iv32 to i32
|
||||
%exitcond36 = icmp eq i32 %lftr.wideiv35, %0
|
||||
br i1 %exitcond36, label %for.end17, label %for.body
|
||||
|
||||
for.end17:
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK: --- !Missed
|
||||
; CHECK-NEXT: Pass: loop-interchange
|
||||
; CHECK-NEXT: Name: NotTightlyNested
|
||||
; CHECK-NEXT: Function: test04
|
||||
; CHECK-NEXT: Args:
|
||||
; CHECK-NEXT: - String: Cannot interchange loops because they are not tightly nested.
|
||||
; CHECK-NEXT: ...
|
Loading…
Reference in New Issue