maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[X86] Remove some dead code from LowerVSETCC. NFC 

This code was added in r321967, but ultimately I fixed the issue in the legalizer and this code was no longer required.

llvm-svn: 323500
This commit is contained in:
Craig Topper 2018-01-26 07:15:16 +00:00
parent 25a37a894e
commit ad8ce0b800
1 changed files with 0 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
llvm/lib/Target/X86/X86ISelLowering.cpp
View File

@ -17851,19 +17851,6 @@ static SDValue LowerVSETCC(SDValue Op, const X86Subtarget &Subtarget,
assert(EltVT == MVT::f32 || EltVT == MVT::f64);
#endif
// Custom widen MVT::v2f32 to prevent the default widening
// from getting a result type of v4i32, extracting it to v2i32 and then
// trying to sign extend that to v2i1.
if (VT == MVT::v2i1 && Op1.getValueType() == MVT::v2f32) {
Op0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v4f32, Op0,
DAG.getUNDEF(MVT::v2f32));
Op1 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v4f32, Op1,
DAG.getUNDEF(MVT::v2f32));
SDValue NewOp = DAG.getNode(ISD::SETCC, dl, MVT::v4i1, Op0, Op1, CC);
return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v2i1, NewOp,
DAG.getIntPtrConstant(0, dl));
}
unsigned Opc;
if (Subtarget.hasAVX512() && VT.getVectorElementType() == MVT::i1) {
assert(VT.getVectorNumElements() <= 16);