forked from OSchip/llvm-project
Revert "[Verifier] Speed up and parallelize dominance checking. NFC"
This reverts commit 08664d005c
, which according to
https://reviews.llvm.org/D103373 was pushed accidentally, and I believe it
causes timeouts in some internal mlir tests.
This commit is contained in:
parent
99653702fd
commit
ad6a84f82c
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@ -35,7 +35,7 @@ class DominanceInfoBase {
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using DomTree = llvm::DominatorTreeBase<Block, IsPostDom>;
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using DomTree = llvm::DominatorTreeBase<Block, IsPostDom>;
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public:
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public:
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DominanceInfoBase(Operation *op = nullptr) {}
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DominanceInfoBase(Operation *op) {}
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DominanceInfoBase(DominanceInfoBase &&) = default;
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DominanceInfoBase(DominanceInfoBase &&) = default;
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DominanceInfoBase &operator=(DominanceInfoBase &&) = default;
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DominanceInfoBase &operator=(DominanceInfoBase &&) = default;
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~DominanceInfoBase();
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~DominanceInfoBase();
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@ -31,8 +31,9 @@
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#include "mlir/IR/Operation.h"
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#include "mlir/IR/Operation.h"
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#include "mlir/IR/RegionKindInterface.h"
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#include "mlir/IR/RegionKindInterface.h"
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#include "llvm/ADT/StringMap.h"
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#include "llvm/ADT/StringMap.h"
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#include "llvm/Support/Parallel.h"
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#include "llvm/Support/FormatVariadic.h"
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#include "llvm/Support/PrettyStackTrace.h"
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#include "llvm/Support/PrettyStackTrace.h"
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#include "llvm/Support/Regex.h"
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#include <atomic>
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#include <atomic>
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@ -42,8 +43,7 @@ namespace {
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/// This class encapsulates all the state used to verify an operation region.
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/// This class encapsulates all the state used to verify an operation region.
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class OperationVerifier {
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class OperationVerifier {
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public:
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public:
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explicit OperationVerifier(MLIRContext *context)
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explicit OperationVerifier() {}
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: parallelismEnabled(context->isMultithreadingEnabled()) {}
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/// Verify the given operation.
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/// Verify the given operation.
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LogicalResult verifyOpAndDominance(Operation &op);
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LogicalResult verifyOpAndDominance(Operation &op);
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@ -56,8 +56,7 @@ private:
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/// Verify the dominance property of regions contained within the given
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/// Verify the dominance property of regions contained within the given
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/// Operation.
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/// Operation.
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LogicalResult verifyDominanceOfContainedRegions(Operation &op,
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LogicalResult verifyDominanceOfContainedRegions(Operation &op);
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DominanceInfo &domInfo);
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/// Emit an error for the given block.
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/// Emit an error for the given block.
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InFlightDiagnostic emitError(Block &bb, const Twine &message) {
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InFlightDiagnostic emitError(Block &bb, const Twine &message) {
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@ -69,8 +68,8 @@ private:
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return mlir::emitError(bb.getParent()->getLoc(), message);
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return mlir::emitError(bb.getParent()->getLoc(), message);
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}
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}
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/// This is true if parallelism is enabled on the MLIRContext.
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/// Dominance information for this operation, when checking dominance.
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const bool parallelismEnabled;
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DominanceInfo *domInfo = nullptr;
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};
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};
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} // end anonymous namespace
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} // end anonymous namespace
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@ -84,11 +83,12 @@ LogicalResult OperationVerifier::verifyOpAndDominance(Operation &op) {
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// check for any nested regions. We do this as a second pass since malformed
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// check for any nested regions. We do this as a second pass since malformed
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// CFG's can cause dominator analysis constructure to crash and we want the
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// CFG's can cause dominator analysis constructure to crash and we want the
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// verifier to be resilient to malformed code.
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// verifier to be resilient to malformed code.
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if (op.getNumRegions() != 0) {
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DominanceInfo theDomInfo(&op);
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DominanceInfo domInfo;
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domInfo = &theDomInfo;
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if (failed(verifyDominanceOfContainedRegions(op, /*domInfo*/ domInfo)))
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if (failed(verifyDominanceOfContainedRegions(op)))
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return failure();
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return failure();
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}
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domInfo = nullptr;
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return success();
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return success();
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}
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}
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@ -301,83 +301,34 @@ static void diagnoseInvalidOperandDominance(Operation &op, unsigned operandNo) {
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note << " neither in a parent nor in a child region)";
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note << " neither in a parent nor in a child region)";
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}
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}
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/// Verify the dominance of each of the nested blocks within the given
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/// Verify the dominance of each of the nested blocks within the given operation
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/// operation. domInfo may be present or absent (null), depending on whether
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/// the caller computed it for a higher level.
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LogicalResult
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LogicalResult
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OperationVerifier::verifyDominanceOfContainedRegions(Operation &opWithRegions,
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OperationVerifier::verifyDominanceOfContainedRegions(Operation &op) {
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DominanceInfo &domInfo) {
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for (Region ®ion : op.getRegions()) {
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// This vector keeps track of ops that have regions which should be checked
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// Verify the dominance of each of the held operations.
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// in parallel.
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SmallVector<Operation *> opsWithRegionsToCheckInParallel;
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// Get information about the requirements on the regions in this op.
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for (Region ®ion : opWithRegions.getRegions()) {
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for (Block &block : region) {
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for (Block &block : region) {
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// Dominance is only meaningful inside reachable blocks.
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// Dominance is only meaningful inside reachable blocks.
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bool isReachable = domInfo.isReachableFromEntry(&block);
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bool isReachable = domInfo->isReachableFromEntry(&block);
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// Check each operation in this block, and any operations in regions
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// that these operations contain.
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opsWithRegionsToCheckInParallel.clear();
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for (Operation &op : block) {
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for (Operation &op : block) {
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if (isReachable) {
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if (isReachable) {
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// Check that operands properly dominate this use.
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// Check that operands properly dominate this use.
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for (auto &operand : op.getOpOperands()) {
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for (unsigned operandNo = 0, e = op.getNumOperands(); operandNo != e;
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// If the operand doesn't dominate the user, then emit an error.
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++operandNo) {
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if (!domInfo.properlyDominates(operand.get(), &op)) {
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if (domInfo->properlyDominates(op.getOperand(operandNo), &op))
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diagnoseInvalidOperandDominance(op, operand.getOperandNumber());
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continue;
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return failure();
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}
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diagnoseInvalidOperandDominance(op, operandNo);
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return failure();
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}
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}
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}
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}
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// If this operation has any regions, we need to recursively verify
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// Recursively verify dominance within each operation in the
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// dominance of the ops within it.
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// block, even if the block itself is not reachable, or we are in
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if (op.getNumRegions() == 0)
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// a region which doesn't respect dominance.
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continue;
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if (op.getNumRegions() != 0)
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if (failed(verifyDominanceOfContainedRegions(op)))
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// If this is a non-isolated region (e.g. an affine for loop), pass down
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// the current dominator information.
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if (!op.hasTrait<OpTrait::IsIsolatedFromAbove>()) {
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if (failed(verifyDominanceOfContainedRegions(op, domInfo)))
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return failure();
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return failure();
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} else if (parallelismEnabled) {
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// If this is an IsolatedFromAbove op and parallelism is enabled, then
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// enqueue this for processing later.
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opsWithRegionsToCheckInParallel.push_back(&op);
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} else {
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// If not, just verify inline with a local dom scope.
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DominanceInfo localDomInfo;
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if (failed(verifyDominanceOfContainedRegions(op, localDomInfo)))
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return failure();
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}
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}
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// If we have multiple parallelizable subregions, check them in parallel.
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if (opsWithRegionsToCheckInParallel.size() == 1) {
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// Each isolated operation gets its own dom info.
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Operation *op = opsWithRegionsToCheckInParallel[0];
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DominanceInfo localDomInfo;
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if (failed(verifyDominanceOfContainedRegions(*op, localDomInfo)))
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return failure();
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} else if (!opsWithRegionsToCheckInParallel.empty()) {
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ParallelDiagnosticHandler handler(opWithRegions.getContext());
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std::atomic<bool> passFailed(false);
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llvm::parallelForEachN(
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0, opsWithRegionsToCheckInParallel.size(), [&](size_t opIdx) {
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handler.setOrderIDForThread(opIdx);
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Operation *op = opsWithRegionsToCheckInParallel[opIdx];
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// Each isolated operation gets its own dom info.
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DominanceInfo localDomInfo;
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if (failed(verifyDominanceOfContainedRegions(*op, localDomInfo)))
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passFailed = true;
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handler.eraseOrderIDForThread();
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});
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if (passFailed)
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return failure();
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}
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}
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}
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}
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}
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}
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@ -389,8 +340,8 @@ OperationVerifier::verifyDominanceOfContainedRegions(Operation &opWithRegions,
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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/// Perform (potentially expensive) checks of invariants, used to detect
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/// Perform (potentially expensive) checks of invariants, used to detect
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/// compiler bugs. On error, this reports the error through the MLIRContext
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/// compiler bugs. On error, this reports the error through the MLIRContext and
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/// and returns failure.
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/// returns failure.
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LogicalResult mlir::verify(Operation *op) {
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LogicalResult mlir::verify(Operation *op) {
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return OperationVerifier(op->getContext()).verifyOpAndDominance(*op);
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return OperationVerifier().verifyOpAndDominance(*op);
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}
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}
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