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[X86] Regenerate peep tests checks

This commit is contained in:
Simon Pilgrim 2022-04-04 12:02:23 +01:00
parent a96638e50e
commit ad59bd0be9
2 changed files with 63 additions and 15 deletions
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11
llvm/test/CodeGen/X86/peep-test-2.ll
View File

@ -1,7 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -verify-machineinstrs | FileCheck %s
; CHECK: testl
; It's tempting to eliminate the testl instruction here and just use the
; EFLAGS value from the incl, however it can't be known whether the add
; will overflow, and if it does the incl would set OF, and the
@ -11,6 +10,14 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f3
target triple = "i386-apple-darwin9.6"
define i32 @f(i32 %j) nounwind readnone {
; CHECK-LABEL: f:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: incl %ecx
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: testl %ecx, %ecx
; CHECK-NEXT: setg %al
; CHECK-NEXT: retl
entry:
%0 = add i32 %j, 1 ; <i32> [#uses=1]
%1 = icmp sgt i32 %0, 0 ; <i1> [#uses=1]

67
llvm/test/CodeGen/X86/peep-test-3.ll
View File

@ -1,16 +1,27 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mcpu=generic -mtriple=i686-- -post-RA-scheduler=false | FileCheck %s
; rdar://7226797
; LLVM should omit the testl and use the flags result from the orl.
; CHECK-LABEL: or:
define void @or(float* %A, i32 %IA, i32 %N) nounwind {
; CHECK-LABEL: or:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: andl $3, %edx
; CHECK-NEXT: xorl $1, %ecx
; CHECK-NEXT: orl %edx, %ecx
; CHECK-NEXT: je .LBB0_2
; CHECK-NEXT: # %bb.1: # %bb
; CHECK-NEXT: movl $0, (%eax)
; CHECK-NEXT: .LBB0_2: # %return
; CHECK-NEXT: retl
entry:
%0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
%1 = and i32 %0, 3 ; <i32> [#uses=1]
%2 = xor i32 %IA, 1 ; <i32> [#uses=1]
; CHECK: orl %e
; CHECK-NEXT: je
%3 = or i32 %2, %1 ; <i32> [#uses=1]
%4 = icmp eq i32 %3, 0 ; <i1> [#uses=1]
br i1 %4, label %return, label %bb
@ -22,13 +33,23 @@ bb: ; preds = %entry
return: ; preds = %entry
ret void
}
; CHECK-LABEL: xor:
define void @xor(float* %A, i32 %IA, i32 %N) nounwind {
; CHECK-LABEL: xor:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: andl $3, %ecx
; CHECK-NEXT: xorl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: xorl $1, %ecx
; CHECK-NEXT: je .LBB1_2
; CHECK-NEXT: # %bb.1: # %bb
; CHECK-NEXT: movl $0, (%eax)
; CHECK-NEXT: .LBB1_2: # %return
; CHECK-NEXT: retl
entry:
%0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
%1 = and i32 %0, 3 ; <i32> [#uses=1]
; CHECK: xorl $1, %e
; CHECK-NEXT: je
%2 = xor i32 %IA, 1 ; <i32> [#uses=1]
%3 = xor i32 %2, %1 ; <i32> [#uses=1]
%4 = icmp eq i32 %3, 0 ; <i1> [#uses=1]
@ -41,16 +62,26 @@ bb: ; preds = %entry
return: ; preds = %entry
ret void
}
; CHECK-LABEL: and:
define void @and(float* %A, i32 %IA, i32 %N, i8* %p) nounwind {
; CHECK-LABEL: and:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: xorl $1, %eax
; CHECK-NEXT: andl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: andl $3, %eax
; CHECK-NEXT: movb %al, (%ecx)
; CHECK-NEXT: je .LBB2_2
; CHECK-NEXT: # %bb.1: # %bb
; CHECK-NEXT: movl $0, 0
; CHECK-NEXT: .LBB2_2: # %return
; CHECK-NEXT: retl
entry:
store i8 0, i8* %p
%0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
%1 = and i32 %0, 3 ; <i32> [#uses=1]
%2 = xor i32 %IA, 1 ; <i32> [#uses=1]
; CHECK: andl $3, %
; CHECK-NEXT: movb %
; CHECK-NEXT: je
%3 = and i32 %2, %1 ; <i32> [#uses=1]
%t = trunc i32 %3 to i8
store i8 %t, i8* %p
@ -67,15 +98,25 @@ return: ; preds = %entry
; Just like @and, but without the trunc+store. This should use a testb
; instead of an andl.
; CHECK-LABEL: test:
define void @test(float* %A, i32 %IA, i32 %N, i8* %p) nounwind {
; CHECK-LABEL: test:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movb $0, (%ecx)
; CHECK-NEXT: xorl $1, %eax
; CHECK-NEXT: andl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: testb $3, %al
; CHECK-NEXT: je .LBB3_2
; CHECK-NEXT: # %bb.1: # %bb
; CHECK-NEXT: movl $0, 0
; CHECK-NEXT: .LBB3_2: # %return
; CHECK-NEXT: retl
entry:
store i8 0, i8* %p
%0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
%1 = and i32 %0, 3 ; <i32> [#uses=1]
%2 = xor i32 %IA, 1 ; <i32> [#uses=1]
; CHECK: testb $3, %
; CHECK-NEXT: je
%3 = and i32 %2, %1 ; <i32> [#uses=1]
%4 = icmp eq i32 %3, 0 ; <i1> [#uses=1]
br i1 %4, label %return, label %bb