forked from OSchip/llvm-project
[AMDGPU] Pass to propagate ABI attributes from kernels to the functions
The pass works in two modes: Mode 1: Just set attributes starting from kernels. This can work at the very beginning of opt and llc pipeline, but cannot clone functions because it must be a function pass. Mode 2: Actually clone functions for new attributes. This can only work after all function passes in the opt pipeline because it has to be a module pass. Differential Revision: https://reviews.llvm.org/D63208 llvm-svn: 363586
This commit is contained in:
Stanislav Mekhanoshin
parent
b8e8b1769f
commit
ad04e7ad42
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@ -57,6 +57,8 @@ FunctionPass *createAMDGPUSimplifyLibCallsPass(const TargetOptions &);
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FunctionPass *createAMDGPUUseNativeCallsPass();
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FunctionPass *createAMDGPUCodeGenPreparePass();
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FunctionPass *createAMDGPUMachineCFGStructurizerPass();
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FunctionPass *createAMDGPUPropagateAttributesEarlyPass(const TargetMachine *);
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ModulePass *createAMDGPUPropagateAttributesLatePass(const TargetMachine *);
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FunctionPass *createAMDGPURewriteOutArgumentsPass();
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FunctionPass *createSIModeRegisterPass();
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@ -91,6 +93,12 @@ ModulePass *createAMDGPULowerKernelAttributesPass();
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void initializeAMDGPULowerKernelAttributesPass(PassRegistry &);
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extern char &AMDGPULowerKernelAttributesID;
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void initializeAMDGPUPropagateAttributesEarlyPass(PassRegistry &);
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extern char &AMDGPUPropagateAttributesEarlyID;
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void initializeAMDGPUPropagateAttributesLatePass(PassRegistry &);
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extern char &AMDGPUPropagateAttributesLateID;
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void initializeAMDGPURewriteOutArgumentsPass(PassRegistry &);
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extern char &AMDGPURewriteOutArgumentsID;
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@ -0,0 +1,336 @@
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//===--- AMDGPUPropagateAttributes.cpp --------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// \brief This pass propagates attributes from kernels to the non-entry
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/// functions. Most of the library functions were not compiled for specific ABI,
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/// yet will be correctly compiled if proper attrbutes are propagated from the
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/// caller.
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///
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/// The pass analyzes call graph and propagates ABI target features through the
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/// call graph.
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///
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/// It can run in two modes: as a function or module pass. A function pass
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/// simply propagates attributes. A module pass clones functions if there are
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/// callers with different ABI. If a function is clonned all call sites will
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/// be updated to use a correct clone.
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///
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/// A function pass is limited in functionality but can run early in the
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/// pipeline. A module pass is more powerful but has to run late, so misses
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/// library folding opportunities.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "amdgpu-propagate-attributes"
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#include "AMDGPU.h"
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#include "AMDGPUSubtarget.h"
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#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
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#include "Utils/AMDGPUBaseInfo.h"
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#include "llvm/ADT/SmallSet.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Module.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Transforms/Utils/Cloning.h"
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#include <string>
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using namespace llvm;
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namespace llvm {
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extern const SubtargetFeatureKV AMDGPUFeatureKV[AMDGPU::NumSubtargetFeatures-1];
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}
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namespace {
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class AMDGPUPropagateAttributes {
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const FeatureBitset TargetFeatures = {
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AMDGPU::FeatureWavefrontSize16,
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AMDGPU::FeatureWavefrontSize32,
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AMDGPU::FeatureWavefrontSize64
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};
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class Clone{
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public:
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Clone(FeatureBitset FeatureMask, Function *OrigF, Function *NewF) :
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FeatureMask(FeatureMask), OrigF(OrigF), NewF(NewF) {}
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FeatureBitset FeatureMask;
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Function *OrigF;
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Function *NewF;
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};
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const TargetMachine *TM;
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// Clone functions as needed or just set attributes.
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bool AllowClone;
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// Option propagation roots.
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SmallSet<Function *, 32> Roots;
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// Clones of functions with their attributes.
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SmallVector<Clone, 32> Clones;
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// Find a clone with required features.
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Function *findFunction(const FeatureBitset &FeaturesNeeded,
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Function *OrigF);
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// Clone function F and set NewFeatures on the clone.
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// Cole takes the name of original function.
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Function *cloneWithFeatures(Function &F,
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const FeatureBitset &NewFeatures);
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// Set new function's features in place.
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void setFeatures(Function &F, const FeatureBitset &NewFeatures);
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std::string getFeatureString(const FeatureBitset &Features) const;
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// Propagate attributes from Roots.
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bool process();
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public:
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AMDGPUPropagateAttributes(const TargetMachine *TM, bool AllowClone) :
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TM(TM), AllowClone(AllowClone) {}
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// Use F as a root and propagate its attributes.
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bool process(Function &F);
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// Propagate attributes starting from kernel functions.
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bool process(Module &M);
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};
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// Allows to propagate attributes early, but no clonning is allowed as it must
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// be a function pass to run before any optimizations.
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// TODO: We shall only need a one instance of module pass, but that needs to be
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// in the linker pipeline which is currently not possible.
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class AMDGPUPropagateAttributesEarly : public FunctionPass {
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const TargetMachine *TM;
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public:
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static char ID; // Pass identification
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AMDGPUPropagateAttributesEarly(const TargetMachine *TM = nullptr) :
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FunctionPass(ID), TM(TM) {
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initializeAMDGPUPropagateAttributesEarlyPass(
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*PassRegistry::getPassRegistry());
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}
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bool runOnFunction(Function &F) override;
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};
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// Allows to propagate attributes with clonning but does that late in the
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// pipeline.
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class AMDGPUPropagateAttributesLate : public ModulePass {
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const TargetMachine *TM;
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public:
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static char ID; // Pass identification
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AMDGPUPropagateAttributesLate(const TargetMachine *TM = nullptr) :
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ModulePass(ID), TM(TM) {
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initializeAMDGPUPropagateAttributesLatePass(
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*PassRegistry::getPassRegistry());
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}
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bool runOnModule(Module &M) override;
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};
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} // end anonymous namespace.
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char AMDGPUPropagateAttributesEarly::ID = 0;
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char AMDGPUPropagateAttributesLate::ID = 0;
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INITIALIZE_PASS(AMDGPUPropagateAttributesEarly,
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"amdgpu-propagate-attributes-early",
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"Early propagate attributes from kernels to functions",
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false, false)
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INITIALIZE_PASS(AMDGPUPropagateAttributesLate,
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"amdgpu-propagate-attributes-late",
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"Late propagate attributes from kernels to functions",
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false, false)
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Function *
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AMDGPUPropagateAttributes::findFunction(const FeatureBitset &FeaturesNeeded,
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Function *OrigF) {
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// TODO: search for clone's clones.
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for (Clone &C : Clones)
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if (C.OrigF == OrigF && FeaturesNeeded == C.FeatureMask)
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return C.NewF;
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return nullptr;
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}
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bool AMDGPUPropagateAttributes::process(Module &M) {
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for (auto &F : M.functions())
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if (AMDGPU::isEntryFunctionCC(F.getCallingConv()))
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Roots.insert(&F);
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return process();
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}
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bool AMDGPUPropagateAttributes::process(Function &F) {
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Roots.insert(&F);
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return process();
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}
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bool AMDGPUPropagateAttributes::process() {
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bool Changed = false;
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SmallSet<Function *, 32> NewRoots;
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SmallSet<Function *, 32> Replaced;
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if (Roots.empty())
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return false;
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Module &M = *(*Roots.begin())->getParent();
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do {
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Roots.insert(NewRoots.begin(), NewRoots.end());
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NewRoots.clear();
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for (auto &F : M.functions()) {
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if (F.isDeclaration() || Roots.count(&F) || Roots.count(&F))
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continue;
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const FeatureBitset &CalleeBits =
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TM->getSubtargetImpl(F)->getFeatureBits();
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SmallVector<std::pair<CallBase *, Function *>, 32> ToReplace;
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for (User *U : F.users()) {
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Instruction *I = dyn_cast<Instruction>(U);
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if (!I)
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continue;
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CallBase *CI = dyn_cast<CallBase>(I);
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if (!CI)
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continue;
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Function *Caller = CI->getCaller();
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if (!Caller)
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continue;
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if (!Roots.count(Caller))
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continue;
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const FeatureBitset &CallerBits =
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TM->getSubtargetImpl(*Caller)->getFeatureBits() & TargetFeatures;
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if (CallerBits == (CalleeBits & TargetFeatures)) {
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NewRoots.insert(&F);
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continue;
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}
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Function *NewF = findFunction(CallerBits, &F);
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if (!NewF) {
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FeatureBitset NewFeatures((CalleeBits & ~TargetFeatures) |
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CallerBits);
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if (!AllowClone) {
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// This may set different features on different iteartions if
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// there is a contradiction in callers' attributes. In this case
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// we rely on a second pass running on Module, which is allowed
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// to clone.
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setFeatures(F, NewFeatures);
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NewRoots.insert(&F);
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Changed = true;
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break;
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}
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NewF = cloneWithFeatures(F, NewFeatures);
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Clones.push_back(Clone(CallerBits, &F, NewF));
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NewRoots.insert(NewF);
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}
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ToReplace.push_back(std::make_pair(CI, NewF));
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Replaced.insert(&F);
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Changed = true;
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}
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while (!ToReplace.empty()) {
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auto R = ToReplace.pop_back_val();
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R.first->setCalledFunction(R.second);
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}
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}
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} while (!NewRoots.empty());
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for (Function *F : Replaced) {
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if (F->use_empty())
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F->eraseFromParent();
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}
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return Changed;
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}
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Function *
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AMDGPUPropagateAttributes::cloneWithFeatures(Function &F,
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const FeatureBitset &NewFeatures) {
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LLVM_DEBUG(dbgs() << "Cloning " << F.getName() << '\n');
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ValueToValueMapTy dummy;
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Function *NewF = CloneFunction(&F, dummy);
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setFeatures(*NewF, NewFeatures);
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// Swap names. If that is the only clone it will retain the name of now
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// dead value.
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if (F.hasName()) {
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std::string NewName = NewF->getName();
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NewF->takeName(&F);
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F.setName(NewName);
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// Name has changed, it does not need an external symbol.
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F.setVisibility(GlobalValue::DefaultVisibility);
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F.setLinkage(GlobalValue::InternalLinkage);
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}
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return NewF;
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}
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void AMDGPUPropagateAttributes::setFeatures(Function &F,
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const FeatureBitset &NewFeatures) {
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std::string NewFeatureStr = getFeatureString(NewFeatures);
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LLVM_DEBUG(dbgs() << "Set features "
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<< getFeatureString(NewFeatures & TargetFeatures)
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<< " on " << F.getName() << '\n');
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F.removeFnAttr("target-features");
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F.addFnAttr("target-features", NewFeatureStr);
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}
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std::string
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AMDGPUPropagateAttributes::getFeatureString(const FeatureBitset &Features) const
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{
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std::string Ret;
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for (const SubtargetFeatureKV &KV : AMDGPUFeatureKV) {
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if (Features[KV.Value])
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Ret += (StringRef("+") + KV.Key + ",").str();
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else if (TargetFeatures[KV.Value])
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Ret += (StringRef("-") + KV.Key + ",").str();
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}
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Ret.pop_back(); // Remove last comma.
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return Ret;
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}
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bool AMDGPUPropagateAttributesEarly::runOnFunction(Function &F) {
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if (!TM || !AMDGPU::isEntryFunctionCC(F.getCallingConv()))
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return false;
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return AMDGPUPropagateAttributes(TM, false).process(F);
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}
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bool AMDGPUPropagateAttributesLate::runOnModule(Module &M) {
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if (!TM)
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return false;
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return AMDGPUPropagateAttributes(TM, true).process(M);
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}
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FunctionPass
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*llvm::createAMDGPUPropagateAttributesEarlyPass(const TargetMachine *TM) {
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return new AMDGPUPropagateAttributesEarly(TM);
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}
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ModulePass
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*llvm::createAMDGPUPropagateAttributesLatePass(const TargetMachine *TM) {
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return new AMDGPUPropagateAttributesLate(TM);
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}
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@ -217,6 +217,8 @@ extern "C" void LLVMInitializeAMDGPUTarget() {
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initializeAMDGPUOpenCLEnqueuedBlockLoweringPass(*PR);
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initializeAMDGPUPromoteAllocaPass(*PR);
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initializeAMDGPUCodeGenPreparePass(*PR);
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initializeAMDGPUPropagateAttributesEarlyPass(*PR);
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initializeAMDGPUPropagateAttributesLatePass(*PR);
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initializeAMDGPURewriteOutArgumentsPass(*PR);
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initializeAMDGPUUnifyMetadataPass(*PR);
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initializeSIAnnotateControlFlowPass(*PR);
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@ -402,13 +404,14 @@ void AMDGPUTargetMachine::adjustPassManager(PassManagerBuilder &Builder) {
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Builder.addExtension(
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PassManagerBuilder::EP_ModuleOptimizerEarly,
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[Internalize, EarlyInline, AMDGPUAA](const PassManagerBuilder &,
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[Internalize, EarlyInline, AMDGPUAA, this](const PassManagerBuilder &,
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legacy::PassManagerBase &PM) {
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if (AMDGPUAA) {
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PM.add(createAMDGPUAAWrapperPass());
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PM.add(createAMDGPUExternalAAWrapperPass());
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}
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PM.add(createAMDGPUUnifyMetadataPass());
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PM.add(createAMDGPUPropagateAttributesLatePass(this));
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if (Internalize) {
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PM.add(createInternalizePass(mustPreserveGV));
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PM.add(createGlobalDCEPass());
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@ -420,12 +423,13 @@ void AMDGPUTargetMachine::adjustPassManager(PassManagerBuilder &Builder) {
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const auto &Opt = Options;
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Builder.addExtension(
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PassManagerBuilder::EP_EarlyAsPossible,
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[AMDGPUAA, LibCallSimplify, &Opt](const PassManagerBuilder &,
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[AMDGPUAA, LibCallSimplify, &Opt, this](const PassManagerBuilder &,
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legacy::PassManagerBase &PM) {
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if (AMDGPUAA) {
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PM.add(createAMDGPUAAWrapperPass());
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PM.add(createAMDGPUExternalAAWrapperPass());
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}
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PM.add(llvm::createAMDGPUPropagateAttributesEarlyPass(this));
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PM.add(llvm::createAMDGPUUseNativeCallsPass());
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if (LibCallSimplify)
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PM.add(llvm::createAMDGPUSimplifyLibCallsPass(Opt));
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@ -654,6 +658,9 @@ void AMDGPUPassConfig::addIRPasses() {
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disablePass(&FuncletLayoutID);
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disablePass(&PatchableFunctionID);
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// A call to propagate attributes pass in the backend in case opt was not run.
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addPass(createAMDGPUPropagateAttributesEarlyPass(&TM));
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addPass(createAtomicExpandPass());
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// This must occur before inlining, as the inliner will not look through
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@ -58,6 +58,7 @@ add_llvm_target(AMDGPUCodeGen
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AMDGPUMCInstLower.cpp
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AMDGPUOpenCLEnqueuedBlockLowering.cpp
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AMDGPUPromoteAlloca.cpp
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AMDGPUPropagateAttributes.cpp
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AMDGPURegAsmNames.inc.cpp
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AMDGPURegisterBankInfo.cpp
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AMDGPURegisterInfo.cpp
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@ -0,0 +1,87 @@
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -O1 < %s | FileCheck -check-prefix=OPT %s
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; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=LLC %s
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; OPT: declare void @foo4() local_unnamed_addr #0
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; OPT: define internal fastcc void @foo3.2() unnamed_addr #1
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; OPT: define void @foo2() local_unnamed_addr #1
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; OPT: define internal fastcc void @foo1.1() unnamed_addr #1
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; OPT: define amdgpu_kernel void @kernel1() local_unnamed_addr #2
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; OPT: define amdgpu_kernel void @kernel2() local_unnamed_addr #3
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; OPT: define amdgpu_kernel void @kernel3() local_unnamed_addr #3
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; OPT: define void @foo1() local_unnamed_addr #4
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; OPT: define void @foo3() local_unnamed_addr #4
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; OPT: attributes #0 = { {{.*}} "target-features"="+wavefrontsize64" }
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; OPT: attributes #1 = { {{.*}} "target-features"="{{.*}},-wavefrontsize16,-wavefrontsize32,+wavefrontsize64{{.*}}" }
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; OPT: attributes #2 = { {{.*}} "target-features"="+wavefrontsize32" }
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; OPT: attributes #3 = { {{.*}} "target-features"="+wavefrontsize64" }
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; OPT: attributes #4 = { {{.*}} "target-features"="{{.*}},-wavefrontsize16,+wavefrontsize32,-wavefrontsize64{{.*}}" }
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; LLC: foo3:
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; LLC: sample asm
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; LLC: foo2:
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; LLC: sample asm
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; LLC: foo1:
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; LLC: foo4@gotpcrel32@lo+4
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; LLC: foo4@gotpcrel32@hi+4
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; LLC: foo3@gotpcrel32@lo+4
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; LLC: foo3@gotpcrel32@hi+4
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; LLC: foo2@gotpcrel32@lo+4
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; LLC: foo2@gotpcrel32@hi+4
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; LLC: foo1@gotpcrel32@lo+4
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; LLC: foo1@gotpcrel32@hi+4
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; LLC: kernel1:
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; LLC: foo1@gotpcrel32@lo+4
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; LLC: foo1@gotpcrel32@hi+4
|
||||
; LLC: kernel2:
|
||||
; LLC: foo2@gotpcrel32@lo+4
|
||||
; LLC: foo2@gotpcrel32@hi+4
|
||||
; LLC: kernel3:
|
||||
; LLC: foo1@gotpcrel32@lo+4
|
||||
; LLC: foo1@gotpcrel32@hi+4
|
||||
|
||||
declare void @foo4() #1
|
||||
|
||||
define void @foo3() #1 {
|
||||
entry:
|
||||
call void asm sideeffect "; sample asm", ""()
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @foo2() #1 {
|
||||
entry:
|
||||
call void asm sideeffect "; sample asm", ""()
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @foo1() #1 {
|
||||
entry:
|
||||
tail call void @foo4()
|
||||
tail call void @foo3()
|
||||
tail call void @foo2()
|
||||
tail call void @foo2()
|
||||
tail call void @foo1()
|
||||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @kernel1() #0 {
|
||||
entry:
|
||||
tail call void @foo1()
|
||||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @kernel2() #2 {
|
||||
entry:
|
||||
tail call void @foo2()
|
||||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @kernel3() #3 {
|
||||
entry:
|
||||
tail call void @foo1()
|
||||
ret void
|
||||
}
|
||||
|
||||
attributes #0 = { nounwind "target-features"="+wavefrontsize32" }
|
||||
attributes #1 = { noinline nounwind "target-features"="+wavefrontsize64" }
|
||||
attributes #2 = { nounwind "target-features"="+wavefrontsize64" }
|
||||
attributes #3 = { nounwind "target-features"="+wavefrontsize64" }
|
||||
|
|
@ -0,0 +1,72 @@
|
|||
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -O1 < %s | FileCheck -check-prefix=OPT %s
|
||||
; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=LLC %s
|
||||
|
||||
; OPT: declare void @foo4() local_unnamed_addr #0
|
||||
; OPT: define void @foo3() local_unnamed_addr #1
|
||||
; OPT: define void @foo2() local_unnamed_addr #1
|
||||
; OPT: define void @foo1() local_unnamed_addr #1
|
||||
; OPT: define amdgpu_kernel void @kernel1() local_unnamed_addr #2
|
||||
; OPT: define amdgpu_kernel void @kernel2() local_unnamed_addr #2
|
||||
; OPT: attributes #0 = { {{.*}} "target-features"="+wavefrontsize64" }
|
||||
; OPT: attributes #1 = { {{.*}} "target-features"="{{.*}},-wavefrontsize16,+wavefrontsize32,-wavefrontsize64
|
||||
; OPT: attributes #2 = { {{.*}} "target-features"="+wavefrontsize32
|
||||
; OPT: attributes #3 = { nounwind }
|
||||
|
||||
; LLC: foo3:
|
||||
; LLC: sample asm
|
||||
; LLC: foo2:
|
||||
; LLC: sample asm
|
||||
; LLC: foo1:
|
||||
; LLC: foo4@gotpcrel32@lo+4
|
||||
; LLC: foo4@gotpcrel32@hi+4
|
||||
; LLC: foo3@gotpcrel32@lo+4
|
||||
; LLC: foo3@gotpcrel32@hi+4
|
||||
; LLC: foo2@gotpcrel32@lo+4
|
||||
; LLC: foo2@gotpcrel32@hi+4
|
||||
; LLC: foo1@gotpcrel32@lo+4
|
||||
; LLC: foo1@gotpcrel32@hi+4
|
||||
; LLC: kernel1:
|
||||
; LLC: foo1@gotpcrel32@lo+4
|
||||
; LLC: foo1@gotpcrel32@hi+4
|
||||
; LLC: kernel2:
|
||||
; LLC: foo2@gotpcrel32@lo+4
|
||||
; LLC: foo2@gotpcrel32@hi+4
|
||||
|
||||
declare void @foo4() #1
|
||||
|
||||
define void @foo3() #1 {
|
||||
entry:
|
||||
call void asm sideeffect "; sample asm", ""()
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @foo2() #1 {
|
||||
entry:
|
||||
call void asm sideeffect "; sample asm", ""()
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @foo1() #1 {
|
||||
entry:
|
||||
tail call void @foo4()
|
||||
tail call void @foo3()
|
||||
tail call void @foo2()
|
||||
tail call void @foo2()
|
||||
tail call void @foo1()
|
||||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @kernel1() #0 {
|
||||
entry:
|
||||
tail call void @foo1()
|
||||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @kernel2() #0 {
|
||||
entry:
|
||||
tail call void @foo2()
|
||||
ret void
|
||||
}
|
||||
|
||||
attributes #0 = { nounwind "target-features"="+wavefrontsize32" }
|
||||
attributes #1 = { noinline nounwind "target-features"="+wavefrontsize64" }
|
||||
Loading…
Reference in New Issue