forked from OSchip/llvm-project
[SparcV9]: Use SRL instead of SLL to clear top 32-bits in ctpop:i32. SLL does not clear top 32 bit, only SRL does.
llvm-svn: 198280
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@ -967,13 +967,13 @@ let Predicates = [HasV9] in {
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}
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// POPCrr - This does a ctpop of a 64-bit register. As such, we have to clear
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// the top 32-bits before using it. To do this clearing, we use a SLLri X,0.
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// the top 32-bits before using it. To do this clearing, we use a SRLri X,0.
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let rs1 = 0 in
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def POPCrr : F3_1<2, 0b101110,
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(outs IntRegs:$dst), (ins IntRegs:$src),
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"popc $src, $dst", []>, Requires<[HasV9]>;
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def : Pat<(ctpop i32:$src),
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(POPCrr (SLLri $src, 0))>;
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(POPCrr (SRLri $src, 0))>;
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//===----------------------------------------------------------------------===//
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// Non-Instruction Patterns
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@ -1,8 +1,22 @@
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; RUN: llc < %s -march=sparc -mattr=-v9 | not grep popc
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; RUN: llc < %s -march=sparc -mattr=+v9 | grep popc
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; RUN: llc < %s -march=sparc -mattr=-v9 | FileCheck %s -check-prefix=V8
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; RUN: llc < %s -march=sparc -mattr=+v9 | FileCheck %s -check-prefix=V9
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; RUN: llc < %s -march=sparcv9 | FileCheck %s -check-prefix=SPARC64
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declare i32 @llvm.ctpop.i32(i32)
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; V8-LABEL: test
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; V8-NOT : popc
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; V9-LABEL: test
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; V9: srl %o0, 0, %o0
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; V9-NEXT: jmp %o7+8
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; V9-NEXT: popc %o0, %o0
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; SPARC64-LABEL: test
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; SPARC64: srl %o0, 0, %o0
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; SPARC64: jmp %o7+8
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; SPARC64: popc %o0, %o0
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define i32 @test(i32 %X) {
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%Y = call i32 @llvm.ctpop.i32( i32 %X ) ; <i32> [#uses=1]
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ret i32 %Y
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