forked from OSchip/llvm-project
[clang][ARM][NFC] Clean up signed conversion and undefined macros in builtin header
These warnings were identified while debugging modules with Wsystem-headers. Differential Revision: https://reviews.llvm.org/D132003
This commit is contained in:
Dominic Chen
parent
5f3a8b585b
commit
ac77b3fde1
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@ -64,7 +64,7 @@ static __inline__ void __attribute__((__always_inline__, __nodebug__)) __yield(v
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}
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#endif
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#if __ARM_32BIT_STATE
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#if defined(__ARM_32BIT_STATE) && __ARM_32BIT_STATE
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#define __dbg(t) __builtin_arm_dbg(t)
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#endif
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@ -82,7 +82,7 @@ __swp(uint32_t __x, volatile uint32_t *__p) {
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/* 8.6.1 Data prefetch */
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#define __pld(addr) __pldx(0, 0, 0, addr)
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#if __ARM_32BIT_STATE
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#if defined(__ARM_32BIT_STATE) && __ARM_32BIT_STATE
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#define __pldx(access_kind, cache_level, retention_policy, addr) \
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__builtin_arm_prefetch(addr, access_kind, 1)
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#else
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@ -93,7 +93,7 @@ __swp(uint32_t __x, volatile uint32_t *__p) {
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/* 8.6.2 Instruction prefetch */
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#define __pli(addr) __plix(0, 0, addr)
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#if __ARM_32BIT_STATE
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#if defined(__ARM_32BIT_STATE) && __ARM_32BIT_STATE
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#define __plix(cache_level, retention_policy, addr) \
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__builtin_arm_prefetch(addr, 0, 0)
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#else
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@ -140,17 +140,17 @@ __rorl(unsigned long __x, uint32_t __y) {
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/* CLZ */
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__clz(uint32_t __t) {
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return __builtin_clz(__t);
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return (uint32_t)__builtin_clz(__t);
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}
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static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
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__clzl(unsigned long __t) {
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return __builtin_clzl(__t);
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return (unsigned long)__builtin_clzl(__t);
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}
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static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
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__clzll(uint64_t __t) {
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return __builtin_clzll(__t);
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return (uint64_t)__builtin_clzll(__t);
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}
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/* CLS */
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@ -201,7 +201,7 @@ __rev16(uint32_t __t) {
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static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
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__rev16ll(uint64_t __t) {
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return (((uint64_t)__rev16(__t >> 32)) << 32) | __rev16(__t);
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return (((uint64_t)__rev16(__t >> 32)) << 32) | (uint64_t)__rev16((uint32_t)__t);
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}
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static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
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@ -216,7 +216,7 @@ __rev16l(unsigned long __t) {
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/* REVSH */
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static __inline__ int16_t __attribute__((__always_inline__, __nodebug__))
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__revsh(int16_t __t) {
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return __builtin_bswap16(__t);
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return (int16_t)__builtin_bswap16((uint16_t)__t);
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}
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/* RBIT */
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@ -227,7 +227,7 @@ __rbit(uint32_t __t) {
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static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
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__rbitll(uint64_t __t) {
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#if __ARM_32BIT_STATE
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#if defined(__ARM_32BIT_STATE) && __ARM_32BIT_STATE
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return (((uint64_t)__builtin_arm_rbit(__t)) << 32) |
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__builtin_arm_rbit(__t >> 32);
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#else
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@ -247,7 +247,7 @@ __rbitl(unsigned long __t) {
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/*
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* 9.3 16-bit multiplications
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*/
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#if __ARM_FEATURE_DSP
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#if defined(__ARM_FEATURE_DSP) && __ARM_FEATURE_DSP
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static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
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__smulbb(int32_t __a, int32_t __b) {
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return __builtin_arm_smulbb(__a, __b);
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@ -281,13 +281,13 @@ __smulwt(int32_t __a, int32_t __b) {
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* intrinsics are implemented and the flag is enabled.
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*/
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/* 9.4.1 Width-specified saturation intrinsics */
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#if __ARM_FEATURE_SAT
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#if defined(__ARM_FEATURE_SAT) && __ARM_FEATURE_SAT
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#define __ssat(x, y) __builtin_arm_ssat(x, y)
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#define __usat(x, y) __builtin_arm_usat(x, y)
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#endif
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/* 9.4.2 Saturating addition and subtraction intrinsics */
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#if __ARM_FEATURE_DSP
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#if defined(__ARM_FEATURE_DSP) && __ARM_FEATURE_DSP
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static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
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__qadd(int32_t __t, int32_t __v) {
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return __builtin_arm_qadd(__t, __v);
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@ -305,7 +305,7 @@ __qdbl(int32_t __t) {
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#endif
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/* 9.4.3 Accumultating multiplications */
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#if __ARM_FEATURE_DSP
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#if defined(__ARM_FEATURE_DSP) && __ARM_FEATURE_DSP
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static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
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__smlabb(int32_t __a, int32_t __b, int32_t __c) {
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return __builtin_arm_smlabb(__a, __b, __c);
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@ -334,13 +334,13 @@ __smlawt(int32_t __a, int32_t __b, int32_t __c) {
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/* 9.5.4 Parallel 16-bit saturation */
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#if __ARM_FEATURE_SIMD32
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#if defined(__ARM_FEATURE_SIMD32) && __ARM_FEATURE_SIMD32
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#define __ssat16(x, y) __builtin_arm_ssat16(x, y)
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#define __usat16(x, y) __builtin_arm_usat16(x, y)
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#endif
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/* 9.5.5 Packing and unpacking */
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#if __ARM_FEATURE_SIMD32
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#if defined(__ARM_FEATURE_SIMD32) && __ARM_FEATURE_SIMD32
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typedef int32_t int8x4_t;
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typedef int32_t int16x2_t;
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typedef uint32_t uint8x4_t;
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@ -365,7 +365,7 @@ __uxtb16(int8x4_t __a) {
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#endif
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/* 9.5.6 Parallel selection */
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#if __ARM_FEATURE_SIMD32
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#if defined(__ARM_FEATURE_SIMD32) && __ARM_FEATURE_SIMD32
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static __inline__ uint8x4_t __attribute__((__always_inline__, __nodebug__))
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__sel(uint8x4_t __a, uint8x4_t __b) {
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return __builtin_arm_sel(__a, __b);
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@ -373,7 +373,7 @@ __sel(uint8x4_t __a, uint8x4_t __b) {
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#endif
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/* 9.5.7 Parallel 8-bit addition and subtraction */
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#if __ARM_FEATURE_SIMD32
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#if defined(__ARM_FEATURE_SIMD32) && __ARM_FEATURE_SIMD32
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static __inline__ int8x4_t __attribute__((__always_inline__, __nodebug__))
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__qadd8(int8x4_t __a, int8x4_t __b) {
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return __builtin_arm_qadd8(__a, __b);
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@ -425,7 +425,7 @@ __usub8(uint8x4_t __a, uint8x4_t __b) {
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#endif
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/* 9.5.8 Sum of 8-bit absolute differences */
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#if __ARM_FEATURE_SIMD32
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#if defined(__ARM_FEATURE_SIMD32) && __ARM_FEATURE_SIMD32
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__usad8(uint8x4_t __a, uint8x4_t __b) {
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return __builtin_arm_usad8(__a, __b);
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@ -437,7 +437,7 @@ __usada8(uint8x4_t __a, uint8x4_t __b, uint32_t __c) {
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#endif
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/* 9.5.9 Parallel 16-bit addition and subtraction */
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#if __ARM_FEATURE_SIMD32
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#if defined(__ARM_FEATURE_SIMD32) && __ARM_FEATURE_SIMD32
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static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
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__qadd16(int16x2_t __a, int16x2_t __b) {
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return __builtin_arm_qadd16(__a, __b);
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@ -537,7 +537,7 @@ __usub16(uint16x2_t __a, uint16x2_t __b) {
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#endif
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/* 9.5.10 Parallel 16-bit multiplications */
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#if __ARM_FEATURE_SIMD32
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#if defined(__ARM_FEATURE_SIMD32) && __ARM_FEATURE_SIMD32
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static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
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__smlad(int16x2_t __a, int16x2_t __b, int32_t __c) {
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return __builtin_arm_smlad(__a, __b, __c);
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@ -589,7 +589,7 @@ __smusdx(int16x2_t __a, int16x2_t __b) {
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#endif
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/* 9.7 CRC32 intrinsics */
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#if __ARM_FEATURE_CRC32
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#if defined(__ARM_FEATURE_CRC32) && __ARM_FEATURE_CRC32
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__crc32b(uint32_t __a, uint8_t __b) {
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return __builtin_arm_crc32b(__a, __b);
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@ -632,7 +632,7 @@ __crc32cd(uint32_t __a, uint64_t __b) {
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#endif
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/* Armv8.3-A Javascript conversion intrinsic */
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#if __ARM_64BIT_STATE && defined(__ARM_FEATURE_JCVT)
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#if defined(__ARM_64BIT_STATE) && __ARM_64BIT_STATE && defined(__ARM_FEATURE_JCVT)
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static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
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__jcvt(double __a) {
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return __builtin_arm_jcvt(__a);
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@ -640,7 +640,7 @@ __jcvt(double __a) {
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#endif
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/* Armv8.5-A FP rounding intrinsics */
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#if __ARM_64BIT_STATE && defined(__ARM_FEATURE_FRINT)
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#if defined(__ARM_64BIT_STATE) && __ARM_64BIT_STATE && defined(__ARM_FEATURE_FRINT)
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static __inline__ float __attribute__((__always_inline__, __nodebug__))
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__frint32zf(float __a) {
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return __builtin_arm_frint32zf(__a);
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@ -683,7 +683,7 @@ __frint64x(double __a) {
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#endif
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/* Armv8.7-A load/store 64-byte intrinsics */
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#if __ARM_64BIT_STATE && defined(__ARM_FEATURE_LS64)
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#if defined(__ARM_64BIT_STATE) && __ARM_64BIT_STATE && defined(__ARM_FEATURE_LS64)
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typedef struct {
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uint64_t val[8];
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} data512_t;
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@ -721,7 +721,7 @@ __arm_st64bv0(void *__addr, data512_t __value) {
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#define __arm_wsrf64(sysreg, v) __arm_wsr64(sysreg, __builtin_bit_cast(uint64_t, v))
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/* Memory Tagging Extensions (MTE) Intrinsics */
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#if __ARM_FEATURE_MEMORY_TAGGING
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#if defined(__ARM_FEATURE_MEMORY_TAGGING) && __ARM_FEATURE_MEMORY_TAGGING
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#define __arm_mte_create_random_tag(__ptr, __mask) __builtin_arm_irg(__ptr, __mask)
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#define __arm_mte_increment_tag(__ptr, __tag_offset) __builtin_arm_addg(__ptr, __tag_offset)
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#define __arm_mte_exclude_tag(__ptr, __excluded) __builtin_arm_gmi(__ptr, __excluded)
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@ -731,13 +731,13 @@ __arm_st64bv0(void *__addr, data512_t __value) {
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#endif
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/* Memory Operations Intrinsics */
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#if __ARM_FEATURE_MOPS && __ARM_FEATURE_MEMORY_TAGGING
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#if defined(__ARM_FEATURE_MOPS) && __ARM_FEATURE_MOPS && defined(__ARM_FEATURE_MEMORY_TAGGING) && __ARM_FEATURE_MEMORY_TAGGING
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#define __arm_mops_memset_tag(__tagged_address, __value, __size) \
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__builtin_arm_mops_memset_tag(__tagged_address, __value, __size)
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#endif
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/* Transactional Memory Extension (TME) Intrinsics */
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#if __ARM_FEATURE_TME
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#if defined(__ARM_FEATURE_TME) && __ARM_FEATURE_TME
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#define _TMFAILURE_REASON 0x00007fffu
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#define _TMFAILURE_RTRY 0x00008000u
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@ -759,7 +759,7 @@ __arm_st64bv0(void *__addr, data512_t __value) {
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#endif /* __ARM_FEATURE_TME */
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/* Armv8.5-A Random number generation intrinsics */
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#if __ARM_64BIT_STATE && defined(__ARM_FEATURE_RNG)
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#if defined(__ARM_64BIT_STATE) && __ARM_64BIT_STATE && defined(__ARM_FEATURE_RNG)
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static __inline__ int __attribute__((__always_inline__, __nodebug__))
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__rndr(uint64_t *__p) {
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return __builtin_arm_rndr(__p);
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