From ac3b8df8f2f433193827b8c0396ba8d41d1af565 Mon Sep 17 00:00:00 2001 From: Thomas Lively Date: Thu, 8 Sep 2022 08:07:48 -0700 Subject: [PATCH] [WebAssembly] Prototype `f32x4.relaxed_dot_bf16x8_add_f32` As proposed in https://github.com/WebAssembly/relaxed-simd/issues/77. Only an LLVM intrinsic and a clang builtin are implemented. Since there is no bfloat16 type, use u16 to represent the bfloats in the builtin function arguments. Differential Revision: https://reviews.llvm.org/D133428 --- clang/include/clang/Basic/BuiltinsWebAssembly.def | 1 + clang/lib/CodeGen/CGBuiltin.cpp | 8 ++++++++ clang/test/CodeGen/builtins-wasm.c | 7 +++++++ llvm/include/llvm/IR/IntrinsicsWebAssembly.td | 6 ++++++ .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 12 ++++++++++++ llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll | 14 ++++++++++++++ 6 files changed, 48 insertions(+) diff --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def b/clang/include/clang/Basic/BuiltinsWebAssembly.def index 03c6162f62e3..723645ca606a 100644 --- a/clang/include/clang/Basic/BuiltinsWebAssembly.def +++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def @@ -188,6 +188,7 @@ TARGET_BUILTIN(__builtin_wasm_relaxed_q15mulr_s_i16x8, "V8sV8sV8s", "nc", "relax TARGET_BUILTIN(__builtin_wasm_dot_i8x16_i7x16_s_i16x8, "V8sV16ScV16Sc", "nc", "relaxed-simd") TARGET_BUILTIN(__builtin_wasm_dot_i8x16_i7x16_add_s_i32x4, "V4iV16ScV16ScV4i", "nc", "relaxed-simd") +TARGET_BUILTIN(__builtin_wasm_relaxed_dot_bf16x8_add_f32_f32x4, "V4fV8UsV8UsV4f", "nc", "relaxed-simd") #undef BUILTIN #undef TARGET_BUILTIN diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index 5af3811988e1..fff94678a684 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -18870,6 +18870,14 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, CGM.getIntrinsic(Intrinsic::wasm_dot_i8x16_i7x16_add_signed); return Builder.CreateCall(Callee, {LHS, RHS, Acc}); } + case WebAssembly::BI__builtin_wasm_relaxed_dot_bf16x8_add_f32_f32x4: { + Value *LHS = EmitScalarExpr(E->getArg(0)); + Value *RHS = EmitScalarExpr(E->getArg(1)); + Value *Acc = EmitScalarExpr(E->getArg(2)); + Function *Callee = + CGM.getIntrinsic(Intrinsic::wasm_relaxed_dot_bf16x8_add_f32); + return Builder.CreateCall(Callee, {LHS, RHS, Acc}); + } default: return nullptr; } diff --git a/clang/test/CodeGen/builtins-wasm.c b/clang/test/CodeGen/builtins-wasm.c index ea591a195cad..9d742e7c7e29 100644 --- a/clang/test/CodeGen/builtins-wasm.c +++ b/clang/test/CodeGen/builtins-wasm.c @@ -794,3 +794,10 @@ i32x4 dot_i8x16_i7x16_add_s_i32x4(i8x16 a, i8x16 b, i32x4 c) { // WEBASSEMBLY-SAME: <16 x i8> %a, <16 x i8> %b, <4 x i32> %c) // WEBASSEMBLY-NEXT: ret } + +f32x4 relaxed_dot_bf16x8_add_f32_f32x4(u16x8 a, u16x8 b, f32x4 c) { + return __builtin_wasm_relaxed_dot_bf16x8_add_f32_f32x4(a, b, c); + // WEBASSEMBLY: call <4 x float> @llvm.wasm.relaxed.dot.bf16x8.add.f32 + // WEBASSEMBLY-SAME: <8 x i16> %a, <8 x i16> %b, <4 x float> %c) + // WEBASSEMBLY-NEXT: ret +} diff --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td index f313be1b2235..7c678ee63b89 100644 --- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td +++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td @@ -285,6 +285,12 @@ def int_wasm_dot_i8x16_i7x16_add_signed: [llvm_v16i8_ty, llvm_v16i8_ty, llvm_v4i32_ty], [IntrNoMem, IntrSpeculatable]>; +def int_wasm_relaxed_dot_bf16x8_add_f32: + Intrinsic<[llvm_v4f32_ty], + [llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4f32_ty], + [IntrNoMem, IntrSpeculatable]>; + + //===----------------------------------------------------------------------===// // Thread-local storage intrinsics //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td index 14202a8e1924..36393aea293c 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td @@ -1466,3 +1466,15 @@ defm RELAXED_DOT_ADD : (v16i8 V128:$lhs), (v16i8 V128:$rhs), (v4i32 V128:$acc)))], "i32x4.dot_i8x16_i7x16_add_s\t$dst, $lhs, $rhs, $acc", "i32x4.dot_i8x16_i7x16_add_s", 0x113>; + +//===----------------------------------------------------------------------===// +// Relaxed BFloat16 dot product +//===----------------------------------------------------------------------===// + +defm RELAXED_DOT_BFLOAT : + RELAXED_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs, V128:$acc), + (outs), (ins), + [(set (v4f32 V128:$dst), (int_wasm_relaxed_dot_bf16x8_add_f32 + (v8i16 V128:$lhs), (v8i16 V128:$rhs), (v4f32 V128:$acc)))], + "f32x4.relaxed_dot_bf16x8_add_f32\t$dst, $lhs, $rhs, $acc", + "f32x4.relaxed_dot_bf16x8_add_f32", 0x114>; diff --git a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll index 5cbc7bf3dbd4..7423ca336d6f 100644 --- a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll +++ b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll @@ -786,6 +786,20 @@ define <4 x float> @relaxed_max_v4f32(<4 x float> %a, <4 x float> %b) { ret <4 x float> %v } +; CHECK-LABEL: relaxed_dot_bf16x8_add_f32: +; CHECK-NEXT: .functype relaxed_dot_bf16x8_add_f32 (v128, v128, v128) -> (v128){{$}} +; CHECK-NEXT: f32x4.relaxed_dot_bf16x8_add_f32 $push[[R:[0-9]+]]=, $0, $1, $2{{$}} +; CHECK-NEXT: return $pop[[R]]{{$}} +declare <4 x float> @llvm.wasm.relaxed.dot.bf16x8.add.f32(<8 x i16>, <8 x i16>, + <4 x float>) +define <4 x float> @relaxed_dot_bf16x8_add_f32(<8 x i16> %a, <8 x i16> %b, + <4 x float> %c) { + %v = call <4 x float> @llvm.wasm.relaxed.dot.bf16x8.add.f32( + <8 x i16> %a, <8 x i16> %b, <4 x float> %c + ) + ret <4 x float> %v +} + ; ============================================================================== ; 2 x f64 ; ==============================================================================