forked from OSchip/llvm-project
r13 is the thread pointer on darwin/ppc64, don't allocate it.
llvm-svn: 31882
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1f96052d41
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@ -255,7 +255,7 @@ const unsigned* PPCRegisterInfo::getCalleeSaveRegs() const {
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};
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// 64-bit Darwin calling convention.
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static const unsigned Darwin64_CalleeSaveRegs[] = {
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PPC::X13, PPC::X14, PPC::X15,
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PPC::X14, PPC::X15,
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PPC::X16, PPC::X17, PPC::X18, PPC::X19,
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PPC::X20, PPC::X21, PPC::X22, PPC::X23,
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PPC::X24, PPC::X25, PPC::X26, PPC::X27,
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@ -306,7 +306,7 @@ PPCRegisterInfo::getCalleeSaveRegClasses() const {
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// 64-bit Darwin calling convention.
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static const TargetRegisterClass * const Darwin64_CalleeSaveRegClasses[] = {
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&PPC::G8RCRegClass,&PPC::G8RCRegClass,&PPC::G8RCRegClass,
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&PPC::G8RCRegClass,&PPC::G8RCRegClass,
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&PPC::G8RCRegClass,&PPC::G8RCRegClass,&PPC::G8RCRegClass,&PPC::G8RCRegClass,
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&PPC::G8RCRegClass,&PPC::G8RCRegClass,&PPC::G8RCRegClass,&PPC::G8RCRegClass,
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&PPC::G8RCRegClass,&PPC::G8RCRegClass,&PPC::G8RCRegClass,&PPC::G8RCRegClass,
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@ -234,7 +234,7 @@ def GPRC : RegisterClass<"PPC", [i32], 32,
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def G8RC : RegisterClass<"PPC", [i64], 64,
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[X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12,
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X30, X29, X28, X27, X26, X25, X24, X23, X22, X21, X20, X19, X18, X17,
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X16, X15, X14, X13, X31, X0, X1, LR8]>
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X16, X15, X14, X31, X13, X0, X1, LR8]>
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{
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let MethodProtos = [{
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iterator allocation_order_begin(const MachineFunction &MF) const;
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@ -248,9 +248,9 @@ def G8RC : RegisterClass<"PPC", [i64], 64,
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G8RCClass::iterator
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G8RCClass::allocation_order_end(const MachineFunction &MF) const {
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if (needsFP(MF))
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return end()-4;
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return end()-5;
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else
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return end()-3;
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return end()-4;
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}
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}];
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}
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