[X86] Don't use fsin/fcos/fsincos instructions ever

Summary:
Previously we would use these instructions if sse was disabled and fastmath was enabled.

As mentioned in D28335, this is a bad idea.

Reviewers: efriedma, scanon, DavidKreitzer

Reviewed By: DavidKreitzer

Subscribers: zvi, llvm-commits

Differential Revision: https://reviews.llvm.org/D36344

llvm-svn: 310762
This commit is contained in:
Craig Topper 2017-08-11 20:55:29 +00:00
parent 709be5eef2
commit ac217b7aa3
3 changed files with 75 additions and 114 deletions

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@ -573,11 +573,10 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
addLegalFPImmediate(APFloat(-0.0)); // FLD0/FCHS addLegalFPImmediate(APFloat(-0.0)); // FLD0/FCHS
addLegalFPImmediate(APFloat(-1.0)); // FLD1/FCHS addLegalFPImmediate(APFloat(-1.0)); // FLD1/FCHS
if (!TM.Options.UnsafeFPMath) { // Always expand sin/cos functions even though x87 has an instruction.
setOperationAction(ISD::FSIN , MVT::f64, Expand); setOperationAction(ISD::FSIN , MVT::f64, Expand);
setOperationAction(ISD::FCOS , MVT::f64, Expand); setOperationAction(ISD::FCOS , MVT::f64, Expand);
setOperationAction(ISD::FSINCOS, MVT::f64, Expand); setOperationAction(ISD::FSINCOS, MVT::f64, Expand);
}
} else if (UseX87) { } else if (UseX87) {
// f32 and f64 in x87. // f32 and f64 in x87.
// Set up the FP register classes. // Set up the FP register classes.
@ -588,12 +587,11 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setOperationAction(ISD::UNDEF, VT, Expand); setOperationAction(ISD::UNDEF, VT, Expand);
setOperationAction(ISD::FCOPYSIGN, VT, Expand); setOperationAction(ISD::FCOPYSIGN, VT, Expand);
if (!TM.Options.UnsafeFPMath) { // Always expand sin/cos functions even though x87 has an instruction.
setOperationAction(ISD::FSIN , VT, Expand); setOperationAction(ISD::FSIN , VT, Expand);
setOperationAction(ISD::FCOS , VT, Expand); setOperationAction(ISD::FCOS , VT, Expand);
setOperationAction(ISD::FSINCOS, VT, Expand); setOperationAction(ISD::FSINCOS, VT, Expand);
} }
}
addLegalFPImmediate(APFloat(+0.0)); // FLD0 addLegalFPImmediate(APFloat(+0.0)); // FLD0
addLegalFPImmediate(APFloat(+1.0)); // FLD1 addLegalFPImmediate(APFloat(+1.0)); // FLD1
addLegalFPImmediate(APFloat(-0.0)); // FLD0/FCHS addLegalFPImmediate(APFloat(-0.0)); // FLD0/FCHS
@ -636,11 +634,10 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
addLegalFPImmediate(TmpFlt2); // FLD1/FCHS addLegalFPImmediate(TmpFlt2); // FLD1/FCHS
} }
if (!TM.Options.UnsafeFPMath) { // Always expand sin/cos functions even though x87 has an instruction.
setOperationAction(ISD::FSIN , MVT::f80, Expand); setOperationAction(ISD::FSIN , MVT::f80, Expand);
setOperationAction(ISD::FCOS , MVT::f80, Expand); setOperationAction(ISD::FCOS , MVT::f80, Expand);
setOperationAction(ISD::FSINCOS, MVT::f80, Expand); setOperationAction(ISD::FSINCOS, MVT::f80, Expand);
}
setOperationAction(ISD::FFLOOR, MVT::f80, Expand); setOperationAction(ISD::FFLOOR, MVT::f80, Expand);
setOperationAction(ISD::FCEIL, MVT::f80, Expand); setOperationAction(ISD::FCEIL, MVT::f80, Expand);

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@ -118,10 +118,10 @@ entry:
; GNU_SINCOS: faddp %st(1) ; GNU_SINCOS: faddp %st(1)
; GNU_SINCOS_FASTMATH-LABEL: test3: ; GNU_SINCOS_FASTMATH-LABEL: test3:
; GNU_SINCOS_FASTMATH: fsin ; GNU_SINCOS_FASTMATH: callq sincosl
; GNU_SINCOS_FASTMATH: fcos ; GNU_SINCOS_FASTMATH: fldt 16(%{{[re]}}sp)
; GNU_SINCOS_FASTMATH: fldt 32(%{{[re]}}sp)
; GNU_SINCOS_FASTMATH: faddp %st(1) ; GNU_SINCOS_FASTMATH: faddp %st(1)
; GNU_SINCOS_FASTMATH: ret
%call = tail call x86_fp80 @sinl(x86_fp80 %x) readnone %call = tail call x86_fp80 @sinl(x86_fp80 %x) readnone
%call1 = tail call x86_fp80 @cosl(x86_fp80 %x) readnone %call1 = tail call x86_fp80 @cosl(x86_fp80 %x) readnone
%add = fadd x86_fp80 %call, %call1 %add = fadd x86_fp80 %call, %call1

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@ -10,64 +10,46 @@ declare double @sin(double) readonly
declare x86_fp80 @sinl(x86_fp80) readonly declare x86_fp80 @sinl(x86_fp80) readonly
define float @test1(float %X) { define float @test1(float %X) {
; UNSAFE-LABEL: test1: ; CHECK-LABEL: test1:
; UNSAFE: ## BB#0: ; CHECK: ## BB#0:
; UNSAFE-NEXT: flds {{[0-9]+}}(%esp) ; CHECK-NEXT: subl $12, %esp
; UNSAFE-NEXT: fsin ; CHECK-NEXT: Lcfi0:
; UNSAFE-NEXT: retl ; CHECK-NEXT: .cfi_def_cfa_offset 16
; ; CHECK-NEXT: flds {{[0-9]+}}(%esp)
; SAFE-LABEL: test1: ; CHECK-NEXT: fstps (%esp)
; SAFE: ## BB#0: ; CHECK-NEXT: calll _sinf
; SAFE-NEXT: subl $12, %esp ; CHECK-NEXT: addl $12, %esp
; SAFE-NEXT: Lcfi0: ; CHECK-NEXT: retl
; SAFE-NEXT: .cfi_def_cfa_offset 16
; SAFE-NEXT: flds {{[0-9]+}}(%esp)
; SAFE-NEXT: fstps (%esp)
; SAFE-NEXT: calll _sinf
; SAFE-NEXT: addl $12, %esp
; SAFE-NEXT: retl
%Y = call float @sinf(float %X) readonly %Y = call float @sinf(float %X) readonly
ret float %Y ret float %Y
} }
define double @test2(double %X) { define double @test2(double %X) {
; UNSAFE-LABEL: test2: ; CHECK-LABEL: test2:
; UNSAFE: ## BB#0: ; CHECK: ## BB#0:
; UNSAFE-NEXT: fldl {{[0-9]+}}(%esp) ; CHECK-NEXT: subl $12, %esp
; UNSAFE-NEXT: fsin ; CHECK-NEXT: Lcfi1:
; UNSAFE-NEXT: retl ; CHECK-NEXT: .cfi_def_cfa_offset 16
; ; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
; SAFE-LABEL: test2: ; CHECK-NEXT: fstpl (%esp)
; SAFE: ## BB#0: ; CHECK-NEXT: calll _sin
; SAFE-NEXT: subl $12, %esp ; CHECK-NEXT: addl $12, %esp
; SAFE-NEXT: Lcfi1: ; CHECK-NEXT: retl
; SAFE-NEXT: .cfi_def_cfa_offset 16
; SAFE-NEXT: fldl {{[0-9]+}}(%esp)
; SAFE-NEXT: fstpl (%esp)
; SAFE-NEXT: calll _sin
; SAFE-NEXT: addl $12, %esp
; SAFE-NEXT: retl
%Y = call double @sin(double %X) readonly %Y = call double @sin(double %X) readonly
ret double %Y ret double %Y
} }
define x86_fp80 @test3(x86_fp80 %X) { define x86_fp80 @test3(x86_fp80 %X) {
; UNSAFE-LABEL: test3: ; CHECK-LABEL: test3:
; UNSAFE: ## BB#0: ; CHECK: ## BB#0:
; UNSAFE-NEXT: fldt {{[0-9]+}}(%esp) ; CHECK-NEXT: subl $28, %esp
; UNSAFE-NEXT: fsin ; CHECK-NEXT: Lcfi2:
; UNSAFE-NEXT: retl ; CHECK-NEXT: .cfi_def_cfa_offset 32
; ; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
; SAFE-LABEL: test3: ; CHECK-NEXT: fstpt (%esp)
; SAFE: ## BB#0: ; CHECK-NEXT: calll _sinl
; SAFE-NEXT: subl $28, %esp ; CHECK-NEXT: addl $28, %esp
; SAFE-NEXT: Lcfi2: ; CHECK-NEXT: retl
; SAFE-NEXT: .cfi_def_cfa_offset 32
; SAFE-NEXT: fldt {{[0-9]+}}(%esp)
; SAFE-NEXT: fstpt (%esp)
; SAFE-NEXT: calll _sinl
; SAFE-NEXT: addl $28, %esp
; SAFE-NEXT: retl
%Y = call x86_fp80 @sinl(x86_fp80 %X) readonly %Y = call x86_fp80 @sinl(x86_fp80 %X) readonly
ret x86_fp80 %Y ret x86_fp80 %Y
} }
@ -80,64 +62,46 @@ declare x86_fp80 @cosl(x86_fp80) readonly
define float @test4(float %X) { define float @test4(float %X) {
; UNSAFE-LABEL: test4: ; CHECK-LABEL: test4:
; UNSAFE: ## BB#0: ; CHECK: ## BB#0:
; UNSAFE-NEXT: flds {{[0-9]+}}(%esp) ; CHECK-NEXT: subl $12, %esp
; UNSAFE-NEXT: fcos ; CHECK-NEXT: Lcfi3:
; UNSAFE-NEXT: retl ; CHECK-NEXT: .cfi_def_cfa_offset 16
; ; CHECK-NEXT: flds {{[0-9]+}}(%esp)
; SAFE-LABEL: test4: ; CHECK-NEXT: fstps (%esp)
; SAFE: ## BB#0: ; CHECK-NEXT: calll _cosf
; SAFE-NEXT: subl $12, %esp ; CHECK-NEXT: addl $12, %esp
; SAFE-NEXT: Lcfi3: ; CHECK-NEXT: retl
; SAFE-NEXT: .cfi_def_cfa_offset 16
; SAFE-NEXT: flds {{[0-9]+}}(%esp)
; SAFE-NEXT: fstps (%esp)
; SAFE-NEXT: calll _cosf
; SAFE-NEXT: addl $12, %esp
; SAFE-NEXT: retl
%Y = call float @cosf(float %X) readonly %Y = call float @cosf(float %X) readonly
ret float %Y ret float %Y
} }
define double @test5(double %X) { define double @test5(double %X) {
; UNSAFE-LABEL: test5: ; CHECK-LABEL: test5:
; UNSAFE: ## BB#0: ; CHECK: ## BB#0:
; UNSAFE-NEXT: fldl {{[0-9]+}}(%esp) ; CHECK-NEXT: subl $12, %esp
; UNSAFE-NEXT: fcos ; CHECK-NEXT: Lcfi4:
; UNSAFE-NEXT: retl ; CHECK-NEXT: .cfi_def_cfa_offset 16
; ; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
; SAFE-LABEL: test5: ; CHECK-NEXT: fstpl (%esp)
; SAFE: ## BB#0: ; CHECK-NEXT: calll _cos
; SAFE-NEXT: subl $12, %esp ; CHECK-NEXT: addl $12, %esp
; SAFE-NEXT: Lcfi4: ; CHECK-NEXT: retl
; SAFE-NEXT: .cfi_def_cfa_offset 16
; SAFE-NEXT: fldl {{[0-9]+}}(%esp)
; SAFE-NEXT: fstpl (%esp)
; SAFE-NEXT: calll _cos
; SAFE-NEXT: addl $12, %esp
; SAFE-NEXT: retl
%Y = call double @cos(double %X) readonly %Y = call double @cos(double %X) readonly
ret double %Y ret double %Y
} }
define x86_fp80 @test6(x86_fp80 %X) { define x86_fp80 @test6(x86_fp80 %X) {
; UNSAFE-LABEL: test6: ; CHECK-LABEL: test6:
; UNSAFE: ## BB#0: ; CHECK: ## BB#0:
; UNSAFE-NEXT: fldt {{[0-9]+}}(%esp) ; CHECK-NEXT: subl $28, %esp
; UNSAFE-NEXT: fcos ; CHECK-NEXT: Lcfi5:
; UNSAFE-NEXT: retl ; CHECK-NEXT: .cfi_def_cfa_offset 32
; ; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
; SAFE-LABEL: test6: ; CHECK-NEXT: fstpt (%esp)
; SAFE: ## BB#0: ; CHECK-NEXT: calll _cosl
; SAFE-NEXT: subl $28, %esp ; CHECK-NEXT: addl $28, %esp
; SAFE-NEXT: Lcfi5: ; CHECK-NEXT: retl
; SAFE-NEXT: .cfi_def_cfa_offset 32
; SAFE-NEXT: fldt {{[0-9]+}}(%esp)
; SAFE-NEXT: fstpt (%esp)
; SAFE-NEXT: calll _cosl
; SAFE-NEXT: addl $28, %esp
; SAFE-NEXT: retl
%Y = call x86_fp80 @cosl(x86_fp80 %X) readonly %Y = call x86_fp80 @cosl(x86_fp80 %X) readonly
ret x86_fp80 %Y ret x86_fp80 %Y
} }