forked from OSchip/llvm-project
Add a comment which should hopefully make the purpose of this method a
bit clearer. llvm-svn: 72374
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llvm/lib/CodeGen/SelectionDAG
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@ -224,6 +224,9 @@ SDValue VectorLegalizer::LegalizeOp(SDValue Op) {
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}
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SDValue VectorLegalizer::PromoteVectorOp(SDValue Op) {
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// Vector "promotion" is basically just bitcasting and doing the operation
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// in a different type. For example, x86 promotes ISD::AND on v2i32 to
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// v1i64.
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MVT VT = Op.getValueType();
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assert(Op.getNode()->getNumValues() == 1 &&
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"Can't promote a vector with multiple results!");
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