[AMDGPU] Fix codegen for inline assembly

Need to override convertConstraint to recognise amdgpu specific register names.

Differential Revision: https://reviews.llvm.org/D44533

llvm-svn: 328359
This commit is contained in:
Yaxun Liu 2018-03-23 19:43:42 +00:00
parent df5d9486aa
commit ac1263cd54
4 changed files with 27 additions and 1 deletions

View File

@ -285,6 +285,19 @@ public:
return true;
}
// \p Constraint will be left pointing at the last character of
// the constraint. In practice, it won't be changed unless the
// constraint is longer than one character.
std::string convertConstraint(const char *&Constraint) const override {
const char *Begin = Constraint;
TargetInfo::ConstraintInfo Info("", "");
if (validateAsmConstraint(Constraint, Info))
return std::string(Begin).substr(0, Constraint - Begin + 1);
Constraint = Begin;
return std::string(1, *Constraint);
}
bool
initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
StringRef CPU,

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@ -1926,7 +1926,7 @@ void CodeGenFunction::EmitAsmStmt(const AsmStmt &S) {
// Simplify the output constraint.
std::string OutputConstraint(S.getOutputConstraint(i));
OutputConstraint = SimplifyConstraint(OutputConstraint.c_str() + 1,
getTarget());
getTarget(), &OutputConstraintInfos);
const Expr *OutExpr = S.getOutputExpr(i);
OutExpr = OutExpr->IgnoreParenNoopCasts(getContext());

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@ -0,0 +1,8 @@
// REQUIRES: amdgpu-registered-target
// RUN: %clang_cc1 -emit-llvm -o - -triple amdgcn %s | FileCheck %s
kernel void test_long(int arg0) {
long v15_16;
// CHECK: tail call i64 asm sideeffect "v_lshlrev_b64 v[15:16], 0, $0", "={v[15:16]},v"(i32 %arg0)
__asm volatile("v_lshlrev_b64 v[15:16], 0, %0" : "={v[15:16]}"(v15_16) : "v"(arg0));
}

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@ -74,3 +74,8 @@ test_double(const __global double *a, const __global double *b, __global double
c[i] = ci;
}
void test_long(int arg0) {
long v15_16;
__asm volatile("v_lshlrev_b64 v[15:16], 0, %0" : "={v[15:16]}"(v15_16) : "v"(arg0));
}