From abff8fcb1cd09a2af0a9eaebe7c7f012af275109 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Sat, 15 Aug 2009 11:03:03 +0000 Subject: [PATCH] Update LocalRewriter::DistanceMap when inserting stack loads. In the included test case, a stack load was not included in DistanceMap. That caused TransferDeadness to ignore the instruction, leading to a scavenger assert. llvm-svn: 79090 --- llvm/lib/CodeGen/VirtRegRewriter.cpp | 3 +++ .../Blackfin/2009-08-15-MissingDead.ll | 25 +++++++++++++++++++ 2 files changed, 28 insertions(+) create mode 100644 llvm/test/CodeGen/Blackfin/2009-08-15-MissingDead.ll diff --git a/llvm/lib/CodeGen/VirtRegRewriter.cpp b/llvm/lib/CodeGen/VirtRegRewriter.cpp index b34d43a1f5d0..3e651a57cfe6 100644 --- a/llvm/lib/CodeGen/VirtRegRewriter.cpp +++ b/llvm/lib/CodeGen/VirtRegRewriter.cpp @@ -1587,6 +1587,7 @@ private: MachineInstr *LoadMI = prior(InsertLoc); VRM.addSpillSlotUse(SS, LoadMI); ++NumPSpills; + DistanceMap.insert(std::make_pair(LoadMI, Dist++)); } NextMII = next(MII); } @@ -1678,6 +1679,7 @@ private: MachineInstr *LoadMI = prior(InsertLoc); VRM.addSpillSlotUse(SSorRMId, LoadMI); ++NumLoads; + DistanceMap.insert(std::make_pair(LoadMI, Dist++)); } // This invalidates Phys. @@ -1977,6 +1979,7 @@ private: MachineInstr *LoadMI = prior(InsertLoc); VRM.addSpillSlotUse(SSorRMId, LoadMI); ++NumLoads; + DistanceMap.insert(std::make_pair(LoadMI, Dist++)); } // This invalidates PhysReg. Spills.ClobberPhysReg(PhysReg); diff --git a/llvm/test/CodeGen/Blackfin/2009-08-15-MissingDead.ll b/llvm/test/CodeGen/Blackfin/2009-08-15-MissingDead.ll new file mode 100644 index 000000000000..656cd337aa4d --- /dev/null +++ b/llvm/test/CodeGen/Blackfin/2009-08-15-MissingDead.ll @@ -0,0 +1,25 @@ +; RUN: llvm-as < %s | llc -march=bfin -verify-machineinstrs + +; LocalRewriter can forget to transfer a flag when setting up call +; argument registers. This then causes register scavenger asserts. + +declare i32 @printf(i8*, i32, float) + +define i32 @testissue(i32 %i, float %x, float %y) { + br label %bb1 + +bb1: ; preds = %bb1, %0 + %x2 = fmul float %x, 5.000000e-01 ; [#uses=1] + %y2 = fmul float %y, 0x3FECCCCCC0000000 ; [#uses=1] + %z2 = fadd float %x2, %y2 ; [#uses=1] + %z3 = fadd float undef, %z2 ; [#uses=1] + %i1 = shl i32 %i, 3 ; [#uses=1] + %j1 = add i32 %i, 7 ; [#uses=1] + %m1 = add i32 %i1, %j1 ; [#uses=2] + %b = icmp sle i32 %m1, 6 ; [#uses=1] + br i1 %b, label %bb1, label %bb2 + +bb2: ; preds = %bb1 + %1 = call i32 @printf(i8* undef, i32 %m1, float %z3); [#uses=0] + ret i32 0 +}