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Remove the obsolete offset parameter from @llvm.dbg.value 

There is no situation where this rarely-used argument cannot be
substituted with a DIExpression and removing it allows us to simplify
the DWARF backend. Note that this patch does not yet remove any of
the newly dead code.

rdar://problem/33580047
Differential Revision: https://reviews.llvm.org/D35951

llvm-svn: 309426
This commit is contained in:
Adrian Prantl 2017-07-28 20:21:02 +00:00
parent e109655c90
commit abe04759a6
173 changed files with 713 additions and 680 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
llvm/docs/LangRef.rst
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@ -4018,7 +4018,7 @@ function is using two metadata arguments:
.. code-block:: llvm .. code-block:: llvm
call void @llvm.dbg.value(metadata !24, i64 0, metadata !25) call void @llvm.dbg.value(metadata !24, metadata !25, metadata !26)
Metadata can be attached to an instruction. Here metadata ``!21`` is attached Metadata can be attached to an instruction. Here metadata ``!21`` is attached
to the ``add`` instruction using the ``!dbg`` identifier: to the ``add`` instruction using the ``!dbg`` identifier:

11
llvm/docs/SourceLevelDebugging.rst
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@ -207,14 +207,13 @@ description of the variable. The third argument is a `complex expression
.. code-block:: llvm .. code-block:: llvm
void @llvm.dbg.value(metadata, i64, metadata, metadata) void @llvm.dbg.value(metadata, metadata, metadata)
This intrinsic provides information when a user source variable is set to a new This intrinsic provides information when a user source variable is set to a new
value. The first argument is the new value (wrapped as metadata). The second value. The first argument is the new value (wrapped as metadata). The third
argument is the offset in the user source variable where the new value is argument is a `local variable <LangRef.html#dilocalvariable>`_ containing a
written. The third argument is a `local variable description of the variable. The fourth argument is a `complex expression
<LangRef.html#dilocalvariable>`_ containing a description of the variable. The <LangRef.html#diexpression>`_.
fourth argument is a `complex expression <LangRef.html#diexpression>`_.
Object lifetimes and scoping Object lifetimes and scoping
============================ ============================

6
llvm/include/llvm/IR/DIBuilder.h
View File

@ -729,12 +729,11 @@ namespace llvm {
/// Insert a new llvm.dbg.value intrinsic call. /// Insert a new llvm.dbg.value intrinsic call.
/// \param Val llvm::Value of the variable /// \param Val llvm::Value of the variable
/// \param Offset Offset
/// \param VarInfo Variable's debug info descriptor. /// \param VarInfo Variable's debug info descriptor.
/// \param Expr A complex location expression. /// \param Expr A complex location expression.
/// \param DL Debug info location. /// \param DL Debug info location.
/// \param InsertAtEnd Location for the new intrinsic. /// \param InsertAtEnd Location for the new intrinsic.
Instruction *insertDbgValueIntrinsic(llvm::Value *Val, uint64_t Offset, Instruction *insertDbgValueIntrinsic(llvm::Value *Val,
DILocalVariable *VarInfo, DILocalVariable *VarInfo,
DIExpression *Expr, DIExpression *Expr,
const DILocation *DL, const DILocation *DL,
@ -742,12 +741,11 @@ namespace llvm {
/// Insert a new llvm.dbg.value intrinsic call. /// Insert a new llvm.dbg.value intrinsic call.
/// \param Val llvm::Value of the variable /// \param Val llvm::Value of the variable
/// \param Offset Offset
/// \param VarInfo Variable's debug info descriptor. /// \param VarInfo Variable's debug info descriptor.
/// \param Expr A complex location expression. /// \param Expr A complex location expression.
/// \param DL Debug info location. /// \param DL Debug info location.
/// \param InsertBefore Location for the new intrinsic. /// \param InsertBefore Location for the new intrinsic.
Instruction *insertDbgValueIntrinsic(llvm::Value *Val, uint64_t Offset, Instruction *insertDbgValueIntrinsic(llvm::Value *Val,
DILocalVariable *VarInfo, DILocalVariable *VarInfo,
DIExpression *Expr, DIExpression *Expr,
const DILocation *DL, const DILocation *DL,

9
llvm/include/llvm/IR/IntrinsicInst.h
View File

@ -122,11 +122,6 @@ namespace llvm {
return getVariableLocation(/* AllowNullOp = */ false); return getVariableLocation(/* AllowNullOp = */ false);
} }
uint64_t getOffset() const {
return cast<ConstantInt>(
const_cast<Value*>(getArgOperand(1)))->getZExtValue();
}
DILocalVariable *getVariable() const { DILocalVariable *getVariable() const {
return cast<DILocalVariable>(getRawVariable()); return cast<DILocalVariable>(getRawVariable());
} }
@ -136,11 +131,11 @@ namespace llvm {
} }
Metadata *getRawVariable() const { Metadata *getRawVariable() const {
return cast<MetadataAsValue>(getArgOperand(2))->getMetadata(); return cast<MetadataAsValue>(getArgOperand(1))->getMetadata();
} }
Metadata *getRawExpression() const { Metadata *getRawExpression() const {
return cast<MetadataAsValue>(getArgOperand(3))->getMetadata(); return cast<MetadataAsValue>(getArgOperand(2))->getMetadata();
} }
// Methods for support type inquiry through isa, cast, and dyn_cast: // Methods for support type inquiry through isa, cast, and dyn_cast:

2
llvm/include/llvm/IR/Intrinsics.td
View File

@ -579,7 +579,7 @@ let IntrProperties = [IntrNoMem, IntrSpeculatable] in {
llvm_metadata_ty, llvm_metadata_ty,
llvm_metadata_ty]>; llvm_metadata_ty]>;
def int_dbg_value : Intrinsic<[], def int_dbg_value : Intrinsic<[],
[llvm_metadata_ty, llvm_i64_ty, [llvm_metadata_ty,
llvm_metadata_ty, llvm_metadata_ty,
llvm_metadata_ty]>; llvm_metadata_ty]>;
} }

11
llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
View File

@ -682,10 +682,10 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
if (!V) { if (!V) {
// Currently the optimizer can produce this; insert an undef to // Currently the optimizer can produce this; insert an undef to
// help debugging. Probably the optimizer should not do this. // help debugging. Probably the optimizer should not do this.
MIRBuilder.buildIndirectDbgValue(0, DI.getOffset(), DI.getVariable(), MIRBuilder.buildIndirectDbgValue(0, 0, DI.getVariable(),
DI.getExpression()); DI.getExpression());
} else if (const auto *CI = dyn_cast<Constant>(V)) { } else if (const auto *CI = dyn_cast<Constant>(V)) {
MIRBuilder.buildConstDbgValue(*CI, DI.getOffset(), DI.getVariable(), MIRBuilder.buildConstDbgValue(*CI, 0, DI.getVariable(),
DI.getExpression()); DI.getExpression());
} else { } else {
unsigned Reg = getOrCreateVReg(*V); unsigned Reg = getOrCreateVReg(*V);
@ -693,12 +693,7 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
// direct/indirect thing shouldn't really be handled by something as // direct/indirect thing shouldn't really be handled by something as
// implicit as reg+noreg vs reg+imm in the first palce, but it seems // implicit as reg+noreg vs reg+imm in the first palce, but it seems
// pretty baked in right now. // pretty baked in right now.
if (DI.getOffset() != 0) MIRBuilder.buildDirectDbgValue(Reg, DI.getVariable(), DI.getExpression());
MIRBuilder.buildIndirectDbgValue(Reg, DI.getOffset(), DI.getVariable(),
DI.getExpression());
else
MIRBuilder.buildDirectDbgValue(Reg, DI.getVariable(),
DI.getExpression());
} }
return true; return true;
} }

14
llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
View File

@ -1214,33 +1214,33 @@ bool FastISel::selectIntrinsicCall(const IntrinsicInst *II) {
// help debugging. Probably the optimizer should not do this. // help debugging. Probably the optimizer should not do this.
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II) BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
.addReg(0U) .addReg(0U)
.addImm(DI->getOffset()) .addImm(0U)
.addMetadata(DI->getVariable()) .addMetadata(DI->getVariable())
.addMetadata(DI->getExpression()); .addMetadata(DI->getExpression());
} else if (const auto *CI = dyn_cast<ConstantInt>(V)) { } else if (const auto *CI = dyn_cast<ConstantInt>(V)) {
if (CI->getBitWidth() > 64) if (CI->getBitWidth() > 64)
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II) BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
.addCImm(CI) .addCImm(CI)
.addImm(DI->getOffset()) .addImm(0U)
.addMetadata(DI->getVariable()) .addMetadata(DI->getVariable())
.addMetadata(DI->getExpression()); .addMetadata(DI->getExpression());
else else
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II) BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
.addImm(CI->getZExtValue()) .addImm(CI->getZExtValue())
.addImm(DI->getOffset()) .addImm(0U)
.addMetadata(DI->getVariable()) .addMetadata(DI->getVariable())
.addMetadata(DI->getExpression()); .addMetadata(DI->getExpression());
} else if (const auto *CF = dyn_cast<ConstantFP>(V)) { } else if (const auto *CF = dyn_cast<ConstantFP>(V)) {
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II) BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
.addFPImm(CF) .addFPImm(CF)
.addImm(DI->getOffset()) .addImm(0U)
.addMetadata(DI->getVariable()) .addMetadata(DI->getVariable())
.addMetadata(DI->getExpression()); .addMetadata(DI->getExpression());
} else if (unsigned Reg = lookUpRegForValue(V)) { } else if (unsigned Reg = lookUpRegForValue(V)) {
// FIXME: This does not handle register-indirect values at offset 0. // FIXME: This does not handle register-indirect values at offset 0.
bool IsIndirect = DI->getOffset() != 0; bool IsIndirect = false;
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, IsIndirect, Reg, BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, IsIndirect, Reg, 0,
DI->getOffset(), DI->getVariable(), DI->getExpression()); DI->getVariable(), DI->getExpression());
} else { } else {
// We can't yet handle anything else here because it would require // We can't yet handle anything else here because it would require
// generating code, thus altering codegen because of debug info. // generating code, thus altering codegen because of debug info.

4
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
View File

@ -1004,7 +1004,7 @@ void SelectionDAGBuilder::resolveDanglingDebugInfo(const Value *V,
DIExpression *Expr = DI->getExpression(); DIExpression *Expr = DI->getExpression();
assert(Variable->isValidLocationForIntrinsic(dl) && assert(Variable->isValidLocationForIntrinsic(dl) &&
"Expected inlined-at fields to agree"); "Expected inlined-at fields to agree");
uint64_t Offset = DI->getOffset(); uint64_t Offset = 0;
SDDbgValue *SDV; SDDbgValue *SDV;
if (Val.getNode()) { if (Val.getNode()) {
if (!EmitFuncArgumentDbgValue(V, Variable, Expr, dl, Offset, false, if (!EmitFuncArgumentDbgValue(V, Variable, Expr, dl, Offset, false,
@ -5139,7 +5139,7 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
DILocalVariable *Variable = DI.getVariable(); DILocalVariable *Variable = DI.getVariable();
DIExpression *Expression = DI.getExpression(); DIExpression *Expression = DI.getExpression();
uint64_t Offset = DI.getOffset(); uint64_t Offset = 0;
const Value *V = DI.getValue(); const Value *V = DI.getValue();
if (!V) if (!V)
return nullptr; return nullptr;

22
llvm/lib/IR/AutoUpgrade.cpp
View File

@ -420,6 +420,14 @@ static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) {
} }
break; break;
} }
case 'd': {
if (Name == "dbg.value" && F->arg_size() == 4) {
rename(F);
NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::dbg_value);
return true;
}
break;
}
case 'i': case 'i':
case 'l': { case 'l': {
bool IsLifetimeStart = Name.startswith("lifetime.start"); bool IsLifetimeStart = Name.startswith("lifetime.start");
@ -2055,6 +2063,20 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)});
break; break;
case Intrinsic::dbg_value:
// Upgrade from the old version that had an extra offset argument.
assert(CI->getNumArgOperands() == 4);
// Drop nonzero offsets instead of attempting to upgrade them.
if (auto *Offset = dyn_cast_or_null<Constant>(CI->getArgOperand(1)))
if (Offset->isZeroValue()) {
NewCall = Builder.CreateCall(
NewFn,
{CI->getArgOperand(0), CI->getArgOperand(2), CI->getArgOperand(3)});
break;
}
CI->eraseFromParent();
return;
case Intrinsic::x86_xop_vfrcz_ss: case Intrinsic::x86_xop_vfrcz_ss:
case Intrinsic::x86_xop_vfrcz_sd: case Intrinsic::x86_xop_vfrcz_sd:
NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(1)}); NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(1)});

6
llvm/lib/IR/DIBuilder.cpp
View File

@ -823,7 +823,7 @@ Instruction *DIBuilder::insertDeclare(Value *Storage, DILocalVariable *VarInfo,
return withDebugLoc(CallInst::Create(DeclareFn, Args, "", InsertAtEnd), DL); return withDebugLoc(CallInst::Create(DeclareFn, Args, "", InsertAtEnd), DL);
} }
Instruction *DIBuilder::insertDbgValueIntrinsic(Value *V, uint64_t Offset, Instruction *DIBuilder::insertDbgValueIntrinsic(Value *V,
DILocalVariable *VarInfo, DILocalVariable *VarInfo,
DIExpression *Expr, DIExpression *Expr,
const DILocation *DL, const DILocation *DL,
@ -840,13 +840,12 @@ Instruction *DIBuilder::insertDbgValueIntrinsic(Value *V, uint64_t Offset,
trackIfUnresolved(VarInfo); trackIfUnresolved(VarInfo);
trackIfUnresolved(Expr); trackIfUnresolved(Expr);
Value *Args[] = {getDbgIntrinsicValueImpl(VMContext, V), Value *Args[] = {getDbgIntrinsicValueImpl(VMContext, V),
ConstantInt::get(Type::getInt64Ty(VMContext), Offset),
MetadataAsValue::get(VMContext, VarInfo), MetadataAsValue::get(VMContext, VarInfo),
MetadataAsValue::get(VMContext, Expr)}; MetadataAsValue::get(VMContext, Expr)};
return withDebugLoc(CallInst::Create(ValueFn, Args, "", InsertBefore), DL); return withDebugLoc(CallInst::Create(ValueFn, Args, "", InsertBefore), DL);
} }
Instruction *DIBuilder::insertDbgValueIntrinsic(Value *V, uint64_t Offset, Instruction *DIBuilder::insertDbgValueIntrinsic(Value *V,
DILocalVariable *VarInfo, DILocalVariable *VarInfo,
DIExpression *Expr, DIExpression *Expr,
const DILocation *DL, const DILocation *DL,
@ -863,7 +862,6 @@ Instruction *DIBuilder::insertDbgValueIntrinsic(Value *V, uint64_t Offset,
trackIfUnresolved(VarInfo); trackIfUnresolved(VarInfo);
trackIfUnresolved(Expr); trackIfUnresolved(Expr);
Value *Args[] = {getDbgIntrinsicValueImpl(VMContext, V), Value *Args[] = {getDbgIntrinsicValueImpl(VMContext, V),
ConstantInt::get(Type::getInt64Ty(VMContext), Offset),
MetadataAsValue::get(VMContext, VarInfo), MetadataAsValue::get(VMContext, VarInfo),
MetadataAsValue::get(VMContext, Expr)}; MetadataAsValue::get(VMContext, Expr)};

17
llvm/lib/Transforms/Utils/Local.cpp
View File

@ -1073,7 +1073,6 @@ static bool LdStHasDebugValue(DILocalVariable *DIVar, DIExpression *DIExpr,
--PrevI; --PrevI;
if (DbgValueInst *DVI = dyn_cast<DbgValueInst>(PrevI)) if (DbgValueInst *DVI = dyn_cast<DbgValueInst>(PrevI))
if (DVI->getValue() == I->getOperand(0) && if (DVI->getValue() == I->getOperand(0) &&
DVI->getOffset() == 0 &&
DVI->getVariable() == DIVar && DVI->getVariable() == DIVar &&
DVI->getExpression() == DIExpr) DVI->getExpression() == DIExpr)
return true; return true;
@ -1092,7 +1091,6 @@ static bool PhiHasDebugValue(DILocalVariable *DIVar,
findDbgValues(DbgValues, APN); findDbgValues(DbgValues, APN);
for (auto *DVI : DbgValues) { for (auto *DVI : DbgValues) {
assert(DVI->getValue() == APN); assert(DVI->getValue() == APN);
assert(DVI->getOffset() == 0);
if ((DVI->getVariable() == DIVar) && (DVI->getExpression() == DIExpr)) if ((DVI->getVariable() == DIVar) && (DVI->getExpression() == DIExpr))
return true; return true;
} }
@ -1136,7 +1134,7 @@ void llvm::ConvertDebugDeclareToDebugValue(DbgDeclareInst *DDI,
DV = ExtendedArg; DV = ExtendedArg;
} }
if (!LdStHasDebugValue(DIVar, DIExpr, SI)) if (!LdStHasDebugValue(DIVar, DIExpr, SI))
Builder.insertDbgValueIntrinsic(DV, 0, DIVar, DIExpr, DDI->getDebugLoc(), Builder.insertDbgValueIntrinsic(DV, DIVar, DIExpr, DDI->getDebugLoc(),
SI); SI);
} }
@ -1156,7 +1154,7 @@ void llvm::ConvertDebugDeclareToDebugValue(DbgDeclareInst *DDI,
// preferable to keep tracking both the loaded value and the original // preferable to keep tracking both the loaded value and the original
// address in case the alloca can not be elided. // address in case the alloca can not be elided.
Instruction *DbgValue = Builder.insertDbgValueIntrinsic( Instruction *DbgValue = Builder.insertDbgValueIntrinsic(
LI, 0, DIVar, DIExpr, DDI->getDebugLoc(), (Instruction *)nullptr); LI, DIVar, DIExpr, DDI->getDebugLoc(), (Instruction *)nullptr);
DbgValue->insertAfter(LI); DbgValue->insertAfter(LI);
} }
@ -1178,7 +1176,7 @@ void llvm::ConvertDebugDeclareToDebugValue(DbgDeclareInst *DDI,
// insertion point. // insertion point.
// FIXME: Insert dbg.value markers in the successors when appropriate. // FIXME: Insert dbg.value markers in the successors when appropriate.
if (InsertionPt != BB->end()) if (InsertionPt != BB->end())
Builder.insertDbgValueIntrinsic(APN, 0, DIVar, DIExpr, DDI->getDebugLoc(), Builder.insertDbgValueIntrinsic(APN, DIVar, DIExpr, DDI->getDebugLoc(),
&*InsertionPt); &*InsertionPt);
} }
@ -1222,7 +1220,7 @@ bool llvm::LowerDbgDeclare(Function &F) {
// This is a call by-value or some other instruction that // This is a call by-value or some other instruction that
// takes a pointer to the variable. Insert a *value* // takes a pointer to the variable. Insert a *value*
// intrinsic that describes the alloca. // intrinsic that describes the alloca.
DIB.insertDbgValueIntrinsic(AI, 0, DDI->getVariable(), DIB.insertDbgValueIntrinsic(AI, DDI->getVariable(),
DDI->getExpression(), DDI->getDebugLoc(), DDI->getExpression(), DDI->getDebugLoc(),
CI); CI);
} }
@ -1302,8 +1300,7 @@ static void replaceOneDbgValueForAlloca(DbgValueInst *DVI, Value *NewAddress,
DIExpr = Builder.createExpression(Ops); DIExpr = Builder.createExpression(Ops);
} }
Builder.insertDbgValueIntrinsic(NewAddress, DVI->getOffset(), DIVar, DIExpr, Builder.insertDbgValueIntrinsic(NewAddress, DIVar, DIExpr, Loc, DVI);
Loc, DVI);
DVI->eraseFromParent(); DVI->eraseFromParent();
} }
@ -1351,7 +1348,7 @@ void llvm::salvageDebugInfo(Instruction &I) {
Offset.getSExtValue(), Offset.getSExtValue(),
DIExpression::WithStackValue); DIExpression::WithStackValue);
DVI->setOperand(0, MDWrap(I.getOperand(0))); DVI->setOperand(0, MDWrap(I.getOperand(0)));
DVI->setOperand(3, MetadataAsValue::get(I.getContext(), DIExpr)); DVI->setOperand(2, MetadataAsValue::get(I.getContext(), DIExpr));
DEBUG(dbgs() << "SALVAGE: " << *DVI << '\n'); DEBUG(dbgs() << "SALVAGE: " << *DVI << '\n');
} }
} }
@ -1363,7 +1360,7 @@ void llvm::salvageDebugInfo(Instruction &I) {
DIBuilder DIB(M, /*AllowUnresolved*/ false); DIBuilder DIB(M, /*AllowUnresolved*/ false);
DIExpr = DIExpression::prepend(DIExpr, DIExpression::WithDeref); DIExpr = DIExpression::prepend(DIExpr, DIExpression::WithDeref);
DVI->setOperand(0, MDWrap(I.getOperand(0))); DVI->setOperand(0, MDWrap(I.getOperand(0)));
DVI->setOperand(3, MetadataAsValue::get(I.getContext(), DIExpr)); DVI->setOperand(2, MetadataAsValue::get(I.getContext(), DIExpr));
DEBUG(dbgs() << "SALVAGE: " << *DVI << '\n'); DEBUG(dbgs() << "SALVAGE: " << *DVI << '\n');
} }
} }

32
llvm/test/Bitcode/upgrade-dbg-value.ll Normal file
View File

@ -0,0 +1,32 @@
; Test upgrade of dbg.dvalue intrinsics with offsets.
;
; RUN: llvm-dis < %s.bc | FileCheck %s
; RUN: verify-uselistorder < %s.bc
define void @f() !dbg !3 {
entry:
; CHECK-NOT: call void @llvm.dbg.value
; CHECK: call void @llvm.dbg.value(metadata i32 42, metadata !8, metadata !9), !dbg !10
call void @llvm.dbg.value(metadata i32 42, i64 0, metadata !8, metadata !9), !dbg !10
; CHECK-NOT: call void @llvm.dbg.value
call void @llvm.dbg.value(metadata i32 0, i64 1, metadata !8, metadata !9), !dbg !10
ret void
}
; CHECK: declare void @llvm.dbg.value(metadata, metadata, metadata)
declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!2}
!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "llc r309174", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug)
!1 = !DIFile(filename: "a.c", directory: "/")
!2 = !{i32 1, !"Debug Info Version", i32 3}
!3 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 1, type: !4, isLocal: false, isDefinition: true, isOptimized: false, unit: !0, variables: !7)
!4 = !DISubroutineType(types: !5)
!5 = !{!6}
!6 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
!7 = !{!8}
!8 = !DILocalVariable(name: "i", scope: !3, file: !1, line: 2, type: !6)
!9 = !DIExpression()
!10 = !DILocation(line: 2, scope: !3)

BIN
llvm/test/Bitcode/upgrade-dbg-value.ll.bc Normal file
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Binary file not shown.

4
llvm/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll
View File

@ -5,12 +5,12 @@ target triple = "armv4t-apple-darwin10"
define hidden i32 @__addvsi3(i32 %a, i32 %b) nounwind { define hidden i32 @__addvsi3(i32 %a, i32 %b) nounwind {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 %b, i64 0, metadata !0, metadata !DIExpression()), !dbg !DILocation(scope: !1) tail call void @llvm.dbg.value(metadata i32 %b, metadata !0, metadata !DIExpression()), !dbg !DILocation(scope: !1)
%0 = add nsw i32 %b, %a, !dbg !9 ; <i32> [#uses=1] %0 = add nsw i32 %b, %a, !dbg !9 ; <i32> [#uses=1]
ret i32 %0, !dbg !11 ret i32 %0, !dbg !11
} }
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!3} !llvm.dbg.cu = !{!3}
!llvm.module.flags = !{!15} !llvm.module.flags = !{!15}

10
llvm/test/CodeGen/ARM/2010-06-25-Thumb2ITInvalidIterator.ll
View File

@ -9,16 +9,16 @@ target triple = "thumbv7-apple-darwin3.0.0-iphoneos"
; Function Attrs: nounwind optsize ; Function Attrs: nounwind optsize
define void @x0(i8* nocapture %buf, i32 %nbytes) #0 { define void @x0(i8* nocapture %buf, i32 %nbytes) #0 {
entry: entry:
tail call void @llvm.dbg.value(metadata i8* %buf, i64 0, metadata !8, metadata !14), !dbg !15 tail call void @llvm.dbg.value(metadata i8* %buf, metadata !8, metadata !14), !dbg !15
tail call void @llvm.dbg.value(metadata i32 %nbytes, i64 0, metadata !16, metadata !14), !dbg !18 tail call void @llvm.dbg.value(metadata i32 %nbytes, metadata !16, metadata !14), !dbg !18
%tmp = load i32, i32* @length, !dbg !19 %tmp = load i32, i32* @length, !dbg !19
%cmp = icmp eq i32 %tmp, -1, !dbg !19 %cmp = icmp eq i32 %tmp, -1, !dbg !19
%cmp.not = xor i1 %cmp, true %cmp.not = xor i1 %cmp, true
%cmp3 = icmp ult i32 %tmp, %nbytes, !dbg !19 %cmp3 = icmp ult i32 %tmp, %nbytes, !dbg !19
%or.cond = and i1 %cmp.not, %cmp3 %or.cond = and i1 %cmp.not, %cmp3
tail call void @llvm.dbg.value(metadata i32 %tmp, i64 0, metadata !16, metadata !14), !dbg !19 tail call void @llvm.dbg.value(metadata i32 %tmp, metadata !16, metadata !14), !dbg !19
%nbytes.addr.0 = select i1 %or.cond, i32 %tmp, i32 %nbytes %nbytes.addr.0 = select i1 %or.cond, i32 %tmp, i32 %nbytes
tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !21, metadata !14), !dbg !22 tail call void @llvm.dbg.value(metadata i32 0, metadata !21, metadata !14), !dbg !22
br label %while.cond, !dbg !23 br label %while.cond, !dbg !23
while.cond: ; preds = %while.body, %entry while.cond: ; preds = %while.body, %entry
@ -47,7 +47,7 @@ while.end: ; preds = %land.rhs, %while.co
declare i32 @x1() #1 declare i32 @x1() #1
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { nounwind optsize } attributes #0 = { nounwind optsize }
attributes #1 = { optsize } attributes #1 = { optsize }

10
llvm/test/CodeGen/ARM/2010-08-04-StackVariable.ll
View File

@ -9,8 +9,8 @@ target triple = "arm-apple-darwin"
define i32 @_Z3fooi4SVal(i32 %i, %struct.SVal* noalias %location) nounwind ssp !dbg !17 { define i32 @_Z3fooi4SVal(i32 %i, %struct.SVal* noalias %location) nounwind ssp !dbg !17 {
entry: entry:
%"alloca point" = bitcast i32 0 to i32 %"alloca point" = bitcast i32 0 to i32
call void @llvm.dbg.value(metadata i32 %i, i64 0, metadata !23, metadata !DIExpression()), !dbg !24 call void @llvm.dbg.value(metadata i32 %i, metadata !23, metadata !DIExpression()), !dbg !24
call void @llvm.dbg.value(metadata %struct.SVal* %location, i64 0, metadata !25, metadata !DIExpression()), !dbg !24 call void @llvm.dbg.value(metadata %struct.SVal* %location, metadata !25, metadata !DIExpression()), !dbg !24
%0 = icmp ne i32 %i, 0, !dbg !27 %0 = icmp ne i32 %i, 0, !dbg !27
br i1 %0, label %bb, label %bb1, !dbg !27 br i1 %0, label %bb, label %bb1, !dbg !27
@ -37,7 +37,7 @@ return:
define linkonce_odr void @_ZN4SValC1Ev(%struct.SVal* %this) nounwind ssp align 2 !dbg !16 { define linkonce_odr void @_ZN4SValC1Ev(%struct.SVal* %this) nounwind ssp align 2 !dbg !16 {
entry: entry:
%"alloca point" = bitcast i32 0 to i32 %"alloca point" = bitcast i32 0 to i32
call void @llvm.dbg.value(metadata %struct.SVal* %this, i64 0, metadata !31, metadata !DIExpression()), !dbg !34 call void @llvm.dbg.value(metadata %struct.SVal* %this, metadata !31, metadata !DIExpression()), !dbg !34
%0 = getelementptr inbounds %struct.SVal, %struct.SVal* %this, i32 0, i32 0, !dbg !34 %0 = getelementptr inbounds %struct.SVal, %struct.SVal* %this, i32 0, i32 0, !dbg !34
store i8* null, i8** %0, align 8, !dbg !34 store i8* null, i8** %0, align 8, !dbg !34
%1 = getelementptr inbounds %struct.SVal, %struct.SVal* %this, i32 0, i32 1, !dbg !34 %1 = getelementptr inbounds %struct.SVal, %struct.SVal* %this, i32 0, i32 1, !dbg !34
@ -68,14 +68,14 @@ entry:
%7 = load i32, i32* %6, align 8, !dbg !43 %7 = load i32, i32* %6, align 8, !dbg !43
store i32 %7, i32* %5, align 8, !dbg !43 store i32 %7, i32* %5, align 8, !dbg !43
%8 = call i32 @_Z3fooi4SVal(i32 2, %struct.SVal* noalias %0) nounwind, !dbg !43 %8 = call i32 @_Z3fooi4SVal(i32 2, %struct.SVal* noalias %0) nounwind, !dbg !43
call void @llvm.dbg.value(metadata i32 %8, i64 0, metadata !44, metadata !DIExpression()), !dbg !43 call void @llvm.dbg.value(metadata i32 %8, metadata !44, metadata !DIExpression()), !dbg !43
br label %return, !dbg !45 br label %return, !dbg !45
return: return:
ret i32 0, !dbg !45 ret i32 0, !dbg !45
} }
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!3} !llvm.dbg.cu = !{!3}
!llvm.module.flags = !{!49} !llvm.module.flags = !{!49}

22
llvm/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll
View File

@ -31,22 +31,22 @@ target triple = "thumbv7-apple-darwin10"
; Function Attrs: nounwind optsize ; Function Attrs: nounwind optsize
define zeroext i8 @get1(i8 zeroext %a) #0 !dbg !16 { define zeroext i8 @get1(i8 zeroext %a) #0 !dbg !16 {
entry: entry:
tail call void @llvm.dbg.value(metadata i8 %a, i64 0, metadata !20, metadata !23), !dbg !24 tail call void @llvm.dbg.value(metadata i8 %a, metadata !20, metadata !23), !dbg !24
%0 = load i8, i8* @x1, align 4, !dbg !24 %0 = load i8, i8* @x1, align 4, !dbg !24
tail call void @llvm.dbg.value(metadata i8 %0, i64 0, metadata !21, metadata !23), !dbg !24 tail call void @llvm.dbg.value(metadata i8 %0, metadata !21, metadata !23), !dbg !24
store i8 %a, i8* @x1, align 4, !dbg !24 store i8 %a, i8* @x1, align 4, !dbg !24
ret i8 %0, !dbg !25 ret i8 %0, !dbg !25
} }
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
; Function Attrs: nounwind optsize ; Function Attrs: nounwind optsize
define zeroext i8 @get2(i8 zeroext %a) #0 !dbg !26 { define zeroext i8 @get2(i8 zeroext %a) #0 !dbg !26 {
entry: entry:
tail call void @llvm.dbg.value(metadata i8 %a, i64 0, metadata !28, metadata !23), !dbg !31 tail call void @llvm.dbg.value(metadata i8 %a, metadata !28, metadata !23), !dbg !31
%0 = load i8, i8* @x2, align 4, !dbg !31 %0 = load i8, i8* @x2, align 4, !dbg !31
tail call void @llvm.dbg.value(metadata i8 %0, i64 0, metadata !29, metadata !23), !dbg !31 tail call void @llvm.dbg.value(metadata i8 %0, metadata !29, metadata !23), !dbg !31
store i8 %a, i8* @x2, align 4, !dbg !31 store i8 %a, i8* @x2, align 4, !dbg !31
ret i8 %0, !dbg !32 ret i8 %0, !dbg !32
} }
@ -55,9 +55,9 @@ entry:
define zeroext i8 @get3(i8 zeroext %a) #0 !dbg !33 { define zeroext i8 @get3(i8 zeroext %a) #0 !dbg !33 {
entry: entry:
tail call void @llvm.dbg.value(metadata i8 %a, i64 0, metadata !35, metadata !23), !dbg !38 tail call void @llvm.dbg.value(metadata i8 %a, metadata !35, metadata !23), !dbg !38
%0 = load i8, i8* @x3, align 4, !dbg !38 %0 = load i8, i8* @x3, align 4, !dbg !38
tail call void @llvm.dbg.value(metadata i8 %0, i64 0, metadata !36, metadata !23), !dbg !38 tail call void @llvm.dbg.value(metadata i8 %0, metadata !36, metadata !23), !dbg !38
store i8 %a, i8* @x3, align 4, !dbg !38 store i8 %a, i8* @x3, align 4, !dbg !38
ret i8 %0, !dbg !39 ret i8 %0, !dbg !39
} }
@ -66,9 +66,9 @@ entry:
define zeroext i8 @get4(i8 zeroext %a) #0 !dbg !40 { define zeroext i8 @get4(i8 zeroext %a) #0 !dbg !40 {
entry: entry:
tail call void @llvm.dbg.value(metadata i8 %a, i64 0, metadata !42, metadata !23), !dbg !45 tail call void @llvm.dbg.value(metadata i8 %a, metadata !42, metadata !23), !dbg !45
%0 = load i8, i8* @x4, align 4, !dbg !45 %0 = load i8, i8* @x4, align 4, !dbg !45
tail call void @llvm.dbg.value(metadata i8 %0, i64 0, metadata !43, metadata !23), !dbg !45 tail call void @llvm.dbg.value(metadata i8 %0, metadata !43, metadata !23), !dbg !45
store i8 %a, i8* @x4, align 4, !dbg !45 store i8 %a, i8* @x4, align 4, !dbg !45
ret i8 %0, !dbg !46 ret i8 %0, !dbg !46
} }
@ -77,9 +77,9 @@ entry:
define zeroext i8 @get5(i8 zeroext %a) #0 !dbg !47 { define zeroext i8 @get5(i8 zeroext %a) #0 !dbg !47 {
entry: entry:
tail call void @llvm.dbg.value(metadata i8 %a, i64 0, metadata !49, metadata !23), !dbg !52 tail call void @llvm.dbg.value(metadata i8 %a, metadata !49, metadata !23), !dbg !52
%0 = load i8, i8* @x5, align 4, !dbg !52 %0 = load i8, i8* @x5, align 4, !dbg !52
tail call void @llvm.dbg.value(metadata i8 %0, i64 0, metadata !50, metadata !23), !dbg !52 tail call void @llvm.dbg.value(metadata i8 %0, metadata !50, metadata !23), !dbg !52
store i8 %a, i8* @x5, align 4, !dbg !52 store i8 %a, i8* @x5, align 4, !dbg !52
ret i8 %0, !dbg !53 ret i8 %0, !dbg !53
} }

22
llvm/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll
View File

@ -31,9 +31,9 @@ target triple = "thumbv7-apple-macosx10.7.0"
; Function Attrs: nounwind optsize ssp ; Function Attrs: nounwind optsize ssp
define i32 @get1(i32 %a) #0 !dbg !10 { define i32 @get1(i32 %a) #0 !dbg !10 {
tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !14, metadata !17), !dbg !18 tail call void @llvm.dbg.value(metadata i32 %a, metadata !14, metadata !17), !dbg !18
%1 = load i32, i32* @x1, align 4, !dbg !19 %1 = load i32, i32* @x1, align 4, !dbg !19
tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !15, metadata !17), !dbg !19 tail call void @llvm.dbg.value(metadata i32 %1, metadata !15, metadata !17), !dbg !19
store i32 %a, i32* @x1, align 4, !dbg !19 store i32 %a, i32* @x1, align 4, !dbg !19
ret i32 %1, !dbg !19 ret i32 %1, !dbg !19
} }
@ -41,9 +41,9 @@ define i32 @get1(i32 %a) #0 !dbg !10 {
; Function Attrs: nounwind optsize ssp ; Function Attrs: nounwind optsize ssp
define i32 @get2(i32 %a) #0 !dbg !20 { define i32 @get2(i32 %a) #0 !dbg !20 {
tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !22, metadata !17), !dbg !25 tail call void @llvm.dbg.value(metadata i32 %a, metadata !22, metadata !17), !dbg !25
%1 = load i32, i32* @x2, align 4, !dbg !26 %1 = load i32, i32* @x2, align 4, !dbg !26
tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !23, metadata !17), !dbg !26 tail call void @llvm.dbg.value(metadata i32 %1, metadata !23, metadata !17), !dbg !26
store i32 %a, i32* @x2, align 4, !dbg !26 store i32 %a, i32* @x2, align 4, !dbg !26
ret i32 %1, !dbg !26 ret i32 %1, !dbg !26
} }
@ -51,9 +51,9 @@ define i32 @get2(i32 %a) #0 !dbg !20 {
; Function Attrs: nounwind optsize ssp ; Function Attrs: nounwind optsize ssp
define i32 @get3(i32 %a) #0 !dbg !27 { define i32 @get3(i32 %a) #0 !dbg !27 {
tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !29, metadata !17), !dbg !32 tail call void @llvm.dbg.value(metadata i32 %a, metadata !29, metadata !17), !dbg !32
%1 = load i32, i32* @x3, align 4, !dbg !33 %1 = load i32, i32* @x3, align 4, !dbg !33
tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !30, metadata !17), !dbg !33 tail call void @llvm.dbg.value(metadata i32 %1, metadata !30, metadata !17), !dbg !33
store i32 %a, i32* @x3, align 4, !dbg !33 store i32 %a, i32* @x3, align 4, !dbg !33
ret i32 %1, !dbg !33 ret i32 %1, !dbg !33
} }
@ -61,9 +61,9 @@ define i32 @get3(i32 %a) #0 !dbg !27 {
; Function Attrs: nounwind optsize ssp ; Function Attrs: nounwind optsize ssp
define i32 @get4(i32 %a) #0 !dbg !34 { define i32 @get4(i32 %a) #0 !dbg !34 {
tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !36, metadata !17), !dbg !39 tail call void @llvm.dbg.value(metadata i32 %a, metadata !36, metadata !17), !dbg !39
%1 = load i32, i32* @x4, align 4, !dbg !40 %1 = load i32, i32* @x4, align 4, !dbg !40
tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !37, metadata !17), !dbg !40 tail call void @llvm.dbg.value(metadata i32 %1, metadata !37, metadata !17), !dbg !40
store i32 %a, i32* @x4, align 4, !dbg !40 store i32 %a, i32* @x4, align 4, !dbg !40
ret i32 %1, !dbg !40 ret i32 %1, !dbg !40
} }
@ -71,16 +71,16 @@ define i32 @get4(i32 %a) #0 !dbg !34 {
; Function Attrs: nounwind optsize ssp ; Function Attrs: nounwind optsize ssp
define i32 @get5(i32 %a) #0 !dbg !41 { define i32 @get5(i32 %a) #0 !dbg !41 {
tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !43, metadata !17), !dbg !46 tail call void @llvm.dbg.value(metadata i32 %a, metadata !43, metadata !17), !dbg !46
%1 = load i32, i32* @x5, align 4, !dbg !47 %1 = load i32, i32* @x5, align 4, !dbg !47
tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !44, metadata !17), !dbg !47 tail call void @llvm.dbg.value(metadata i32 %1, metadata !44, metadata !17), !dbg !47
store i32 %a, i32* @x5, align 4, !dbg !47 store i32 %a, i32* @x5, align 4, !dbg !47
ret i32 %1, !dbg !47 ret i32 %1, !dbg !47
} }
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind optsize ssp } attributes #0 = { nounwind optsize ssp }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }

6
llvm/test/CodeGen/ARM/2016-08-24-ARM-LDST-dbginfo-bug.ll
View File

@ -7,7 +7,7 @@
; Function Attrs: minsize nounwind optsize readonly ; Function Attrs: minsize nounwind optsize readonly
define %struct.s* @s_idx(%struct.s* readonly %xl) local_unnamed_addr #0 !dbg !8 { define %struct.s* @s_idx(%struct.s* readonly %xl) local_unnamed_addr #0 !dbg !8 {
entry: entry:
tail call void @llvm.dbg.value(metadata %struct.s* %xl, i64 0, metadata !17, metadata !18), !dbg !19 tail call void @llvm.dbg.value(metadata %struct.s* %xl, metadata !17, metadata !18), !dbg !19
br label %while.cond, !dbg !20 br label %while.cond, !dbg !20
while.cond: ; preds = %while.body, %entry while.cond: ; preds = %while.body, %entry
@ -18,7 +18,7 @@ while.cond: ; preds = %while.body, %entry
while.body: ; preds = %while.cond while.body: ; preds = %while.cond
%next = getelementptr inbounds %struct.s, %struct.s* %xl.addr.0, i32 0, i32 0 %next = getelementptr inbounds %struct.s, %struct.s* %xl.addr.0, i32 0, i32 0
%0 = load %struct.s*, %struct.s** %next, align 4 %0 = load %struct.s*, %struct.s** %next, align 4
tail call void @llvm.dbg.value(metadata %struct.s* %0, i64 0, metadata !17, metadata !18), !dbg !19 tail call void @llvm.dbg.value(metadata %struct.s* %0, metadata !17, metadata !18), !dbg !19
br label %while.cond br label %while.cond
while.end: ; preds = %while.cond while.end: ; preds = %while.cond
@ -26,7 +26,7 @@ while.end: ; preds = %while.cond
} }
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!3, !4, !5, !6} !llvm.module.flags = !{!3, !4, !5, !6}

6
llvm/test/CodeGen/ARM/coalesce-dbgvalue.ll
View File

@ -28,11 +28,11 @@ for.cond1: ; preds = %for.end9, %for.cond
for.body2: ; preds = %for.cond1 for.body2: ; preds = %for.cond1
store i32 %storemerge11, i32* @b, align 4, !dbg !26 store i32 %storemerge11, i32* @b, align 4, !dbg !26
tail call void @llvm.dbg.value(metadata i32* null, i64 0, metadata !20, metadata !27), !dbg !28 tail call void @llvm.dbg.value(metadata i32* null, metadata !20, metadata !27), !dbg !28
%0 = load i64, i64* @a, align 8, !dbg !29 %0 = load i64, i64* @a, align 8, !dbg !29
%xor = xor i64 %0, %e.1.ph, !dbg !29 %xor = xor i64 %0, %e.1.ph, !dbg !29
%conv3 = trunc i64 %xor to i32, !dbg !29 %conv3 = trunc i64 %xor to i32, !dbg !29
tail call void @llvm.dbg.value(metadata i32 %conv3, i64 0, metadata !19, metadata !27), !dbg !29 tail call void @llvm.dbg.value(metadata i32 %conv3, metadata !19, metadata !27), !dbg !29
%tobool4 = icmp eq i32 %conv3, 0, !dbg !29 %tobool4 = icmp eq i32 %conv3, 0, !dbg !29
br i1 %tobool4, label %land.end, label %land.rhs, !dbg !29 br i1 %tobool4, label %land.end, label %land.rhs, !dbg !29
@ -70,7 +70,7 @@ declare i32 @fn2(...) #1
declare i32 @fn3(...) #1 declare i32 @fn3(...) #1
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }

14
llvm/test/CodeGen/ARM/debug-info-arg.ll
View File

@ -7,13 +7,13 @@ target triple = "thumbv7-apple-ios"
%struct.tag_s = type { i32, i32, i32 } %struct.tag_s = type { i32, i32, i32 }
define void @foo(%struct.tag_s* nocapture %this, %struct.tag_s* %c, i64 %x, i64 %y, %struct.tag_s* nocapture %ptr1, %struct.tag_s* nocapture %ptr2) nounwind ssp "no-frame-pointer-elim"="true" !dbg !1 { define void @foo(%struct.tag_s* nocapture %this, %struct.tag_s* %c, i64 %x, i64 %y, %struct.tag_s* nocapture %ptr1, %struct.tag_s* nocapture %ptr2) nounwind ssp "no-frame-pointer-elim"="true" !dbg !1 {
tail call void @llvm.dbg.value(metadata %struct.tag_s* %this, i64 0, metadata !5, metadata !DIExpression()), !dbg !20 tail call void @llvm.dbg.value(metadata %struct.tag_s* %this, metadata !5, metadata !DIExpression()), !dbg !20
tail call void @llvm.dbg.value(metadata %struct.tag_s* %c, i64 0, metadata !13, metadata !DIExpression()), !dbg !21 tail call void @llvm.dbg.value(metadata %struct.tag_s* %c, metadata !13, metadata !DIExpression()), !dbg !21
tail call void @llvm.dbg.value(metadata i64 %x, i64 0, metadata !14, metadata !DIExpression()), !dbg !22 tail call void @llvm.dbg.value(metadata i64 %x, metadata !14, metadata !DIExpression()), !dbg !22
tail call void @llvm.dbg.value(metadata i64 %y, i64 0, metadata !17, metadata !DIExpression()), !dbg !23 tail call void @llvm.dbg.value(metadata i64 %y, metadata !17, metadata !DIExpression()), !dbg !23
;CHECK: @DEBUG_VALUE: foo:y <- [%R7+8] ;CHECK: @DEBUG_VALUE: foo:y <- [%R7+8]
tail call void @llvm.dbg.value(metadata %struct.tag_s* %ptr1, i64 0, metadata !18, metadata !DIExpression()), !dbg !24 tail call void @llvm.dbg.value(metadata %struct.tag_s* %ptr1, metadata !18, metadata !DIExpression()), !dbg !24
tail call void @llvm.dbg.value(metadata %struct.tag_s* %ptr2, i64 0, metadata !19, metadata !DIExpression()), !dbg !25 tail call void @llvm.dbg.value(metadata %struct.tag_s* %ptr2, metadata !19, metadata !DIExpression()), !dbg !25
%1 = icmp eq %struct.tag_s* %c, null, !dbg !26 %1 = icmp eq %struct.tag_s* %c, null, !dbg !26
br i1 %1, label %3, label %2, !dbg !26 br i1 %1, label %3, label %2, !dbg !26
@ -27,7 +27,7 @@ define void @foo(%struct.tag_s* nocapture %this, %struct.tag_s* %c, i64 %x, i64
declare void @foobar(i64, i64) declare void @foobar(i64, i64)
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!33} !llvm.module.flags = !{!33}

4
llvm/test/CodeGen/ARM/debug-info-blocks.ll
View File

@ -39,7 +39,7 @@ declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
declare i8* @objc_msgSend(i8*, i8*, ...) declare i8* @objc_msgSend(i8*, i8*, ...)
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
@ -47,7 +47,7 @@ define hidden void @foobar_func_block_invoke_0(i8* %.block_descriptor, %0* %load
%1 = alloca %0*, align 4 %1 = alloca %0*, align 4
%bounds = alloca %struct.CR, align 4 %bounds = alloca %struct.CR, align 4
%data = alloca %struct.CR, align 4 %data = alloca %struct.CR, align 4
call void @llvm.dbg.value(metadata i8* %.block_descriptor, i64 0, metadata !27, metadata !DIExpression()), !dbg !129 call void @llvm.dbg.value(metadata i8* %.block_descriptor, metadata !27, metadata !DIExpression()), !dbg !129
store %0* %loadedMydata, %0** %1, align 4 store %0* %loadedMydata, %0** %1, align 4
call void @llvm.dbg.declare(metadata %0** %1, metadata !130, metadata !DIExpression()), !dbg !131 call void @llvm.dbg.declare(metadata %0** %1, metadata !130, metadata !DIExpression()), !dbg !131
%2 = bitcast %struct.CR* %bounds to %1* %2 = bitcast %struct.CR* %bounds to %1*

6
llvm/test/CodeGen/ARM/debug-info-branch-folding.ll
View File

@ -20,9 +20,9 @@ entry:
for.body9: ; preds = %for.body9, %entry for.body9: ; preds = %for.body9, %entry
%add19 = fadd <4 x float> undef, <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00>, !dbg !39 %add19 = fadd <4 x float> undef, <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00>, !dbg !39
tail call void @llvm.dbg.value(metadata <4 x float> %add19, i64 0, metadata !27, metadata !DIExpression()), !dbg !39 tail call void @llvm.dbg.value(metadata <4 x float> %add19, metadata !27, metadata !DIExpression()), !dbg !39
%add20 = fadd <4 x float> undef, <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00>, !dbg !39 %add20 = fadd <4 x float> undef, <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00>, !dbg !39
tail call void @llvm.dbg.value(metadata <4 x float> %add20, i64 0, metadata !28, metadata !DIExpression()), !dbg !39 tail call void @llvm.dbg.value(metadata <4 x float> %add20, metadata !28, metadata !DIExpression()), !dbg !39
br i1 %cond, label %for.end54, label %for.body9, !dbg !44 br i1 %cond, label %for.end54, label %for.body9, !dbg !44
for.end54: ; preds = %for.body9 for.end54: ; preds = %for.body9
@ -37,7 +37,7 @@ for.end54: ; preds = %for.body9
declare i32 @printf(i8* nocapture, ...) nounwind declare i32 @printf(i8* nocapture, ...) nounwind
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.module.flags = !{!56} !llvm.module.flags = !{!56}
!llvm.dbg.cu = !{!2} !llvm.dbg.cu = !{!2}

26
llvm/test/CodeGen/ARM/debug-info-d16-reg.ll
View File

@ -12,9 +12,9 @@ target triple = "thumbv7-apple-darwin10"
define i32 @inlineprinter(i8* %ptr, double %val, i8 zeroext %c) nounwind optsize !dbg !9 { define i32 @inlineprinter(i8* %ptr, double %val, i8 zeroext %c) nounwind optsize !dbg !9 {
entry: entry:
tail call void @llvm.dbg.value(metadata i8* %ptr, i64 0, metadata !19, metadata !DIExpression()), !dbg !26 tail call void @llvm.dbg.value(metadata i8* %ptr, metadata !19, metadata !DIExpression()), !dbg !26
tail call void @llvm.dbg.value(metadata double %val, i64 0, metadata !20, metadata !DIExpression()), !dbg !26 tail call void @llvm.dbg.value(metadata double %val, metadata !20, metadata !DIExpression()), !dbg !26
tail call void @llvm.dbg.value(metadata i8 %c, i64 0, metadata !21, metadata !DIExpression()), !dbg !26 tail call void @llvm.dbg.value(metadata i8 %c, metadata !21, metadata !DIExpression()), !dbg !26
%0 = zext i8 %c to i32, !dbg !27 %0 = zext i8 %c to i32, !dbg !27
%1 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %val, i32 %0) nounwind, !dbg !27 %1 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %val, i32 %0) nounwind, !dbg !27
ret i32 0, !dbg !29 ret i32 0, !dbg !29
@ -22,9 +22,9 @@ entry:
define i32 @printer(i8* %ptr, double %val, i8 zeroext %c) nounwind optsize noinline !dbg !0 { define i32 @printer(i8* %ptr, double %val, i8 zeroext %c) nounwind optsize noinline !dbg !0 {
entry: entry:
tail call void @llvm.dbg.value(metadata i8* %ptr, i64 0, metadata !16, metadata !DIExpression()), !dbg !30 tail call void @llvm.dbg.value(metadata i8* %ptr, metadata !16, metadata !DIExpression()), !dbg !30
tail call void @llvm.dbg.value(metadata double %val, i64 0, metadata !17, metadata !DIExpression()), !dbg !30 tail call void @llvm.dbg.value(metadata double %val, metadata !17, metadata !DIExpression()), !dbg !30
tail call void @llvm.dbg.value(metadata i8 %c, i64 0, metadata !18, metadata !DIExpression()), !dbg !30 tail call void @llvm.dbg.value(metadata i8 %c, metadata !18, metadata !DIExpression()), !dbg !30
%0 = zext i8 %c to i32, !dbg !31 %0 = zext i8 %c to i32, !dbg !31
%1 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %val, i32 %0) nounwind, !dbg !31 %1 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %val, i32 %0) nounwind, !dbg !31
ret i32 0, !dbg !33 ret i32 0, !dbg !33
@ -32,22 +32,22 @@ entry:
declare i32 @printf(i8* nocapture, ...) nounwind declare i32 @printf(i8* nocapture, ...) nounwind
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
define i32 @main(i32 %argc, i8** nocapture %argv) nounwind optsize !dbg !10 { define i32 @main(i32 %argc, i8** nocapture %argv) nounwind optsize !dbg !10 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 %argc, i64 0, metadata !22, metadata !DIExpression()), !dbg !34 tail call void @llvm.dbg.value(metadata i32 %argc, metadata !22, metadata !DIExpression()), !dbg !34
tail call void @llvm.dbg.value(metadata i8** %argv, i64 0, metadata !23, metadata !DIExpression()), !dbg !34 tail call void @llvm.dbg.value(metadata i8** %argv, metadata !23, metadata !DIExpression()), !dbg !34
%0 = sitofp i32 %argc to double, !dbg !35 %0 = sitofp i32 %argc to double, !dbg !35
%1 = fadd double %0, 5.555552e+05, !dbg !35 %1 = fadd double %0, 5.555552e+05, !dbg !35
tail call void @llvm.dbg.value(metadata double %1, i64 0, metadata !24, metadata !DIExpression()), !dbg !35 tail call void @llvm.dbg.value(metadata double %1, metadata !24, metadata !DIExpression()), !dbg !35
%2 = tail call i32 @puts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str1, i32 0, i32 0)) nounwind, !dbg !36 %2 = tail call i32 @puts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str1, i32 0, i32 0)) nounwind, !dbg !36
%3 = getelementptr inbounds i8, i8* bitcast (i32 (i32, i8**)* @main to i8*), i32 %argc, !dbg !37 %3 = getelementptr inbounds i8, i8* bitcast (i32 (i32, i8**)* @main to i8*), i32 %argc, !dbg !37
%4 = trunc i32 %argc to i8, !dbg !37 %4 = trunc i32 %argc to i8, !dbg !37
%5 = add i8 %4, 97, !dbg !37 %5 = add i8 %4, 97, !dbg !37
tail call void @llvm.dbg.value(metadata i8* %3, i64 0, metadata !49, metadata !DIExpression()) nounwind, !dbg !38 tail call void @llvm.dbg.value(metadata i8* %3, metadata !49, metadata !DIExpression()) nounwind, !dbg !38
tail call void @llvm.dbg.value(metadata double %1, i64 0, metadata !50, metadata !DIExpression()) nounwind, !dbg !38 tail call void @llvm.dbg.value(metadata double %1, metadata !50, metadata !DIExpression()) nounwind, !dbg !38
tail call void @llvm.dbg.value(metadata i8 %5, i64 0, metadata !51, metadata !DIExpression()) nounwind, !dbg !38 tail call void @llvm.dbg.value(metadata i8 %5, metadata !51, metadata !DIExpression()) nounwind, !dbg !38
%6 = zext i8 %5 to i32, !dbg !39 %6 = zext i8 %5 to i32, !dbg !39
%7 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %3, double %1, i32 %6) nounwind, !dbg !39 %7 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %3, double %1, i32 %6) nounwind, !dbg !39
%8 = tail call i32 @printer(i8* %3, double %1, i8 zeroext %5) nounwind, !dbg !40 %8 = tail call i32 @printer(i8* %3, double %1, i8 zeroext %5) nounwind, !dbg !40

4
llvm/test/CodeGen/ARM/debug-info-qreg.ll
View File

@ -24,7 +24,7 @@ for.body9: ; preds = %for.body9, %entry
br i1 undef, label %for.end54, label %for.body9, !dbg !44 br i1 undef, label %for.end54, label %for.body9, !dbg !44
for.end54: ; preds = %for.body9 for.end54: ; preds = %for.body9
tail call void @llvm.dbg.value(metadata <4 x float> %add19, i64 0, metadata !27, metadata !DIExpression()), !dbg !39 tail call void @llvm.dbg.value(metadata <4 x float> %add19, metadata !27, metadata !DIExpression()), !dbg !39
%tmp115 = extractelement <4 x float> %add19, i32 1 %tmp115 = extractelement <4 x float> %add19, i32 1
%conv6.i75 = fpext float %tmp115 to double, !dbg !45 %conv6.i75 = fpext float %tmp115 to double, !dbg !45
%call.i82 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i32 0, i32 0), double undef, double %conv6.i75, double undef, double undef) nounwind, !dbg !45 %call.i82 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i32 0, i32 0), double undef, double %conv6.i75, double undef, double undef) nounwind, !dbg !45
@ -33,7 +33,7 @@ for.end54: ; preds = %for.body9
declare i32 @printf(i8* nocapture, ...) nounwind declare i32 @printf(i8* nocapture, ...) nounwind
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!2} !llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!56} !llvm.module.flags = !{!56}

26
llvm/test/CodeGen/ARM/debug-info-s16-reg.ll
View File

@ -12,9 +12,9 @@ target triple = "thumbv7-apple-macosx10.6.7"
define i32 @inlineprinter(i8* %ptr, float %val, i8 zeroext %c) nounwind optsize ssp !dbg !0 { define i32 @inlineprinter(i8* %ptr, float %val, i8 zeroext %c) nounwind optsize ssp !dbg !0 {
entry: entry:
tail call void @llvm.dbg.value(metadata i8* %ptr, i64 0, metadata !8, metadata !DIExpression()), !dbg !24 tail call void @llvm.dbg.value(metadata i8* %ptr, metadata !8, metadata !DIExpression()), !dbg !24
tail call void @llvm.dbg.value(metadata float %val, i64 0, metadata !10, metadata !DIExpression()), !dbg !25 tail call void @llvm.dbg.value(metadata float %val, metadata !10, metadata !DIExpression()), !dbg !25
tail call void @llvm.dbg.value(metadata i8 %c, i64 0, metadata !12, metadata !DIExpression()), !dbg !26 tail call void @llvm.dbg.value(metadata i8 %c, metadata !12, metadata !DIExpression()), !dbg !26
%conv = fpext float %val to double, !dbg !27 %conv = fpext float %val to double, !dbg !27
%conv3 = zext i8 %c to i32, !dbg !27 %conv3 = zext i8 %c to i32, !dbg !27
%call = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %conv, i32 %conv3) nounwind optsize, !dbg !27 %call = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %conv, i32 %conv3) nounwind optsize, !dbg !27
@ -25,9 +25,9 @@ declare i32 @printf(i8* nocapture, ...) nounwind optsize
define i32 @printer(i8* %ptr, float %val, i8 zeroext %c) nounwind optsize noinline ssp !dbg !6 { define i32 @printer(i8* %ptr, float %val, i8 zeroext %c) nounwind optsize noinline ssp !dbg !6 {
entry: entry:
tail call void @llvm.dbg.value(metadata i8* %ptr, i64 0, metadata !14, metadata !DIExpression()), !dbg !30 tail call void @llvm.dbg.value(metadata i8* %ptr, metadata !14, metadata !DIExpression()), !dbg !30
tail call void @llvm.dbg.value(metadata float %val, i64 0, metadata !15, metadata !DIExpression()), !dbg !31 tail call void @llvm.dbg.value(metadata float %val, metadata !15, metadata !DIExpression()), !dbg !31
tail call void @llvm.dbg.value(metadata i8 %c, i64 0, metadata !16, metadata !DIExpression()), !dbg !32 tail call void @llvm.dbg.value(metadata i8 %c, metadata !16, metadata !DIExpression()), !dbg !32
%conv = fpext float %val to double, !dbg !33 %conv = fpext float %val to double, !dbg !33
%conv3 = zext i8 %c to i32, !dbg !33 %conv3 = zext i8 %c to i32, !dbg !33
%call = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %conv, i32 %conv3) nounwind optsize, !dbg !33 %call = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %conv, i32 %conv3) nounwind optsize, !dbg !33
@ -36,19 +36,19 @@ entry:
define i32 @main(i32 %argc, i8** nocapture %argv) nounwind optsize ssp !dbg !7 { define i32 @main(i32 %argc, i8** nocapture %argv) nounwind optsize ssp !dbg !7 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 %argc, i64 0, metadata !17, metadata !DIExpression()), !dbg !36 tail call void @llvm.dbg.value(metadata i32 %argc, metadata !17, metadata !DIExpression()), !dbg !36
tail call void @llvm.dbg.value(metadata i8** %argv, i64 0, metadata !18, metadata !DIExpression()), !dbg !37 tail call void @llvm.dbg.value(metadata i8** %argv, metadata !18, metadata !DIExpression()), !dbg !37
%conv = sitofp i32 %argc to double, !dbg !38 %conv = sitofp i32 %argc to double, !dbg !38
%add = fadd double %conv, 5.555552e+05, !dbg !38 %add = fadd double %conv, 5.555552e+05, !dbg !38
%conv1 = fptrunc double %add to float, !dbg !38 %conv1 = fptrunc double %add to float, !dbg !38
tail call void @llvm.dbg.value(metadata float %conv1, i64 0, metadata !22, metadata !DIExpression()), !dbg !38 tail call void @llvm.dbg.value(metadata float %conv1, metadata !22, metadata !DIExpression()), !dbg !38
%call = tail call i32 @puts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str1, i32 0, i32 0)) nounwind optsize, !dbg !39 %call = tail call i32 @puts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str1, i32 0, i32 0)) nounwind optsize, !dbg !39
%add.ptr = getelementptr i8, i8* bitcast (i32 (i32, i8**)* @main to i8*), i32 %argc, !dbg !40 %add.ptr = getelementptr i8, i8* bitcast (i32 (i32, i8**)* @main to i8*), i32 %argc, !dbg !40
%add5 = add nsw i32 %argc, 97, !dbg !40 %add5 = add nsw i32 %argc, 97, !dbg !40
%conv6 = trunc i32 %add5 to i8, !dbg !40 %conv6 = trunc i32 %add5 to i8, !dbg !40
tail call void @llvm.dbg.value(metadata i8* %add.ptr, i64 0, metadata !58, metadata !DIExpression()) nounwind, !dbg !41 tail call void @llvm.dbg.value(metadata i8* %add.ptr, metadata !58, metadata !DIExpression()) nounwind, !dbg !41
tail call void @llvm.dbg.value(metadata float %conv1, i64 0, metadata !60, metadata !DIExpression()) nounwind, !dbg !42 tail call void @llvm.dbg.value(metadata float %conv1, metadata !60, metadata !DIExpression()) nounwind, !dbg !42
tail call void @llvm.dbg.value(metadata i8 %conv6, i64 0, metadata !62, metadata !DIExpression()) nounwind, !dbg !43 tail call void @llvm.dbg.value(metadata i8 %conv6, metadata !62, metadata !DIExpression()) nounwind, !dbg !43
%conv.i = fpext float %conv1 to double, !dbg !44 %conv.i = fpext float %conv1 to double, !dbg !44
%conv3.i = and i32 %add5, 255, !dbg !44 %conv3.i = and i32 %add5, 255, !dbg !44
%call.i = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %add.ptr, double %conv.i, i32 %conv3.i) nounwind optsize, !dbg !44 %call.i = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %add.ptr, double %conv.i, i32 %conv3.i) nounwind optsize, !dbg !44
@ -58,7 +58,7 @@ entry:
declare i32 @puts(i8* nocapture) nounwind optsize declare i32 @puts(i8* nocapture) nounwind optsize
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!2} !llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!53} !llvm.module.flags = !{!53}

4
llvm/test/CodeGen/ARM/debug-info-sreg2.ll
View File

@ -15,7 +15,7 @@ target triple = "thumbv7-apple-macosx10.6.7"
define void @_Z3foov() optsize ssp !dbg !1 { define void @_Z3foov() optsize ssp !dbg !1 {
entry: entry:
%call = tail call float @_Z3barv() optsize, !dbg !11 %call = tail call float @_Z3barv() optsize, !dbg !11
tail call void @llvm.dbg.value(metadata float %call, i64 0, metadata !5, metadata !DIExpression()), !dbg !11 tail call void @llvm.dbg.value(metadata float %call, metadata !5, metadata !DIExpression()), !dbg !11
%call16 = tail call float @_Z2f2v() optsize, !dbg !12 %call16 = tail call float @_Z2f2v() optsize, !dbg !12
%cmp7 = fcmp olt float %call, %call16, !dbg !12 %cmp7 = fcmp olt float %call, %call16, !dbg !12
br i1 %cmp7, label %for.body, label %for.end, !dbg !12 br i1 %cmp7, label %for.body, label %for.end, !dbg !12
@ -38,7 +38,7 @@ declare float @_Z2f2v() optsize
declare float @_Z2f3f(float) optsize declare float @_Z2f3f(float) optsize
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!20} !llvm.module.flags = !{!20}

8
llvm/test/DebugInfo/AArch64/cfi-eof-prologue.ll
View File

@ -28,7 +28,7 @@ target triple = "aarch64-apple-ios"
; Function Attrs: nounwind ; Function Attrs: nounwind
define %struct.B* @_ZN1BC2Ev(%struct.B* %this) unnamed_addr #0 align 2 !dbg !28 { define %struct.B* @_ZN1BC2Ev(%struct.B* %this) unnamed_addr #0 align 2 !dbg !28 {
entry: entry:
tail call void @llvm.dbg.value(metadata %struct.B* %this, i64 0, metadata !30, metadata !38), !dbg !39 tail call void @llvm.dbg.value(metadata %struct.B* %this, metadata !30, metadata !38), !dbg !39
%0 = getelementptr inbounds %struct.B, %struct.B* %this, i64 0, i32 0, !dbg !40 %0 = getelementptr inbounds %struct.B, %struct.B* %this, i64 0, i32 0, !dbg !40
%call = tail call %struct.A* @_ZN1AC2Ev(%struct.A* %0) #3, !dbg !40 %call = tail call %struct.A* @_ZN1AC2Ev(%struct.A* %0) #3, !dbg !40
%1 = getelementptr inbounds %struct.B, %struct.B* %this, i64 0, i32 0, i32 0, !dbg !40 %1 = getelementptr inbounds %struct.B, %struct.B* %this, i64 0, i32 0, i32 0, !dbg !40
@ -41,8 +41,8 @@ declare %struct.A* @_ZN1AC2Ev(%struct.A*)
; Function Attrs: nounwind ; Function Attrs: nounwind
define %struct.B* @_ZN1BC1Ev(%struct.B* %this) unnamed_addr #0 align 2 !dbg !32 { define %struct.B* @_ZN1BC1Ev(%struct.B* %this) unnamed_addr #0 align 2 !dbg !32 {
entry: entry:
tail call void @llvm.dbg.value(metadata %struct.B* %this, i64 0, metadata !34, metadata !38), !dbg !44 tail call void @llvm.dbg.value(metadata %struct.B* %this, metadata !34, metadata !38), !dbg !44
tail call void @llvm.dbg.value(metadata %struct.B* %this, i64 0, metadata !45, metadata !38) #3, !dbg !47 tail call void @llvm.dbg.value(metadata %struct.B* %this, metadata !45, metadata !38) #3, !dbg !47
%0 = getelementptr inbounds %struct.B, %struct.B* %this, i64 0, i32 0, !dbg !48 %0 = getelementptr inbounds %struct.B, %struct.B* %this, i64 0, i32 0, !dbg !48
%call.i = tail call %struct.A* @_ZN1AC2Ev(%struct.A* %0) #3, !dbg !48 %call.i = tail call %struct.A* @_ZN1AC2Ev(%struct.A* %0) #3, !dbg !48
%1 = getelementptr inbounds %struct.B, %struct.B* %this, i64 0, i32 0, i32 0, !dbg !48 %1 = getelementptr inbounds %struct.B, %struct.B* %this, i64 0, i32 0, i32 0, !dbg !48
@ -51,7 +51,7 @@ entry:
} }
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { nounwind } attributes #0 = { nounwind }
attributes #2 = { nounwind readnone } attributes #2 = { nounwind readnone }

4
llvm/test/DebugInfo/AArch64/coalescing.ll
View File

@ -19,7 +19,7 @@ entry:
%size = alloca i32, align 4 %size = alloca i32, align 4
%0 = bitcast i32* %size to i8*, !dbg !15 %0 = bitcast i32* %size to i8*, !dbg !15
%call = call i8* @_Z3fooPv(i8* %0) #3, !dbg !15 %call = call i8* @_Z3fooPv(i8* %0) #3, !dbg !15
call void @llvm.dbg.value(metadata i32* %size, i64 0, metadata !10, metadata !16), !dbg !17 call void @llvm.dbg.value(metadata i32* %size, metadata !10, metadata !16), !dbg !17
; CHECK: .debug_info contents: ; CHECK: .debug_info contents:
; CHECK: DW_TAG_variable ; CHECK: DW_TAG_variable
; CHECK-NEXT: DW_AT_location ; CHECK-NEXT: DW_AT_location
@ -34,7 +34,7 @@ entry:
declare i8* @_Z3fooPv(i8*) #1 declare i8* @_Z3fooPv(i8*) #1
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { nounwind optsize } attributes #0 = { nounwind optsize }
attributes #1 = { optsize } attributes #1 = { optsize }

16
llvm/test/DebugInfo/AArch64/frameindices.ll
View File

@ -94,12 +94,12 @@ entry:
tail call void @llvm.dbg.declare(metadata [7 x i8]* %agg.tmp.sroa.4, metadata !56, metadata !77), !dbg !75 tail call void @llvm.dbg.declare(metadata [7 x i8]* %agg.tmp.sroa.4, metadata !56, metadata !77), !dbg !75
tail call void @llvm.dbg.declare(metadata %struct.A* undef, metadata !72, metadata !37), !dbg !78 tail call void @llvm.dbg.declare(metadata %struct.A* undef, metadata !72, metadata !37), !dbg !78
%0 = load i64, i64* @a, align 8, !dbg !79, !tbaa !40 %0 = load i64, i64* @a, align 8, !dbg !79, !tbaa !40
tail call void @llvm.dbg.value(metadata %struct.B* %d, i64 0, metadata !73, metadata !37), !dbg !80 tail call void @llvm.dbg.value(metadata %struct.B* %d, metadata !73, metadata !37), !dbg !80
%call = call %struct.B* @_ZN1BC1El(%struct.B* %d, i64 %0), !dbg !80 %call = call %struct.B* @_ZN1BC1El(%struct.B* %d, i64 %0), !dbg !80
call void @llvm.dbg.value(metadata i8 1, i64 0, metadata !72, metadata !81), !dbg !78 call void @llvm.dbg.value(metadata i8 1, metadata !72, metadata !81), !dbg !78
call void @llvm.dbg.value(metadata i8 1, i64 0, metadata !72, metadata !82), !dbg !78 call void @llvm.dbg.value(metadata i8 1, metadata !72, metadata !82), !dbg !78
call void @llvm.dbg.value(metadata i8 1, i64 0, metadata !56, metadata !81), !dbg !75 call void @llvm.dbg.value(metadata i8 1, metadata !56, metadata !81), !dbg !75
call void @llvm.dbg.value(metadata i8 1, i64 0, metadata !56, metadata !82), !dbg !75 call void @llvm.dbg.value(metadata i8 1, metadata !56, metadata !82), !dbg !75
call void @llvm.dbg.declare(metadata %struct.A* undef, metadata !56, metadata !37), !dbg !75 call void @llvm.dbg.declare(metadata %struct.A* undef, metadata !56, metadata !37), !dbg !75
%1 = getelementptr inbounds %struct.A, %struct.A* %agg.tmp.i.i, i64 0, i32 0, !dbg !83 %1 = getelementptr inbounds %struct.A, %struct.A* %agg.tmp.i.i, i64 0, i32 0, !dbg !83
call void @llvm.lifetime.start(i64 24, i8* %1), !dbg !83 call void @llvm.lifetime.start(i64 24, i8* %1), !dbg !83
@ -123,14 +123,14 @@ call.i.i.noexc: ; preds = %entry
invoke.cont: ; preds = %call.i.i.noexc invoke.cont: ; preds = %call.i.i.noexc
call void @llvm.lifetime.end(i64 24, i8* %1), !dbg !91 call void @llvm.lifetime.end(i64 24, i8* %1), !dbg !91
call void @llvm.dbg.value(metadata %struct.B* %d, i64 0, metadata !73, metadata !37), !dbg !80 call void @llvm.dbg.value(metadata %struct.B* %d, metadata !73, metadata !37), !dbg !80
%call1 = call %struct.B* @_ZN1BD1Ev(%struct.B* %d) #3, !dbg !92 %call1 = call %struct.B* @_ZN1BD1Ev(%struct.B* %d) #3, !dbg !92
ret void, !dbg !92 ret void, !dbg !92
lpad: ; preds = %call.i.i.noexc, %entry lpad: ; preds = %call.i.i.noexc, %entry
%3 = landingpad { i8*, i32 } %3 = landingpad { i8*, i32 }
cleanup, !dbg !92 cleanup, !dbg !92
call void @llvm.dbg.value(metadata %struct.B* %d, i64 0, metadata !73, metadata !37), !dbg !80 call void @llvm.dbg.value(metadata %struct.B* %d, metadata !73, metadata !37), !dbg !80
%call2 = call %struct.B* @_ZN1BD1Ev(%struct.B* %d) #3, !dbg !92 %call2 = call %struct.B* @_ZN1BD1Ev(%struct.B* %d) #3, !dbg !92
resume { i8*, i32 } %3, !dbg !92 resume { i8*, i32 } %3, !dbg !92
} }
@ -143,7 +143,7 @@ declare i32 @__gxx_personality_v0(...)
declare %struct.B* @_ZN1BD1Ev(%struct.B*) #3 declare %struct.B* @_ZN1BD1Ev(%struct.B*) #3
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0 declare void @llvm.dbg.value(metadata, metadata, metadata) #0
; Function Attrs: argmemonly nounwind ; Function Attrs: argmemonly nounwind
declare void @llvm.lifetime.start(i64, i8* nocapture) #2 declare void @llvm.lifetime.start(i64, i8* nocapture) #2

6
llvm/test/DebugInfo/AMDGPU/dbg-value-sched-crash.ll
View File

@ -16,15 +16,15 @@
; } ; }
; } ; }
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) declare void @llvm.dbg.value(metadata, metadata, metadata)
; CHECK-LABEL: {{^}}kernel1: ; CHECK-LABEL: {{^}}kernel1:
define amdgpu_kernel void @kernel1( define amdgpu_kernel void @kernel1(
i32 addrspace(1)* nocapture readonly %A, i32 addrspace(1)* nocapture readonly %A,
i32 addrspace(1)* nocapture %B) !dbg !7 { i32 addrspace(1)* nocapture %B) !dbg !7 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 addrspace(1)* %A, i64 0, metadata !13, metadata !19), !dbg !20 tail call void @llvm.dbg.value(metadata i32 addrspace(1)* %A, metadata !13, metadata !19), !dbg !20
tail call void @llvm.dbg.value(metadata i32 addrspace(1)* %B, i64 0, metadata !14, metadata !19), !dbg !21 tail call void @llvm.dbg.value(metadata i32 addrspace(1)* %B, metadata !14, metadata !19), !dbg !21
%0 = load i32, i32 addrspace(1)* %A, align 4, !dbg !22, !tbaa !24 %0 = load i32, i32 addrspace(1)* %A, align 4, !dbg !22, !tbaa !24
%cmp = icmp eq i32 %0, 1, !dbg !28 %cmp = icmp eq i32 %0, 1, !dbg !28
br i1 %cmp, label %if.then, label %if.end, !dbg !29 br i1 %cmp, label %if.then, label %if.end, !dbg !29

14
llvm/test/DebugInfo/ARM/PR16736.ll
View File

@ -15,14 +15,14 @@ target triple = "thumbv7-apple-ios"
; Function Attrs: nounwind ; Function Attrs: nounwind
define arm_aapcscc void @_Z1hiiiif(i32, i32, i32, i32, float %x) #0 "no-frame-pointer-elim"="true" !dbg !4 { define arm_aapcscc void @_Z1hiiiif(i32, i32, i32, i32, float %x) #0 "no-frame-pointer-elim"="true" !dbg !4 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 %0, i64 0, metadata !12, metadata !DIExpression()), !dbg !18 tail call void @llvm.dbg.value(metadata i32 %0, metadata !12, metadata !DIExpression()), !dbg !18
tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !13, metadata !DIExpression()), !dbg !18 tail call void @llvm.dbg.value(metadata i32 %1, metadata !13, metadata !DIExpression()), !dbg !18
tail call void @llvm.dbg.value(metadata i32 %2, i64 0, metadata !14, metadata !DIExpression()), !dbg !18 tail call void @llvm.dbg.value(metadata i32 %2, metadata !14, metadata !DIExpression()), !dbg !18
tail call void @llvm.dbg.value(metadata i32 %3, i64 0, metadata !15, metadata !DIExpression()), !dbg !18 tail call void @llvm.dbg.value(metadata i32 %3, metadata !15, metadata !DIExpression()), !dbg !18
tail call void @llvm.dbg.value(metadata float %x, i64 0, metadata !16, metadata !DIExpression()), !dbg !18 tail call void @llvm.dbg.value(metadata float %x, metadata !16, metadata !DIExpression()), !dbg !18
%call = tail call arm_aapcscc i32 @_Z1fv() #3, !dbg !19 %call = tail call arm_aapcscc i32 @_Z1fv() #3, !dbg !19
%conv = sitofp i32 %call to float, !dbg !19 %conv = sitofp i32 %call to float, !dbg !19
tail call void @llvm.dbg.value(metadata float %conv, i64 0, metadata !16, metadata !DIExpression()), !dbg !19 tail call void @llvm.dbg.value(metadata float %conv, metadata !16, metadata !DIExpression()), !dbg !19
tail call arm_aapcscc void @_Z1gf(float %conv) #3, !dbg !19 tail call arm_aapcscc void @_Z1gf(float %conv) #3, !dbg !19
ret void, !dbg !20 ret void, !dbg !20
} }
@ -32,7 +32,7 @@ declare arm_aapcscc void @_Z1gf(float)
declare arm_aapcscc i32 @_Z1fv() declare arm_aapcscc i32 @_Z1fv()
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { nounwind } attributes #0 = { nounwind }
attributes #2 = { nounwind readnone } attributes #2 = { nounwind readnone }

8
llvm/test/DebugInfo/ARM/PR26163.ll
View File

@ -52,16 +52,16 @@ target triple = "armv4t--freebsd11.0-gnueabi"
%struct.timeval = type { i64, i32 } %struct.timeval = type { i64, i32 }
declare void @llvm.dbg.declare(metadata, metadata, metadata) declare void @llvm.dbg.declare(metadata, metadata, metadata)
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) declare void @llvm.dbg.value(metadata, metadata, metadata)
declare void @foo() declare void @foo()
define i32 @parse_config_file() !dbg !4 { define i32 @parse_config_file() !dbg !4 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !15, metadata !26), !dbg !27 tail call void @llvm.dbg.value(metadata i32 0, metadata !15, metadata !26), !dbg !27
tail call void @llvm.dbg.declare(metadata %struct.timeval* undef, metadata !16, metadata !26), !dbg !29 tail call void @llvm.dbg.declare(metadata %struct.timeval* undef, metadata !16, metadata !26), !dbg !29
tail call void @llvm.dbg.value(metadata i64 0, i64 0, metadata !16, metadata !30), !dbg !29 tail call void @llvm.dbg.value(metadata i64 0, metadata !16, metadata !30), !dbg !29
tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !16, metadata !31), !dbg !29 tail call void @llvm.dbg.value(metadata i32 0, metadata !16, metadata !31), !dbg !29
tail call void @foo() #3, !dbg !32 tail call void @foo() #3, !dbg !32
ret i32 0, !dbg !33 ret i32 0, !dbg !33
} }

8
llvm/test/DebugInfo/ARM/cfi-eof-prologue.ll
View File

@ -29,7 +29,7 @@ target triple = "thumbv7-apple-ios"
; Function Attrs: nounwind ; Function Attrs: nounwind
define %struct.B* @_ZN1BC2Ev(%struct.B* %this) unnamed_addr #0 align 2 !dbg !28 { define %struct.B* @_ZN1BC2Ev(%struct.B* %this) unnamed_addr #0 align 2 !dbg !28 {
entry: entry:
tail call void @llvm.dbg.value(metadata %struct.B* %this, i64 0, metadata !30, metadata !40), !dbg !41 tail call void @llvm.dbg.value(metadata %struct.B* %this, metadata !30, metadata !40), !dbg !41
%0 = getelementptr inbounds %struct.B, %struct.B* %this, i32 0, i32 0, !dbg !42 %0 = getelementptr inbounds %struct.B, %struct.B* %this, i32 0, i32 0, !dbg !42
%call = tail call %struct.A* @_ZN1AC2Ev(%struct.A* %0) #3, !dbg !42 %call = tail call %struct.A* @_ZN1AC2Ev(%struct.A* %0) #3, !dbg !42
%1 = getelementptr inbounds %struct.B, %struct.B* %this, i32 0, i32 0, i32 0, !dbg !42 %1 = getelementptr inbounds %struct.B, %struct.B* %this, i32 0, i32 0, i32 0, !dbg !42
@ -42,8 +42,8 @@ declare %struct.A* @_ZN1AC2Ev(%struct.A*)
; Function Attrs: nounwind ; Function Attrs: nounwind
define %struct.B* @_ZN1BC1Ev(%struct.B* %this) unnamed_addr #0 align 2 !dbg !32 { define %struct.B* @_ZN1BC1Ev(%struct.B* %this) unnamed_addr #0 align 2 !dbg !32 {
entry: entry:
tail call void @llvm.dbg.value(metadata %struct.B* %this, i64 0, metadata !34, metadata !40), !dbg !46 tail call void @llvm.dbg.value(metadata %struct.B* %this, metadata !34, metadata !40), !dbg !46
tail call void @llvm.dbg.value(metadata %struct.B* %this, i64 0, metadata !47, metadata !40) #3, !dbg !49 tail call void @llvm.dbg.value(metadata %struct.B* %this, metadata !47, metadata !40) #3, !dbg !49
%0 = getelementptr inbounds %struct.B, %struct.B* %this, i32 0, i32 0, !dbg !50 %0 = getelementptr inbounds %struct.B, %struct.B* %this, i32 0, i32 0, !dbg !50
%call.i = tail call %struct.A* @_ZN1AC2Ev(%struct.A* %0) #3, !dbg !50 %call.i = tail call %struct.A* @_ZN1AC2Ev(%struct.A* %0) #3, !dbg !50
%1 = getelementptr inbounds %struct.B, %struct.B* %this, i32 0, i32 0, i32 0, !dbg !50 %1 = getelementptr inbounds %struct.B, %struct.B* %this, i32 0, i32 0, i32 0, !dbg !50
@ -52,7 +52,7 @@ entry:
} }
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { nounwind } attributes #0 = { nounwind }
attributes #2 = { nounwind readnone } attributes #2 = { nounwind readnone }

4
llvm/test/DebugInfo/ARM/float-args.ll
View File

@ -18,11 +18,11 @@ target triple = "armv7--none-eabi"
define float @foo(float %p) !dbg !4 { define float @foo(float %p) !dbg !4 {
entry: entry:
tail call void @llvm.dbg.value(metadata float %p, i64 0, metadata !9, metadata !15), !dbg !16 tail call void @llvm.dbg.value(metadata float %p, metadata !9, metadata !15), !dbg !16
ret float %p, !dbg !18 ret float %p, !dbg !18
} }
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) declare void @llvm.dbg.value(metadata, metadata, metadata)
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!10, !11} !llvm.module.flags = !{!10, !11}

8
llvm/test/DebugInfo/ARM/lowerbdgdeclare_vla.ll
View File

@ -27,10 +27,10 @@ entry:
; The VLA alloca should be described by a dbg.declare: ; The VLA alloca should be described by a dbg.declare:
; CHECK: call void @llvm.dbg.declare(metadata float* %vla, metadata ![[VLA:.*]], metadata {{.*}}) ; CHECK: call void @llvm.dbg.declare(metadata float* %vla, metadata ![[VLA:.*]], metadata {{.*}})
; The VLA alloca and following store into the array should not be lowered to like this: ; The VLA alloca and following store into the array should not be lowered to like this:
; CHECK-NOT: call void @llvm.dbg.value(metadata float %r, i64 0, metadata ![[VLA]]) ; CHECK-NOT: call void @llvm.dbg.value(metadata float %r, metadata ![[VLA]])
; the backend interprets this as "vla has the location of %r". ; the backend interprets this as "vla has the location of %r".
store float %r, float* %vla, align 4, !dbg !25, !tbaa !26 store float %r, float* %vla, align 4, !dbg !25, !tbaa !26
tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !18, metadata !DIExpression()), !dbg !30 tail call void @llvm.dbg.value(metadata i32 0, metadata !18, metadata !DIExpression()), !dbg !30
%cmp8 = icmp sgt i32 %conv, 0, !dbg !30 %cmp8 = icmp sgt i32 %conv, 0, !dbg !30
br i1 %cmp8, label %for.body, label %for.end, !dbg !30 br i1 %cmp8, label %for.body, label %for.end, !dbg !30
@ -41,7 +41,7 @@ for.body: ; preds = %entry, %for.body.fo
%div = fdiv float %0, %r, !dbg !31 %div = fdiv float %0, %r, !dbg !31
store float %div, float* %arrayidx2, align 4, !dbg !31, !tbaa !26 store float %div, float* %arrayidx2, align 4, !dbg !31, !tbaa !26
%inc = add nsw i32 %i.09, 1, !dbg !30 %inc = add nsw i32 %i.09, 1, !dbg !30
tail call void @llvm.dbg.value(metadata i32 %inc, i64 0, metadata !18, metadata !DIExpression()), !dbg !30 tail call void @llvm.dbg.value(metadata i32 %inc, metadata !18, metadata !DIExpression()), !dbg !30
%exitcond = icmp eq i32 %inc, %conv, !dbg !30 %exitcond = icmp eq i32 %inc, %conv, !dbg !30
br i1 %exitcond, label %for.end, label %for.body.for.body_crit_edge, !dbg !30 br i1 %exitcond, label %for.end, label %for.body.for.body_crit_edge, !dbg !30
@ -58,7 +58,7 @@ for.end: ; preds = %for.body, %entry
declare void @llvm.dbg.declare(metadata, metadata, metadata) #1 declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind optsize readnone "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind optsize readnone "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }

6
llvm/test/DebugInfo/ARM/partial-subreg.ll
View File

@ -19,12 +19,12 @@ target datalayout = "e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S3
target triple = "armv7-apple-ios7.0" target triple = "armv7-apple-ios7.0"
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0 declare void @llvm.dbg.value(metadata, metadata, metadata) #0
define <3 x float> @_TFV4simd8float2x3g9subscriptFSiVS_6float3(i32, <3 x float>, <3 x float>) !dbg !5 { define <3 x float> @_TFV4simd8float2x3g9subscriptFSiVS_6float3(i32, <3 x float>, <3 x float>) !dbg !5 {
entry: entry:
tail call void @llvm.dbg.value(metadata <3 x float> %1, i64 0, metadata !8, metadata !9), !dbg !10 tail call void @llvm.dbg.value(metadata <3 x float> %1, metadata !8, metadata !9), !dbg !10
tail call void @llvm.dbg.value(metadata <3 x float> %2, i64 0, metadata !8, metadata !11), !dbg !10 tail call void @llvm.dbg.value(metadata <3 x float> %2, metadata !8, metadata !11), !dbg !10
%3 = icmp eq i32 %0, 0, !dbg !12 %3 = icmp eq i32 %0, 0, !dbg !12
br i1 %3, label %7, label %4, !dbg !12 br i1 %3, label %7, label %4, !dbg !12

4
llvm/test/DebugInfo/ARM/s-super-register.ll
View File

@ -10,7 +10,7 @@ target triple = "thumbv7-apple-macosx10.6.7"
define void @_Z3foov() optsize ssp !dbg !1 { define void @_Z3foov() optsize ssp !dbg !1 {
entry: entry:
%call = tail call float @_Z3barv() optsize, !dbg !11 %call = tail call float @_Z3barv() optsize, !dbg !11
tail call void @llvm.dbg.value(metadata float %call, i64 0, metadata !5, metadata !DIExpression()), !dbg !11 tail call void @llvm.dbg.value(metadata float %call, metadata !5, metadata !DIExpression()), !dbg !11
%call16 = tail call float @_Z2f2v() optsize, !dbg !12 %call16 = tail call float @_Z2f2v() optsize, !dbg !12
%cmp7 = fcmp olt float %call, %call16, !dbg !12 %cmp7 = fcmp olt float %call, %call16, !dbg !12
br i1 %cmp7, label %for.body, label %for.end, !dbg !12 br i1 %cmp7, label %for.body, label %for.end, !dbg !12
@ -33,7 +33,7 @@ declare float @_Z2f2v() optsize
declare float @_Z2f3f(float) optsize declare float @_Z2f3f(float) optsize
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!20} !llvm.module.flags = !{!20}

6
llvm/test/DebugInfo/ARM/split-complex.ll
View File

@ -17,9 +17,9 @@ entry:
; CHECK-NEXT: DW_AT_location [DW_FORM_block1] (<0x04> 10 00 93 08 ) ; CHECK-NEXT: DW_AT_location [DW_FORM_block1] (<0x04> 10 00 93 08 )
; DW_AT_location ( constu 0x00000000, piece 0x00000008 ) ; DW_AT_location ( constu 0x00000000, piece 0x00000008 )
; CHECK-NEXT: DW_AT_name {{.*}} "c" ; CHECK-NEXT: DW_AT_name {{.*}} "c"
tail call void @llvm.dbg.value(metadata i64 0, i64 0, metadata !14, metadata !17), !dbg !16 tail call void @llvm.dbg.value(metadata i64 0, metadata !14, metadata !17), !dbg !16
; Manually removed to disable location list emission: ; Manually removed to disable location list emission:
; tail call void @llvm.dbg.value(metadata i64 0, i64 0, metadata !14, metadata !18), !dbg !16 ; tail call void @llvm.dbg.value(metadata i64 0, metadata !14, metadata !18), !dbg !16
ret void, !dbg !19 ret void, !dbg !19
} }
@ -27,7 +27,7 @@ entry:
declare void @llvm.dbg.declare(metadata, metadata, metadata) #0 declare void @llvm.dbg.declare(metadata, metadata, metadata) #0
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0 declare void @llvm.dbg.value(metadata, metadata, metadata) #0
attributes #0 = { nounwind readnone } attributes #0 = { nounwind readnone }

4
llvm/test/DebugInfo/ARM/sroa-complex.ll
View File

@ -19,10 +19,10 @@ entry:
; SROA will split the complex double into two i64 values, because there is ; SROA will split the complex double into two i64 values, because there is
; no native double data type available. ; no native double data type available.
; Test that debug info for both values survives: ; Test that debug info for both values survives:
; CHECK: call void @llvm.dbg.value(metadata i64 0, i64 0, ; CHECK: call void @llvm.dbg.value(metadata i64 0,
; CHECK-SAME: metadata ![[C:.*]], metadata ![[REAL:.*]]) ; CHECK-SAME: metadata ![[C:.*]], metadata ![[REAL:.*]])
store double 0.000000e+00, double* %c.imagp, align 8, !dbg !17 store double 0.000000e+00, double* %c.imagp, align 8, !dbg !17
; CHECK: call void @llvm.dbg.value(metadata i64 0, i64 0, ; CHECK: call void @llvm.dbg.value(metadata i64 0,
; CHECK-SAME: metadata ![[C]], metadata ![[IMG:.*]]) ; CHECK-SAME: metadata ![[C]], metadata ![[IMG:.*]])
ret void, !dbg !18 ret void, !dbg !18
} }

8
llvm/test/DebugInfo/COFF/comdat.ll
View File

@ -80,7 +80,7 @@ entry:
; Function Attrs: inlinehint noinline nounwind uwtable ; Function Attrs: inlinehint noinline nounwind uwtable
define linkonce_odr void @f(i32 %c) #2 comdat personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) !dbg !22 { define linkonce_odr void @f(i32 %c) #2 comdat personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) !dbg !22 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 %c, i64 0, metadata !26, metadata !27), !dbg !28 tail call void @llvm.dbg.value(metadata i32 %c, metadata !26, metadata !27), !dbg !28
%0 = load volatile i32, i32* @x, align 4, !dbg !29, !tbaa !11 %0 = load volatile i32, i32* @x, align 4, !dbg !29, !tbaa !11
%inc = add nsw i32 %0, 1, !dbg !29 %inc = add nsw i32 %0, 1, !dbg !29
store volatile i32 %inc, i32* @x, align 4, !dbg !29, !tbaa !11 store volatile i32 %inc, i32* @x, align 4, !dbg !29, !tbaa !11
@ -114,8 +114,8 @@ if.end: ; preds = %if.else, %invoke.co
; Function Attrs: nounwind ; Function Attrs: nounwind
define internal fastcc void @"\01?fin$0@0@f@@"() unnamed_addr #3 comdat($f) !dbg !41 { define internal fastcc void @"\01?fin$0@0@f@@"() unnamed_addr #3 comdat($f) !dbg !41 {
entry: entry:
tail call void @llvm.dbg.value(metadata i8* null, i64 0, metadata !44, metadata !27), !dbg !48 tail call void @llvm.dbg.value(metadata i8* null, metadata !44, metadata !27), !dbg !48
tail call void @llvm.dbg.value(metadata i8 0, i64 0, metadata !46, metadata !27), !dbg !48 tail call void @llvm.dbg.value(metadata i8 0, metadata !46, metadata !27), !dbg !48
%0 = load volatile i32, i32* @x, align 4, !dbg !49, !tbaa !11 %0 = load volatile i32, i32* @x, align 4, !dbg !49, !tbaa !11
%inc = add nsw i32 %0, 1, !dbg !49 %inc = add nsw i32 %0, 1, !dbg !49
store volatile i32 %inc, i32* @x, align 4, !dbg !49, !tbaa !11 store volatile i32 %inc, i32* @x, align 4, !dbg !49, !tbaa !11
@ -127,7 +127,7 @@ declare void @foo(...) #4
declare i32 @__C_specific_handler(...) declare i32 @__C_specific_handler(...)
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #5 declare void @llvm.dbg.value(metadata, metadata, metadata) #5
attributes #0 = { norecurse nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { norecurse nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }

4
llvm/test/DebugInfo/COFF/fp-stack.ll
View File

@ -6,7 +6,7 @@ target triple = "i686-pc-windows-msvc18.0.0"
define double @f(double %p1) !dbg !4 { define double @f(double %p1) !dbg !4 {
entry: entry:
%sub = fsub double -0.000000e+00, %p1, !dbg !16 %sub = fsub double -0.000000e+00, %p1, !dbg !16
tail call void @llvm.dbg.value(metadata double %sub, i64 0, metadata !10, metadata !14), !dbg !15 tail call void @llvm.dbg.value(metadata double %sub, metadata !10, metadata !14), !dbg !15
ret double %sub ret double %sub
} }
@ -22,7 +22,7 @@ entry:
; OBJ: } ; OBJ: }
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) declare void @llvm.dbg.value(metadata, metadata, metadata)
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!11, !12} !llvm.module.flags = !{!11, !12}

4
llvm/test/DebugInfo/COFF/local-constant.ll
View File

@ -32,7 +32,7 @@ target triple = "x86_64-pc-windows-msvc18.0.0"
; Function Attrs: nounwind uwtable ; Function Attrs: nounwind uwtable
define void @"\01?constant_var@@YAXXZ"() #0 !dbg !4 { define void @"\01?constant_var@@YAXXZ"() #0 !dbg !4 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 42, i64 0, metadata !8, metadata !14), !dbg !15 tail call void @llvm.dbg.value(metadata i32 42, metadata !8, metadata !14), !dbg !15
tail call void @"\01?useint@@YAXH@Z"(i32 42) #3, !dbg !16 tail call void @"\01?useint@@YAXH@Z"(i32 42) #3, !dbg !16
tail call void @"\01?useint@@YAXH@Z"(i32 42) #3, !dbg !17 tail call void @"\01?useint@@YAXH@Z"(i32 42) #3, !dbg !17
ret void, !dbg !18 ret void, !dbg !18
@ -41,7 +41,7 @@ entry:
declare void @"\01?useint@@YAXH@Z"(i32) #1 declare void @"\01?useint@@YAXH@Z"(i32) #1
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }

4
llvm/test/DebugInfo/COFF/local-variable-gap.ll
View File

@ -100,7 +100,7 @@ entry:
if.then: ; preds = %entry if.then: ; preds = %entry
%call1 = tail call i32 bitcast (i32 (...)* @vardef to i32 ()*)() #4, !dbg !17 %call1 = tail call i32 bitcast (i32 (...)* @vardef to i32 ()*)() #4, !dbg !17
tail call void @llvm.dbg.value(metadata i32 %call1, i64 0, metadata !12, metadata !18), !dbg !19 tail call void @llvm.dbg.value(metadata i32 %call1, metadata !12, metadata !18), !dbg !19
%call2 = tail call i32 bitcast (i32 (...)* @barrier to i32 ()*)() #4, !dbg !20 %call2 = tail call i32 bitcast (i32 (...)* @barrier to i32 ()*)() #4, !dbg !20
%tobool3 = icmp eq i32 %call2, 0, !dbg !20 %tobool3 = icmp eq i32 %call2, 0, !dbg !20
br i1 %tobool3, label %if.end, label %if.then4, !dbg !22 br i1 %tobool3, label %if.end, label %if.then4, !dbg !22
@ -131,7 +131,7 @@ declare void @call_noreturn(i32) local_unnamed_addr #2
declare void @use(i32) local_unnamed_addr #1 declare void @use(i32) local_unnamed_addr #1
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #3 declare void @llvm.dbg.value(metadata, metadata, metadata) #3
attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }

28
llvm/test/DebugInfo/COFF/pieces.ll
View File

@ -249,10 +249,10 @@ target triple = "x86_64-pc-windows-msvc19.0.24210"
define i32 @loop_csr() local_unnamed_addr #0 !dbg !7 { define i32 @loop_csr() local_unnamed_addr #0 !dbg !7 {
entry: entry:
tail call void @llvm.dbg.declare(metadata %struct.IntPair* undef, metadata !12, metadata !17), !dbg !18 tail call void @llvm.dbg.declare(metadata %struct.IntPair* undef, metadata !12, metadata !17), !dbg !18
tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !12, metadata !19), !dbg !18 tail call void @llvm.dbg.value(metadata i32 0, metadata !12, metadata !19), !dbg !18
tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !12, metadata !20), !dbg !18 tail call void @llvm.dbg.value(metadata i32 0, metadata !12, metadata !20), !dbg !18
tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !12, metadata !19), !dbg !18 tail call void @llvm.dbg.value(metadata i32 0, metadata !12, metadata !19), !dbg !18
tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !12, metadata !20), !dbg !18 tail call void @llvm.dbg.value(metadata i32 0, metadata !12, metadata !20), !dbg !18
store i32 0, i32* @i, align 4, !dbg !21, !tbaa !24 store i32 0, i32* @i, align 4, !dbg !21, !tbaa !24
%0 = load i32, i32* @n, align 4, !dbg !28, !tbaa !24 %0 = load i32, i32* @n, align 4, !dbg !28, !tbaa !24
%cmp9 = icmp sgt i32 %0, 0, !dbg !29 %cmp9 = icmp sgt i32 %0, 0, !dbg !29
@ -261,12 +261,12 @@ entry:
for.body: ; preds = %entry, %for.body for.body: ; preds = %entry, %for.body
%o.sroa.0.011 = phi i32 [ %call, %for.body ], [ 0, %entry ] %o.sroa.0.011 = phi i32 [ %call, %for.body ], [ 0, %entry ]
%o.sroa.5.010 = phi i32 [ %call2, %for.body ], [ 0, %entry ] %o.sroa.5.010 = phi i32 [ %call2, %for.body ], [ 0, %entry ]
tail call void @llvm.dbg.value(metadata i32 %o.sroa.0.011, i64 0, metadata !12, metadata !19), !dbg !18 tail call void @llvm.dbg.value(metadata i32 %o.sroa.0.011, metadata !12, metadata !19), !dbg !18
tail call void @llvm.dbg.value(metadata i32 %o.sroa.5.010, i64 0, metadata !12, metadata !20), !dbg !18 tail call void @llvm.dbg.value(metadata i32 %o.sroa.5.010, metadata !12, metadata !20), !dbg !18
%call = tail call i32 @g(i32 %o.sroa.0.011) #5, !dbg !31 %call = tail call i32 @g(i32 %o.sroa.0.011) #5, !dbg !31
tail call void @llvm.dbg.value(metadata i32 %call, i64 0, metadata !12, metadata !19), !dbg !18 tail call void @llvm.dbg.value(metadata i32 %call, metadata !12, metadata !19), !dbg !18
%call2 = tail call i32 @g(i32 %o.sroa.5.010) #5, !dbg !33 %call2 = tail call i32 @g(i32 %o.sroa.5.010) #5, !dbg !33
tail call void @llvm.dbg.value(metadata i32 %call2, i64 0, metadata !12, metadata !20), !dbg !18 tail call void @llvm.dbg.value(metadata i32 %call2, metadata !12, metadata !20), !dbg !18
%1 = load i32, i32* @i, align 4, !dbg !21, !tbaa !24 %1 = load i32, i32* @i, align 4, !dbg !21, !tbaa !24
%inc = add nsw i32 %1, 1, !dbg !21 %inc = add nsw i32 %1, 1, !dbg !21
store i32 %inc, i32* @i, align 4, !dbg !21, !tbaa !24 store i32 %inc, i32* @i, align 4, !dbg !21, !tbaa !24
@ -291,7 +291,7 @@ define i32 @pad_right(i64 %o.coerce) local_unnamed_addr #3 !dbg !38 {
entry: entry:
%o.sroa.1.0.extract.shift = lshr i64 %o.coerce, 32 %o.sroa.1.0.extract.shift = lshr i64 %o.coerce, 32
%o.sroa.1.0.extract.trunc = trunc i64 %o.sroa.1.0.extract.shift to i32 %o.sroa.1.0.extract.trunc = trunc i64 %o.sroa.1.0.extract.shift to i32
tail call void @llvm.dbg.value(metadata i32 %o.sroa.1.0.extract.trunc, i64 0, metadata !47, metadata !20), !dbg !48 tail call void @llvm.dbg.value(metadata i32 %o.sroa.1.0.extract.trunc, metadata !47, metadata !20), !dbg !48
tail call void @llvm.dbg.declare(metadata %struct.PadRight* undef, metadata !47, metadata !17), !dbg !48 tail call void @llvm.dbg.declare(metadata %struct.PadRight* undef, metadata !47, metadata !17), !dbg !48
ret i32 %o.sroa.1.0.extract.trunc, !dbg !49 ret i32 %o.sroa.1.0.extract.trunc, !dbg !49
} }
@ -300,7 +300,7 @@ entry:
define i32 @pad_left(i64 %o.coerce) local_unnamed_addr #3 !dbg !50 { define i32 @pad_left(i64 %o.coerce) local_unnamed_addr #3 !dbg !50 {
entry: entry:
%o.sroa.0.0.extract.trunc = trunc i64 %o.coerce to i32 %o.sroa.0.0.extract.trunc = trunc i64 %o.coerce to i32
tail call void @llvm.dbg.value(metadata i32 %o.sroa.0.0.extract.trunc, i64 0, metadata !58, metadata !19), !dbg !59 tail call void @llvm.dbg.value(metadata i32 %o.sroa.0.0.extract.trunc, metadata !58, metadata !19), !dbg !59
tail call void @llvm.dbg.declare(metadata %struct.PadLeft* undef, metadata !58, metadata !17), !dbg !59 tail call void @llvm.dbg.declare(metadata %struct.PadLeft* undef, metadata !58, metadata !17), !dbg !59
ret i32 %o.sroa.0.0.extract.trunc, !dbg !60 ret i32 %o.sroa.0.0.extract.trunc, !dbg !60
} }
@ -312,7 +312,7 @@ entry:
tail call void @llvm.dbg.declare(metadata %struct.PadLeft* undef, metadata !72, metadata !17), !dbg !75 tail call void @llvm.dbg.declare(metadata %struct.PadLeft* undef, metadata !72, metadata !17), !dbg !75
%p.sroa.3.0..sroa_idx2 = getelementptr inbounds %struct.Nested, %struct.Nested* %o, i64 0, i32 0, i64 1, i32 1, !dbg !76 %p.sroa.3.0..sroa_idx2 = getelementptr inbounds %struct.Nested, %struct.Nested* %o, i64 0, i32 0, i64 1, i32 1, !dbg !76
%p.sroa.3.0.copyload = load i32, i32* %p.sroa.3.0..sroa_idx2, align 4, !dbg !76 %p.sroa.3.0.copyload = load i32, i32* %p.sroa.3.0..sroa_idx2, align 4, !dbg !76
tail call void @llvm.dbg.value(metadata i32 %p.sroa.3.0.copyload, i64 0, metadata !72, metadata !20), !dbg !75 tail call void @llvm.dbg.value(metadata i32 %p.sroa.3.0.copyload, metadata !72, metadata !20), !dbg !75
ret i32 %p.sroa.3.0.copyload, !dbg !77 ret i32 %p.sroa.3.0.copyload, !dbg !77
} }
@ -320,15 +320,15 @@ entry:
define i32 @bitpiece_spill() local_unnamed_addr #0 !dbg !78 { define i32 @bitpiece_spill() local_unnamed_addr #0 !dbg !78 {
entry: entry:
tail call void @llvm.dbg.declare(metadata %struct.IntPair* undef, metadata !80, metadata !17), !dbg !81 tail call void @llvm.dbg.declare(metadata %struct.IntPair* undef, metadata !80, metadata !17), !dbg !81
tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !80, metadata !19), !dbg !81 tail call void @llvm.dbg.value(metadata i32 0, metadata !80, metadata !19), !dbg !81
%call = tail call i32 @g(i32 0) #5, !dbg !82 %call = tail call i32 @g(i32 0) #5, !dbg !82
tail call void @llvm.dbg.value(metadata i32 %call, i64 0, metadata !80, metadata !20), !dbg !81 tail call void @llvm.dbg.value(metadata i32 %call, metadata !80, metadata !20), !dbg !81
tail call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{dirflag},~{fpsr},~{flags}"() #5, !dbg !83, !srcloc !84 tail call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{dirflag},~{fpsr},~{flags}"() #5, !dbg !83, !srcloc !84
ret i32 %call, !dbg !85 ret i32 %call, !dbg !85
} }
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }

14
llvm/test/DebugInfo/COFF/register-variables.ll
View File

@ -198,25 +198,25 @@ target triple = "x86_64-pc-windows-msvc18.0.0"
; Function Attrs: nounwind uwtable ; Function Attrs: nounwind uwtable
define void @f(i32 %p) #0 !dbg !12 { define void @f(i32 %p) #0 !dbg !12 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 %p, i64 0, metadata !16, metadata !23), !dbg !24 tail call void @llvm.dbg.value(metadata i32 %p, metadata !16, metadata !23), !dbg !24
%tobool = icmp eq i32 %p, 0, !dbg !25 %tobool = icmp eq i32 %p, 0, !dbg !25
%call2 = tail call i32 @getint() #3, !dbg !26 %call2 = tail call i32 @getint() #3, !dbg !26
br i1 %tobool, label %if.else, label %if.then, !dbg !27 br i1 %tobool, label %if.else, label %if.then, !dbg !27
if.then: ; preds = %entry if.then: ; preds = %entry
tail call void @llvm.dbg.value(metadata i32 %call2, i64 0, metadata !17, metadata !23), !dbg !28 tail call void @llvm.dbg.value(metadata i32 %call2, metadata !17, metadata !23), !dbg !28
tail call void @llvm.dbg.value(metadata i32 %call2, i64 0, metadata !29, metadata !23), !dbg !35 tail call void @llvm.dbg.value(metadata i32 %call2, metadata !29, metadata !23), !dbg !35
%add.i = add nsw i32 %call2, 1, !dbg !37 %add.i = add nsw i32 %call2, 1, !dbg !37
tail call void @llvm.dbg.value(metadata i32 %add.i, i64 0, metadata !34, metadata !23), !dbg !38 tail call void @llvm.dbg.value(metadata i32 %add.i, metadata !34, metadata !23), !dbg !38
%0 = load volatile i32, i32* @x, align 4, !dbg !39, !tbaa !40 %0 = load volatile i32, i32* @x, align 4, !dbg !39, !tbaa !40
%inc.i = add nsw i32 %0, 1, !dbg !39 %inc.i = add nsw i32 %0, 1, !dbg !39
store volatile i32 %inc.i, i32* @x, align 4, !dbg !39, !tbaa !40 store volatile i32 %inc.i, i32* @x, align 4, !dbg !39, !tbaa !40
tail call void @llvm.dbg.value(metadata i32 %add.i, i64 0, metadata !20, metadata !23), !dbg !44 tail call void @llvm.dbg.value(metadata i32 %add.i, metadata !20, metadata !23), !dbg !44
tail call void @putint(i32 %add.i) #3, !dbg !45 tail call void @putint(i32 %add.i) #3, !dbg !45
br label %if.end, !dbg !46 br label %if.end, !dbg !46
if.else: ; preds = %entry if.else: ; preds = %entry
tail call void @llvm.dbg.value(metadata i32 %call2, i64 0, metadata !21, metadata !23), !dbg !47 tail call void @llvm.dbg.value(metadata i32 %call2, metadata !21, metadata !23), !dbg !47
tail call void @putint(i32 %call2) #3, !dbg !48 tail call void @putint(i32 %call2) #3, !dbg !48
br label %if.end br label %if.end
@ -229,7 +229,7 @@ declare i32 @getint() #1
declare void @putint(i32) #1 declare void @putint(i32) #1
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }

4
llvm/test/DebugInfo/COFF/types-calling-conv.ll
View File

@ -165,7 +165,7 @@ target triple = "i386-pc-windows-msvc19.0.23918"
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
define x86_thiscallcc void @"\01?thiscallcc@A@@QAEXXZ"(%struct.A* nocapture %this) #0 align 2 !dbg !6 { define x86_thiscallcc void @"\01?thiscallcc@A@@QAEXXZ"(%struct.A* nocapture %this) #0 align 2 !dbg !6 {
entry: entry:
tail call void @llvm.dbg.value(metadata %struct.A* %this, i64 0, metadata !14, metadata !16), !dbg !17 tail call void @llvm.dbg.value(metadata %struct.A* %this, metadata !14, metadata !16), !dbg !17
ret void, !dbg !18 ret void, !dbg !18
} }
@ -194,7 +194,7 @@ entry:
} }
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { nounwind readnone "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="pentium4" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind readnone "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="pentium4" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { norecurse nounwind readnone "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="pentium4" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { norecurse nounwind readnone "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="pentium4" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }

2
llvm/test/DebugInfo/Generic/2009-11-10-CurrentFn.ll
View File

@ -8,7 +8,7 @@ entry:
declare void @foo(...) declare void @foo(...)
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!18} !llvm.module.flags = !{!18}

8
llvm/test/DebugInfo/Generic/2010-05-03-OriginDIE.ll
View File

@ -25,10 +25,10 @@ entry:
%a12 = load i64, i64* %a11, align 4, !dbg !7 ; <i64> [#uses=1] %a12 = load i64, i64* %a11, align 4, !dbg !7 ; <i64> [#uses=1]
call void @llvm.dbg.declare(metadata i64* %data_addr.i17, metadata !8, metadata !DIExpression()) nounwind, !dbg !14 call void @llvm.dbg.declare(metadata i64* %data_addr.i17, metadata !8, metadata !DIExpression()) nounwind, !dbg !14
store i64 %a12, i64* %data_addr.i17, align 8 store i64 %a12, i64* %data_addr.i17, align 8
call void @llvm.dbg.value(metadata !6, i64 0, metadata !15, metadata !DIExpression()) nounwind, !dbg !DILocation(scope: !16) call void @llvm.dbg.value(metadata !6, metadata !15, metadata !DIExpression()) nounwind, !dbg !DILocation(scope: !16)
call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !19, metadata !DIExpression()) nounwind, !dbg !DILocation(scope: !16) call void @llvm.dbg.value(metadata i32 0, metadata !19, metadata !DIExpression()) nounwind, !dbg !DILocation(scope: !16)
call void @llvm.dbg.declare(metadata !6, metadata !23, metadata !DIExpression()) nounwind, !dbg !DILocation(scope: !24) call void @llvm.dbg.declare(metadata !6, metadata !23, metadata !DIExpression()) nounwind, !dbg !DILocation(scope: !24)
call void @llvm.dbg.value(metadata i64* %data_addr.i17, i64 0, metadata !34, metadata !DIExpression(DW_OP_deref)) nounwind, !dbg !DILocation(scope: !24) call void @llvm.dbg.value(metadata i64* %data_addr.i17, metadata !34, metadata !DIExpression(DW_OP_deref)) nounwind, !dbg !DILocation(scope: !24)
%a13 = load volatile i64, i64* %data_addr.i17, align 8 ; <i64> [#uses=1] %a13 = load volatile i64, i64* %data_addr.i17, align 8 ; <i64> [#uses=1]
%a14 = call i64 @llvm.bswap.i64(i64 %a13) nounwind ; <i64> [#uses=2] %a14 = call i64 @llvm.bswap.i64(i64 %a13) nounwind ; <i64> [#uses=2]
%a15 = add i64 %a10, %a14, !dbg !7 ; <i64> [#uses=1] %a15 = add i64 %a10, %a14, !dbg !7 ; <i64> [#uses=1]
@ -40,7 +40,7 @@ entry:
declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
declare i32 @llvm.bswap.i32(i32) nounwind readnone declare i32 @llvm.bswap.i32(i32) nounwind readnone

4
llvm/test/DebugInfo/Generic/2010-06-29-InlinedFnLocalVar.ll
View File

@ -13,13 +13,13 @@ source_filename = "test/DebugInfo/Generic/2010-06-29-InlinedFnLocalVar.ll"
declare void @llvm.dbg.declare(metadata, metadata, metadata) #0 declare void @llvm.dbg.declare(metadata, metadata, metadata) #0
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0 declare void @llvm.dbg.value(metadata, metadata, metadata) #0
; Function Attrs: nounwind ssp ; Function Attrs: nounwind ssp
define i32 @bar() #1 !dbg !8 { define i32 @bar() #1 !dbg !8 {
entry: entry:
%0 = load i32, i32* @i, align 4, !dbg !11 %0 = load i32, i32* @i, align 4, !dbg !11
tail call void @llvm.dbg.value(metadata i32 %0, i64 0, metadata !13, metadata !24), !dbg !25 tail call void @llvm.dbg.value(metadata i32 %0, metadata !13, metadata !24), !dbg !25
tail call void @llvm.dbg.declare(metadata !5, metadata !18, metadata !24), !dbg !26 tail call void @llvm.dbg.declare(metadata !5, metadata !18, metadata !24), !dbg !26
%1 = mul nsw i32 %0, %0, !dbg !27 %1 = mul nsw i32 %0, %0, !dbg !27
store i32 %1, i32* @i, align 4, !dbg !11 store i32 %1, i32* @i, align 4, !dbg !11

4
llvm/test/DebugInfo/Generic/dead-argument-order.ll
View File

@ -39,7 +39,7 @@
define i32 @_Z8function1Si(i32 %s.coerce, i32 %i) #0 !dbg !9 { define i32 @_Z8function1Si(i32 %s.coerce, i32 %i) #0 !dbg !9 {
entry: entry:
tail call void @llvm.dbg.declare(metadata %struct.S* undef, metadata !14, metadata !DIExpression()), !dbg !20 tail call void @llvm.dbg.declare(metadata %struct.S* undef, metadata !14, metadata !DIExpression()), !dbg !20
tail call void @llvm.dbg.value(metadata i32 %i, i64 0, metadata !15, metadata !DIExpression()), !dbg !20 tail call void @llvm.dbg.value(metadata i32 %i, metadata !15, metadata !DIExpression()), !dbg !20
%add = add nsw i32 %i, %s.coerce, !dbg !20 %add = add nsw i32 %i, %s.coerce, !dbg !20
ret i32 %add, !dbg !20 ret i32 %add, !dbg !20
} }
@ -48,7 +48,7 @@ entry:
declare void @llvm.dbg.declare(metadata, metadata, metadata) #1 declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind readnone uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind readnone uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }

4
llvm/test/DebugInfo/Generic/gvn.ll
View File

@ -27,7 +27,7 @@ entry:
; CHECK: %call = tail call i32 @f2(i32 1) #{{[0-9]}}, !dbg ; CHECK: %call = tail call i32 @f2(i32 1) #{{[0-9]}}, !dbg
%call = tail call i32 @f2(i32 1) #0, !dbg !15 %call = tail call i32 @f2(i32 1) #0, !dbg !15
store i32 %call, i32* @a, align 4, !dbg !15, !tbaa !24 store i32 %call, i32* @a, align 4, !dbg !15, !tbaa !24
tail call void @llvm.dbg.value(metadata i32* @a, i64 0, metadata !22, metadata !28) #0, !dbg !29 tail call void @llvm.dbg.value(metadata i32* @a, metadata !22, metadata !28) #0, !dbg !29
%0 = load i32, i32* @b, align 4, !dbg !29, !tbaa !24 %0 = load i32, i32* @b, align 4, !dbg !29, !tbaa !24
%tobool.i = icmp eq i32 %0, 0, !dbg !29 %tobool.i = icmp eq i32 %0, 0, !dbg !29
br i1 %tobool.i, label %if.end.i, label %land.lhs.true.i.thread, !dbg !30 br i1 %tobool.i, label %if.end.i, label %land.lhs.true.i.thread, !dbg !30
@ -58,7 +58,7 @@ declare i32 @f2(i32)
declare i32 @f4(...) declare i32 @f4(...)
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind } attributes #0 = { nounwind }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }

6
llvm/test/DebugInfo/Generic/incorrect-variable-debugloc.ll
View File

@ -110,7 +110,7 @@ entry:
; <label>:30 ; preds = %24, %5 ; <label>:30 ; preds = %24, %5
store i32 0, i32* %i.i, align 4, !dbg !39, !tbaa !41 store i32 0, i32* %i.i, align 4, !dbg !39, !tbaa !41
tail call void @llvm.dbg.value(metadata %struct.C* %8, i64 0, metadata !27, metadata !DIExpression(DW_OP_deref)), !dbg !46 tail call void @llvm.dbg.value(metadata %struct.C* %8, metadata !27, metadata !DIExpression(DW_OP_deref)), !dbg !46
call void @_ZN1C5m_fn3Ev(%struct.C* %8), !dbg !47 call void @_ZN1C5m_fn3Ev(%struct.C* %8), !dbg !47
unreachable, !dbg !47 unreachable, !dbg !47
} }
@ -145,7 +145,7 @@ entry:
%16 = add i64 %15, 0, !dbg !48 %16 = add i64 %15, 0, !dbg !48
%17 = inttoptr i64 %16 to i64*, !dbg !48 %17 = inttoptr i64 %16 to i64*, !dbg !48
store i64 -868083113472691727, i64* %17, !dbg !48 store i64 -868083113472691727, i64* %17, !dbg !48
tail call void @llvm.dbg.value(metadata %struct.C* %this, i64 0, metadata !30, metadata !DIExpression()), !dbg !48 tail call void @llvm.dbg.value(metadata %struct.C* %this, metadata !30, metadata !DIExpression()), !dbg !48
%call = call i32 @_ZN1A5m_fn1Ev(%struct.A* %8), !dbg !49 %call = call i32 @_ZN1A5m_fn1Ev(%struct.A* %8), !dbg !49
%i.i = getelementptr inbounds %struct.C, %struct.C* %this, i64 0, i32 1, i32 0, !dbg !50 %i.i = getelementptr inbounds %struct.C, %struct.C* %this, i64 0, i32 1, i32 0, !dbg !50
%18 = ptrtoint i32* %i.i to i64, !dbg !50 %18 = ptrtoint i32* %i.i to i64, !dbg !50
@ -198,7 +198,7 @@ entry:
declare i32 @_ZN1A5m_fn1Ev(%struct.A*) #2 declare i32 @_ZN1A5m_fn1Ev(%struct.A*) #2
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #3 declare void @llvm.dbg.value(metadata, metadata, metadata) #3
define internal void @asan.module_ctor() { define internal void @asan.module_ctor() {
tail call void @__asan_init_v3() tail call void @__asan_init_v3()

8
llvm/test/DebugInfo/Generic/incorrect-variable-debugloc1.ll
View File

@ -30,12 +30,12 @@
define i32 @main() #0 !dbg !4 { define i32 @main() #0 !dbg !4 {
entry: entry:
%c = alloca i32, align 4 %c = alloca i32, align 4
tail call void @llvm.dbg.value(metadata i32 13, i64 0, metadata !10, metadata !16), !dbg !17 tail call void @llvm.dbg.value(metadata i32 13, metadata !10, metadata !16), !dbg !17
store volatile i32 13, i32* %c, align 4, !dbg !18 store volatile i32 13, i32* %c, align 4, !dbg !18
%call = tail call i32 @_Z4funcv(), !dbg !19 %call = tail call i32 @_Z4funcv(), !dbg !19
tail call void @llvm.dbg.value(metadata i32 %call, i64 0, metadata !10, metadata !16), !dbg !17 tail call void @llvm.dbg.value(metadata i32 %call, metadata !10, metadata !16), !dbg !17
store volatile i32 %call, i32* %c, align 4, !dbg !19 store volatile i32 %call, i32* %c, align 4, !dbg !19
tail call void @llvm.dbg.value(metadata i32* %c, i64 0, metadata !10, metadata !21), !dbg !17 tail call void @llvm.dbg.value(metadata i32* %c, metadata !10, metadata !21), !dbg !17
%c.0.c.0. = load volatile i32, i32* %c, align 4, !dbg !20 %c.0.c.0. = load volatile i32, i32* %c, align 4, !dbg !20
ret i32 %c.0.c.0., !dbg !20 ret i32 %c.0.c.0., !dbg !20
} }
@ -43,7 +43,7 @@ entry:
declare i32 @_Z4funcv() #1 declare i32 @_Z4funcv() #1
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }

10
llvm/test/DebugInfo/Generic/inlined-arguments.ll
View File

@ -24,16 +24,16 @@
; Function Attrs: uwtable ; Function Attrs: uwtable
define void @_Z2f2v() #0 !dbg !4 { define void @_Z2f2v() #0 !dbg !4 {
tail call void @llvm.dbg.value(metadata i32 undef, i64 0, metadata !16, metadata !DIExpression()), !dbg !18 tail call void @llvm.dbg.value(metadata i32 undef, metadata !16, metadata !DIExpression()), !dbg !18
tail call void @llvm.dbg.value(metadata i32 2, i64 0, metadata !20, metadata !DIExpression()), !dbg !18 tail call void @llvm.dbg.value(metadata i32 2, metadata !20, metadata !DIExpression()), !dbg !18
tail call void @_Z2f3i(i32 2), !dbg !21 tail call void @_Z2f3i(i32 2), !dbg !21
ret void, !dbg !22 ret void, !dbg !22
} }
; Function Attrs: uwtable ; Function Attrs: uwtable
define void @_Z2f1ii(i32 %x, i32 %y) #0 !dbg !8 { define void @_Z2f1ii(i32 %x, i32 %y) #0 !dbg !8 {
tail call void @llvm.dbg.value(metadata i32 %x, i64 0, metadata !13, metadata !DIExpression()), !dbg !23 tail call void @llvm.dbg.value(metadata i32 %x, metadata !13, metadata !DIExpression()), !dbg !23
tail call void @llvm.dbg.value(metadata i32 %y, i64 0, metadata !14, metadata !DIExpression()), !dbg !23 tail call void @llvm.dbg.value(metadata i32 %y, metadata !14, metadata !DIExpression()), !dbg !23
tail call void @_Z2f3i(i32 %y), !dbg !24 tail call void @_Z2f3i(i32 %y), !dbg !24
ret void, !dbg !25 ret void, !dbg !25
} }
@ -41,7 +41,7 @@ define void @_Z2f1ii(i32 %x, i32 %y) #0 !dbg !8 {
declare void @_Z2f3i(i32) #1 declare void @_Z2f3i(i32) #1
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }

6
llvm/test/DebugInfo/Generic/inlined-vars.ll
View File

@ -4,8 +4,8 @@
define i32 @main() uwtable !dbg !5 { define i32 @main() uwtable !dbg !5 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !18, metadata !DIExpression()), !dbg !21 tail call void @llvm.dbg.value(metadata i32 0, metadata !18, metadata !DIExpression()), !dbg !21
tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !22, metadata !DIExpression()), !dbg !23 tail call void @llvm.dbg.value(metadata i32 0, metadata !22, metadata !DIExpression()), !dbg !23
tail call void @smth(i32 0), !dbg !24 tail call void @smth(i32 0), !dbg !24
tail call void @smth(i32 0), !dbg !25 tail call void @smth(i32 0), !dbg !25
ret i32 0, !dbg !19 ret i32 0, !dbg !19
@ -13,7 +13,7 @@ entry:
declare void @smth(i32) declare void @smth(i32)
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!27} !llvm.module.flags = !{!27}

10
llvm/test/DebugInfo/Generic/missing-abstract-variable.ll
View File

@ -99,7 +99,7 @@
; Function Attrs: uwtable ; Function Attrs: uwtable
define void @_Z1bv() #0 !dbg !4 { define void @_Z1bv() #0 !dbg !4 {
entry: entry:
tail call void @llvm.dbg.value(metadata i1 false, i64 0, metadata !25, metadata !DIExpression()), !dbg !27 tail call void @llvm.dbg.value(metadata i1 false, metadata !25, metadata !DIExpression()), !dbg !27
tail call void @_Z1fi(i32 0), !dbg !28 tail call void @_Z1fi(i32 0), !dbg !28
ret void, !dbg !29 ret void, !dbg !29
} }
@ -107,13 +107,13 @@ entry:
; Function Attrs: uwtable ; Function Attrs: uwtable
define void @_Z1ab(i1 zeroext %u) #0 !dbg !8 { define void @_Z1ab(i1 zeroext %u) #0 !dbg !8 {
entry: entry:
tail call void @llvm.dbg.value(metadata i1 %u, i64 0, metadata !13, metadata !DIExpression()), !dbg !30 tail call void @llvm.dbg.value(metadata i1 %u, metadata !13, metadata !DIExpression()), !dbg !30
tail call void @llvm.dbg.value(metadata i1 %u, i64 0, metadata !31, metadata !DIExpression()), !dbg !33 tail call void @llvm.dbg.value(metadata i1 %u, metadata !31, metadata !DIExpression()), !dbg !33
br i1 %u, label %if.then.i, label %_Z1xb.exit, !dbg !34 br i1 %u, label %if.then.i, label %_Z1xb.exit, !dbg !34
if.then.i: ; preds = %entry if.then.i: ; preds = %entry
%0 = load i32, i32* @t, align 4, !dbg !35, !tbaa !36 %0 = load i32, i32* @t, align 4, !dbg !35, !tbaa !36
tail call void @llvm.dbg.value(metadata i32 %0, i64 0, metadata !40, metadata !DIExpression()), !dbg !35 tail call void @llvm.dbg.value(metadata i32 %0, metadata !40, metadata !DIExpression()), !dbg !35
tail call void @_Z1fi(i32 %0), !dbg !41 tail call void @_Z1fi(i32 %0), !dbg !41
br label %_Z1xb.exit, !dbg !42 br label %_Z1xb.exit, !dbg !42
@ -125,7 +125,7 @@ _Z1xb.exit: ; preds = %entry, %if.then.i
declare void @_Z1fi(i32) #1 declare void @_Z1fi(i32) #1
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }

6
llvm/test/DebugInfo/Generic/piece-verifier.ll
View File

@ -5,8 +5,8 @@ target triple = "x86_64-apple-macosx10.9.0"
; Function Attrs: nounwind ssp uwtable ; Function Attrs: nounwind ssp uwtable
define i32 @foo(i64 %s.coerce0, i32 %s.coerce1) #0 !dbg !4 { define i32 @foo(i64 %s.coerce0, i32 %s.coerce1) #0 !dbg !4 {
entry: entry:
call void @llvm.dbg.value(metadata i64 %s.coerce0, i64 0, metadata !20, metadata !24), !dbg !21 call void @llvm.dbg.value(metadata i64 %s.coerce0, metadata !20, metadata !24), !dbg !21
call void @llvm.dbg.value(metadata i32 %s.coerce1, i64 0, metadata !22, metadata !27), !dbg !21 call void @llvm.dbg.value(metadata i32 %s.coerce1, metadata !22, metadata !27), !dbg !21
ret i32 %s.coerce1, !dbg !23 ret i32 %s.coerce1, !dbg !23
} }
@ -14,7 +14,7 @@ entry:
declare void @llvm.dbg.declare(metadata, metadata, metadata) #1 declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind ssp uwtable "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" } attributes #0 = { nounwind ssp uwtable "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }

10
llvm/test/DebugInfo/Generic/recursive_inlining.ll
View File

@ -95,7 +95,7 @@ define void @_Z3fn6v() #0 !dbg !20 {
entry: entry:
tail call void @_Z3fn8v() #3, !dbg !23 tail call void @_Z3fn8v() #3, !dbg !23
%0 = load %struct.C*, %struct.C** @x, align 8, !dbg !24, !tbaa !25 %0 = load %struct.C*, %struct.C** @x, align 8, !dbg !24, !tbaa !25
tail call void @llvm.dbg.value(metadata %struct.C* %0, i64 0, metadata !29, metadata !32) #3, !dbg !33 tail call void @llvm.dbg.value(metadata %struct.C* %0, metadata !29, metadata !32) #3, !dbg !33
tail call void @_Z3fn8v() #3, !dbg !34 tail call void @_Z3fn8v() #3, !dbg !34
%b.i = getelementptr inbounds %struct.C, %struct.C* %0, i64 0, i32 0, !dbg !35 %b.i = getelementptr inbounds %struct.C, %struct.C* %0, i64 0, i32 0, !dbg !35
%1 = load i32, i32* %b.i, align 4, !dbg !35, !tbaa !37 %1 = load i32, i32* %b.i, align 4, !dbg !35, !tbaa !37
@ -117,7 +117,7 @@ declare void @_Z3fn8v() #1
define linkonce_odr void @_ZN1C5m_fn2Ev(%struct.C* nocapture readonly %this) #0 align 2 !dbg !30 { define linkonce_odr void @_ZN1C5m_fn2Ev(%struct.C* nocapture readonly %this) #0 align 2 !dbg !30 {
entry: entry:
tail call void @llvm.dbg.value(metadata %struct.C* %this, i64 0, metadata !29, metadata !32), !dbg !44 tail call void @llvm.dbg.value(metadata %struct.C* %this, metadata !29, metadata !32), !dbg !44
tail call void @_Z3fn8v() #3, !dbg !45 tail call void @_Z3fn8v() #3, !dbg !45
%b = getelementptr inbounds %struct.C, %struct.C* %this, i64 0, i32 0, !dbg !46 %b = getelementptr inbounds %struct.C, %struct.C* %this, i64 0, i32 0, !dbg !46
%0 = load i32, i32* %b, align 4, !dbg !46, !tbaa !37 %0 = load i32, i32* %b, align 4, !dbg !46, !tbaa !37
@ -131,7 +131,7 @@ if.then: ; preds = %entry
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
tail call void @_Z3fn8v() #3, !dbg !48 tail call void @_Z3fn8v() #3, !dbg !48
%1 = load %struct.C*, %struct.C** @x, align 8, !dbg !52, !tbaa !25 %1 = load %struct.C*, %struct.C** @x, align 8, !dbg !52, !tbaa !25
tail call void @llvm.dbg.value(metadata %struct.C* %1, i64 0, metadata !29, metadata !32) #3, !dbg !53 tail call void @llvm.dbg.value(metadata %struct.C* %1, metadata !29, metadata !32) #3, !dbg !53
tail call void @_Z3fn8v() #3, !dbg !54 tail call void @_Z3fn8v() #3, !dbg !54
%b.i.i = getelementptr inbounds %struct.C, %struct.C* %1, i64 0, i32 0, !dbg !55 %b.i.i = getelementptr inbounds %struct.C, %struct.C* %1, i64 0, i32 0, !dbg !55
%2 = load i32, i32* %b.i.i, align 4, !dbg !55, !tbaa !37 %2 = load i32, i32* %b.i.i, align 4, !dbg !55, !tbaa !37
@ -156,7 +156,7 @@ entry:
tailrecurse: ; preds = %tailrecurse.backedge, %entry tailrecurse: ; preds = %tailrecurse.backedge, %entry
tail call void @_Z3fn8v() #3, !dbg !59 tail call void @_Z3fn8v() #3, !dbg !59
%0 = load %struct.C*, %struct.C** @x, align 8, !dbg !61, !tbaa !25 %0 = load %struct.C*, %struct.C** @x, align 8, !dbg !61, !tbaa !25
tail call void @llvm.dbg.value(metadata %struct.C* %0, i64 0, metadata !29, metadata !32) #3, !dbg !62 tail call void @llvm.dbg.value(metadata %struct.C* %0, metadata !29, metadata !32) #3, !dbg !62
tail call void @_Z3fn8v() #3, !dbg !63 tail call void @_Z3fn8v() #3, !dbg !63
%b.i.i = getelementptr inbounds %struct.C, %struct.C* %0, i64 0, i32 0, !dbg !64 %b.i.i = getelementptr inbounds %struct.C, %struct.C* %0, i64 0, i32 0, !dbg !64
%1 = load i32, i32* %b.i.i, align 4, !dbg !64, !tbaa !37 %1 = load i32, i32* %b.i.i, align 4, !dbg !64, !tbaa !37
@ -190,7 +190,7 @@ entry:
declare void @_Z3fn2iiii(i32, i32, i32, i32) #1 declare void @_Z3fn2iiii(i32, i32, i32, i32) #1
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }

8
llvm/test/DebugInfo/Generic/sugared-constants.ll
View File

@ -10,14 +10,14 @@
; Function Attrs: uwtable ; Function Attrs: uwtable
define void @main() #0 !dbg !4 { define void @main() #0 !dbg !4 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 42, i64 0, metadata !10, metadata !DIExpression()), !dbg !21 tail call void @llvm.dbg.value(metadata i32 42, metadata !10, metadata !DIExpression()), !dbg !21
tail call void @llvm.dbg.value(metadata i32 117, i64 0, metadata !12, metadata !DIExpression()), !dbg !24 tail call void @llvm.dbg.value(metadata i32 117, metadata !12, metadata !DIExpression()), !dbg !24
tail call void @llvm.dbg.value(metadata i16 7, i64 0, metadata !15, metadata !DIExpression()), !dbg !27 tail call void @llvm.dbg.value(metadata i16 7, metadata !15, metadata !DIExpression()), !dbg !27
ret void, !dbg !29 ret void, !dbg !29
} }
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { uwtable } attributes #0 = { uwtable }
attributes #2 = { nounwind readnone } attributes #2 = { nounwind readnone }

6
llvm/test/DebugInfo/Generic/two-cus-from-same-file.ll
View File

@ -23,15 +23,15 @@ declare i32 @puts(i8* nocapture) nounwind
define i32 @main(i32 %argc, i8** nocapture %argv) nounwind !dbg !12 { define i32 @main(i32 %argc, i8** nocapture %argv) nounwind !dbg !12 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 %argc, i64 0, metadata !21, metadata !DIExpression()), !dbg !26 tail call void @llvm.dbg.value(metadata i32 %argc, metadata !21, metadata !DIExpression()), !dbg !26
; Avoid talking about the pointer size in debug info because that's target dependent ; Avoid talking about the pointer size in debug info because that's target dependent
tail call void @llvm.dbg.value(metadata i8** %argv, i64 0, metadata !22, metadata !DIExpression(DW_OP_deref, DW_OP_deref)), !dbg !27 tail call void @llvm.dbg.value(metadata i8** %argv, metadata !22, metadata !DIExpression(DW_OP_deref, DW_OP_deref)), !dbg !27
%puts = tail call i32 @puts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @str1, i32 0, i32 0)), !dbg !28 %puts = tail call i32 @puts(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @str1, i32 0, i32 0)), !dbg !28
tail call void @foo() nounwind, !dbg !30 tail call void @foo() nounwind, !dbg !30
ret i32 0, !dbg !31 ret i32 0, !dbg !31
} }
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0, !9} !llvm.dbg.cu = !{!0, !9}
!llvm.module.flags = !{!33} !llvm.module.flags = !{!33}

4
llvm/test/DebugInfo/Mips/InlinedFnLocalVar.ll
View File

@ -13,13 +13,13 @@ source_filename = "test/DebugInfo/Mips/InlinedFnLocalVar.ll"
declare void @llvm.dbg.declare(metadata, metadata, metadata) #0 declare void @llvm.dbg.declare(metadata, metadata, metadata) #0
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0 declare void @llvm.dbg.value(metadata, metadata, metadata) #0
; Function Attrs: nounwind ssp ; Function Attrs: nounwind ssp
define i32 @bar() #1 !dbg !8 { define i32 @bar() #1 !dbg !8 {
entry: entry:
%0 = load i32, i32* @i, align 4, !dbg !11 %0 = load i32, i32* @i, align 4, !dbg !11
tail call void @llvm.dbg.value(metadata i32 %0, i64 0, metadata !13, metadata !24), !dbg !25 tail call void @llvm.dbg.value(metadata i32 %0, metadata !13, metadata !24), !dbg !25
tail call void @llvm.dbg.declare(metadata !5, metadata !18, metadata !24), !dbg !26 tail call void @llvm.dbg.declare(metadata !5, metadata !18, metadata !24), !dbg !26
%1 = mul nsw i32 %0, %0, !dbg !27 %1 = mul nsw i32 %0, %0, !dbg !27
store i32 %1, i32* @i, align 4, !dbg !11 store i32 %1, i32* @i, align 4, !dbg !11

4
llvm/test/DebugInfo/Mips/delay-slot.ll
View File

@ -28,7 +28,7 @@ target triple = "mips--linux-gnu"
; Function Attrs: nounwind ; Function Attrs: nounwind
define i32 @foo(i32 %x) #0 !dbg !4 { define i32 @foo(i32 %x) #0 !dbg !4 {
entry: entry:
call void @llvm.dbg.value(metadata i32 %x, i64 0, metadata !12, metadata !DIExpression()), !dbg !13 call void @llvm.dbg.value(metadata i32 %x, metadata !12, metadata !DIExpression()), !dbg !13
%tobool = icmp ne i32 %x, 0, !dbg !14 %tobool = icmp ne i32 %x, 0, !dbg !14
br i1 %tobool, label %if.then, label %if.end, !dbg !14 br i1 %tobool, label %if.then, label %if.end, !dbg !14
@ -47,7 +47,7 @@ return: ; preds = %if.end, %if.then
declare void @llvm.dbg.declare(metadata, metadata, metadata) #1 declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind } attributes #0 = { nounwind }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }

34
llvm/test/DebugInfo/Mips/dsr-fixed-objects.ll
View File

@ -35,22 +35,22 @@ declare void @foo(i32*)
define i32 @f0(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e) !dbg !4 { define i32 @f0(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e) !dbg !4 {
entry: entry:
%x = alloca i32, align 4 %x = alloca i32, align 4
tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !9, metadata !DIExpression()), !dbg !27 tail call void @llvm.dbg.value(metadata i32 %a, metadata !9, metadata !DIExpression()), !dbg !27
tail call void @llvm.dbg.value(metadata i32 %b, i64 0, metadata !10, metadata !DIExpression()), !dbg !28 tail call void @llvm.dbg.value(metadata i32 %b, metadata !10, metadata !DIExpression()), !dbg !28
tail call void @llvm.dbg.value(metadata i32 %c, i64 0, metadata !11, metadata !DIExpression()), !dbg !29 tail call void @llvm.dbg.value(metadata i32 %c, metadata !11, metadata !DIExpression()), !dbg !29
tail call void @llvm.dbg.value(metadata i32 %d, i64 0, metadata !12, metadata !DIExpression()), !dbg !30 tail call void @llvm.dbg.value(metadata i32 %d, metadata !12, metadata !DIExpression()), !dbg !30
tail call void @llvm.dbg.value(metadata i32 %e, i64 0, metadata !13, metadata !DIExpression()), !dbg !31 tail call void @llvm.dbg.value(metadata i32 %e, metadata !13, metadata !DIExpression()), !dbg !31
%0 = bitcast i32* %x to i8*, !dbg !32 %0 = bitcast i32* %x to i8*, !dbg !32
call void @llvm.lifetime.start(i64 4, i8* %0) #4, !dbg !32 call void @llvm.lifetime.start(i64 4, i8* %0) #4, !dbg !32
%add = add nsw i32 %b, %a, !dbg !33 %add = add nsw i32 %b, %a, !dbg !33
%add1 = add nsw i32 %add, %c, !dbg !34 %add1 = add nsw i32 %add, %c, !dbg !34
%add2 = add nsw i32 %add1, %d, !dbg !35 %add2 = add nsw i32 %add1, %d, !dbg !35
%add3 = add nsw i32 %add2, %e, !dbg !36 %add3 = add nsw i32 %add2, %e, !dbg !36
tail call void @llvm.dbg.value(metadata i32 %add3, i64 0, metadata !14, metadata !DIExpression()), !dbg !37 tail call void @llvm.dbg.value(metadata i32 %add3, metadata !14, metadata !DIExpression()), !dbg !37
store i32 %add3, i32* %x, align 4, !dbg !37, !tbaa !38 store i32 %add3, i32* %x, align 4, !dbg !37, !tbaa !38
tail call void @llvm.dbg.value(metadata i32* %x, i64 0, metadata !14, metadata !26), !dbg !37 tail call void @llvm.dbg.value(metadata i32* %x, metadata !14, metadata !26), !dbg !37
call void @foo(i32* nonnull %x) #4, !dbg !42 call void @foo(i32* nonnull %x) #4, !dbg !42
call void @llvm.dbg.value(metadata i32* %x, i64 0, metadata !14, metadata !26), !dbg !37 call void @llvm.dbg.value(metadata i32* %x, metadata !14, metadata !26), !dbg !37
%1 = load i32, i32* %x, align 4, !dbg !43, !tbaa !38 %1 = load i32, i32* %x, align 4, !dbg !43, !tbaa !38
call void @llvm.lifetime.end(i64 4, i8* %0) #4, !dbg !44 call void @llvm.lifetime.end(i64 4, i8* %0) #4, !dbg !44
ret i32 %1, !dbg !45 ret i32 %1, !dbg !45
@ -71,28 +71,28 @@ entry:
define i32 @f1(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e) !dbg !15 { define i32 @f1(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e) !dbg !15 {
entry: entry:
%x = alloca i32, align 16 %x = alloca i32, align 16
tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !17, metadata !DIExpression()), !dbg !46 tail call void @llvm.dbg.value(metadata i32 %a, metadata !17, metadata !DIExpression()), !dbg !46
tail call void @llvm.dbg.value(metadata i32 %b, i64 0, metadata !18, metadata !DIExpression()), !dbg !47 tail call void @llvm.dbg.value(metadata i32 %b, metadata !18, metadata !DIExpression()), !dbg !47
tail call void @llvm.dbg.value(metadata i32 %c, i64 0, metadata !19, metadata !DIExpression()), !dbg !48 tail call void @llvm.dbg.value(metadata i32 %c, metadata !19, metadata !DIExpression()), !dbg !48
tail call void @llvm.dbg.value(metadata i32 %d, i64 0, metadata !20, metadata !DIExpression()), !dbg !49 tail call void @llvm.dbg.value(metadata i32 %d, metadata !20, metadata !DIExpression()), !dbg !49
tail call void @llvm.dbg.value(metadata i32 %e, i64 0, metadata !21, metadata !DIExpression()), !dbg !50 tail call void @llvm.dbg.value(metadata i32 %e, metadata !21, metadata !DIExpression()), !dbg !50
%0 = bitcast i32* %x to i8*, !dbg !51 %0 = bitcast i32* %x to i8*, !dbg !51
call void @llvm.lifetime.start(i64 4, i8* %0) #4, !dbg !51 call void @llvm.lifetime.start(i64 4, i8* %0) #4, !dbg !51
%add = add nsw i32 %b, %a, !dbg !52 %add = add nsw i32 %b, %a, !dbg !52
%add1 = add nsw i32 %add, %c, !dbg !53 %add1 = add nsw i32 %add, %c, !dbg !53
%add2 = add nsw i32 %add1, %d, !dbg !54 %add2 = add nsw i32 %add1, %d, !dbg !54
%add3 = add nsw i32 %add2, %e, !dbg !55 %add3 = add nsw i32 %add2, %e, !dbg !55
tail call void @llvm.dbg.value(metadata i32 %add3, i64 0, metadata !22, metadata !DIExpression()), !dbg !56 tail call void @llvm.dbg.value(metadata i32 %add3, metadata !22, metadata !DIExpression()), !dbg !56
store i32 %add3, i32* %x, align 16, !dbg !56, !tbaa !38 store i32 %add3, i32* %x, align 16, !dbg !56, !tbaa !38
tail call void @llvm.dbg.value(metadata i32* %x, i64 0, metadata !22, metadata !26), !dbg !56 tail call void @llvm.dbg.value(metadata i32* %x, metadata !22, metadata !26), !dbg !56
call void @foo(i32* nonnull %x) #4, !dbg !57 call void @foo(i32* nonnull %x) #4, !dbg !57
call void @llvm.dbg.value(metadata i32* %x, i64 0, metadata !22, metadata !26), !dbg !56 call void @llvm.dbg.value(metadata i32* %x, metadata !22, metadata !26), !dbg !56
%1 = load i32, i32* %x, align 16, !dbg !58, !tbaa !38 %1 = load i32, i32* %x, align 16, !dbg !58, !tbaa !38
call void @llvm.lifetime.end(i64 4, i8* %0) #4, !dbg !59 call void @llvm.lifetime.end(i64 4, i8* %0) #4, !dbg !59
ret i32 %1, !dbg !60 ret i32 %1, !dbg !60
} }
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) declare void @llvm.dbg.value(metadata, metadata, metadata)
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!23, !24} !llvm.module.flags = !{!23, !24}

6
llvm/test/DebugInfo/X86/DW_AT_calling-convention.ll
View File

@ -47,14 +47,14 @@ target triple = "i386-pc-windows-msvc19.0.23918"
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
define x86_fastcallcc i32 @"\01?f@@YIHHH@Z"(i32 inreg %a, i32 inreg %b) #0 !dbg !13 { define x86_fastcallcc i32 @"\01?f@@YIHHH@Z"(i32 inreg %a, i32 inreg %b) #0 !dbg !13 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 %b, i64 0, metadata !15, metadata !17), !dbg !18 tail call void @llvm.dbg.value(metadata i32 %b, metadata !15, metadata !17), !dbg !18
tail call void @llvm.dbg.value(metadata i32 %a, i64 0, metadata !16, metadata !17), !dbg !19 tail call void @llvm.dbg.value(metadata i32 %a, metadata !16, metadata !17), !dbg !19
%add = add nsw i32 %b, %a, !dbg !20 %add = add nsw i32 %b, %a, !dbg !20
ret i32 %add, !dbg !21 ret i32 %add, !dbg !21
} }
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind readnone "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="pentium4" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind readnone "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="pentium4" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }

10
llvm/test/DebugInfo/X86/DW_AT_location-reference.ll
View File

@ -64,7 +64,7 @@ define void @f() nounwind !dbg !0 {
entry: entry:
%call = tail call i32 @g(i32 0, i32 0) nounwind, !dbg !8 %call = tail call i32 @g(i32 0, i32 0) nounwind, !dbg !8
store i32 %call, i32* @a, align 4, !dbg !8 store i32 %call, i32* @a, align 4, !dbg !8
tail call void @llvm.dbg.value(metadata i32 1, i64 0, metadata !5, metadata !DIExpression()), !dbg !13 tail call void @llvm.dbg.value(metadata i32 1, metadata !5, metadata !DIExpression()), !dbg !13
br label %while.body br label %while.body
while.body: ; preds = %entry, %while.body while.body: ; preds = %entry, %while.body
@ -75,10 +75,10 @@ while.body: ; preds = %entry, %while.body
br i1 %tobool, label %while.end, label %while.body, !dbg !14 br i1 %tobool, label %while.end, label %while.body, !dbg !14
while.end: ; preds = %while.body while.end: ; preds = %while.body
tail call void @llvm.dbg.value(metadata i32 %mul, i64 0, metadata !5, metadata !DIExpression()), !dbg !14 tail call void @llvm.dbg.value(metadata i32 %mul, metadata !5, metadata !DIExpression()), !dbg !14
%call4 = tail call i32 @g(i32 %mul, i32 0) nounwind, !dbg !15 %call4 = tail call i32 @g(i32 %mul, i32 0) nounwind, !dbg !15
store i32 %call4, i32* @a, align 4, !dbg !15 store i32 %call4, i32* @a, align 4, !dbg !15
tail call void @llvm.dbg.value(metadata i32 2, i64 0, metadata !5, metadata !DIExpression()), !dbg !17 tail call void @llvm.dbg.value(metadata i32 2, metadata !5, metadata !DIExpression()), !dbg !17
br label %while.body9 br label %while.body9
while.body9: ; preds = %while.end, %while.body9 while.body9: ; preds = %while.end, %while.body9
@ -89,7 +89,7 @@ while.body9: ; preds = %while.end, %while.b
br i1 %tobool8, label %while.end13, label %while.body9, !dbg !18 br i1 %tobool8, label %while.end13, label %while.body9, !dbg !18
while.end13: ; preds = %while.body9 while.end13: ; preds = %while.body9
tail call void @llvm.dbg.value(metadata i32 %mul12, i64 0, metadata !5, metadata !DIExpression()), !dbg !18 tail call void @llvm.dbg.value(metadata i32 %mul12, metadata !5, metadata !DIExpression()), !dbg !18
%call15 = tail call i32 @g(i32 0, i32 %mul12) nounwind, !dbg !19 %call15 = tail call i32 @g(i32 0, i32 %mul12) nounwind, !dbg !19
store i32 %call15, i32* @a, align 4, !dbg !19 store i32 %call15, i32* @a, align 4, !dbg !19
ret void, !dbg !20 ret void, !dbg !20
@ -97,7 +97,7 @@ while.end13: ; preds = %while.body9
declare i32 @g(i32, i32) declare i32 @g(i32, i32)
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!2} !llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!24} !llvm.module.flags = !{!24}

4
llvm/test/DebugInfo/X86/InlinedFnLocalVar.ll
View File

@ -13,13 +13,13 @@ source_filename = "test/DebugInfo/X86/InlinedFnLocalVar.ll"
declare void @llvm.dbg.declare(metadata, metadata, metadata) #0 declare void @llvm.dbg.declare(metadata, metadata, metadata) #0
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0 declare void @llvm.dbg.value(metadata, metadata, metadata) #0
; Function Attrs: nounwind ssp ; Function Attrs: nounwind ssp
define i32 @bar() #1 !dbg !8 { define i32 @bar() #1 !dbg !8 {
entry: entry:
%0 = load i32, i32* @i, align 4, !dbg !11 %0 = load i32, i32* @i, align 4, !dbg !11
tail call void @llvm.dbg.value(metadata i32 %0, i64 0, metadata !13, metadata !24), !dbg !25 tail call void @llvm.dbg.value(metadata i32 %0, metadata !13, metadata !24), !dbg !25
tail call void @llvm.dbg.declare(metadata !5, metadata !18, metadata !24), !dbg !26 tail call void @llvm.dbg.declare(metadata !5, metadata !18, metadata !24), !dbg !26
%1 = mul nsw i32 %0, %0, !dbg !27 %1 = mul nsw i32 %0, %0, !dbg !27
store i32 %1, i32* @i, align 4, !dbg !11 store i32 %1, i32* @i, align 4, !dbg !11

14
llvm/test/DebugInfo/X86/PR26148.ll
View File

@ -40,21 +40,21 @@ target triple = "x86_64-apple-macosx10.11.0"
declare void @llvm.dbg.declare(metadata, metadata, metadata) #0 declare void @llvm.dbg.declare(metadata, metadata, metadata) #0
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0 declare void @llvm.dbg.value(metadata, metadata, metadata) #0
; The attributes are here to force the zero-sized range not to be at the start of ; The attributes are here to force the zero-sized range not to be at the start of
; the function, which has special interpretation in DWARF. The fact that this happens ; the function, which has special interpretation in DWARF. The fact that this happens
; at all is probably an LLVM bug. ; at all is probably an LLVM bug.
define void @fn1(i16 signext %p1) #1 !dbg !16 { define void @fn1(i16 signext %p1) #1 !dbg !16 {
entry: entry:
tail call void @llvm.dbg.value(metadata i16 %p1, i64 0, metadata !20, metadata !23), !dbg !24 tail call void @llvm.dbg.value(metadata i16 %p1, metadata !20, metadata !23), !dbg !24
tail call void @llvm.dbg.declare(metadata %struct.S0* undef, metadata !21, metadata !23), !dbg !25 tail call void @llvm.dbg.declare(metadata %struct.S0* undef, metadata !21, metadata !23), !dbg !25
tail call void @llvm.dbg.declare(metadata %struct.S0* undef, metadata !22, metadata !23), !dbg !26 tail call void @llvm.dbg.declare(metadata %struct.S0* undef, metadata !22, metadata !23), !dbg !26
tail call void @llvm.dbg.value(metadata i32 3, i64 0, metadata !22, metadata !27), !dbg !26 tail call void @llvm.dbg.value(metadata i32 3, metadata !22, metadata !27), !dbg !26
tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !22, metadata !28), !dbg !26 tail call void @llvm.dbg.value(metadata i32 0, metadata !22, metadata !28), !dbg !26
tail call void @llvm.dbg.value(metadata i16 %p1, i64 0, metadata !21, metadata !29), !dbg !25 tail call void @llvm.dbg.value(metadata i16 %p1, metadata !21, metadata !29), !dbg !25
tail call void @llvm.dbg.value(metadata i32 3, i64 0, metadata !21, metadata !27), !dbg !25 tail call void @llvm.dbg.value(metadata i32 3, metadata !21, metadata !27), !dbg !25
tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !21, metadata !28), !dbg !25 tail call void @llvm.dbg.value(metadata i32 0, metadata !21, metadata !28), !dbg !25
store i32 3, i32* bitcast (%struct.S0* @a to i32*), align 4, !dbg !30 store i32 3, i32* bitcast (%struct.S0* @a to i32*), align 4, !dbg !30
store i32 0, i32* getelementptr inbounds (%struct.S0, %struct.S0* @a, i64 0, i32 1), align 4, !dbg !30 store i32 0, i32* getelementptr inbounds (%struct.S0, %struct.S0* @a, i64 0, i32 1), align 4, !dbg !30
ret void, !dbg !31 ret void, !dbg !31

8
llvm/test/DebugInfo/X86/array.ll
View File

@ -31,7 +31,7 @@ target triple = "x86_64-apple-macosx10.12.0"
; Function Attrs: nounwind ssp uwtable ; Function Attrs: nounwind ssp uwtable
define void @f(i32* nocapture %p) local_unnamed_addr #0 !dbg !8 { define void @f(i32* nocapture %p) local_unnamed_addr #0 !dbg !8 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32* %p, i64 0, metadata !14, metadata !15), !dbg !16 tail call void @llvm.dbg.value(metadata i32* %p, metadata !14, metadata !15), !dbg !16
store i32 42, i32* %p, align 4, !dbg !17, !tbaa !18 store i32 42, i32* %p, align 4, !dbg !17, !tbaa !18
ret void, !dbg !22 ret void, !dbg !22
} }
@ -43,8 +43,8 @@ declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
define i32 @main(i32 %argc, i8** nocapture readnone %argv) local_unnamed_addr #0 !dbg !23 { define i32 @main(i32 %argc, i8** nocapture readnone %argv) local_unnamed_addr #0 !dbg !23 {
entry: entry:
%array = alloca [4 x i32], align 16 %array = alloca [4 x i32], align 16
tail call void @llvm.dbg.value(metadata i32 %argc, i64 0, metadata !30, metadata !15), !dbg !36 tail call void @llvm.dbg.value(metadata i32 %argc, metadata !30, metadata !15), !dbg !36
tail call void @llvm.dbg.value(metadata i8** %argv, i64 0, metadata !31, metadata !15), !dbg !37 tail call void @llvm.dbg.value(metadata i8** %argv, metadata !31, metadata !15), !dbg !37
%0 = bitcast [4 x i32]* %array to i8*, !dbg !38 %0 = bitcast [4 x i32]* %array to i8*, !dbg !38
call void @llvm.lifetime.start.p0i8(i64 16, i8* nonnull %0) #3, !dbg !38 call void @llvm.lifetime.start.p0i8(i64 16, i8* nonnull %0) #3, !dbg !38
tail call void @llvm.dbg.declare(metadata [4 x i32]* %array, metadata !32, metadata !15), !dbg !39 tail call void @llvm.dbg.declare(metadata [4 x i32]* %array, metadata !32, metadata !15), !dbg !39
@ -66,7 +66,7 @@ declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture r
declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #2 declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #2
; Function Attrs: nounwind readnone speculatable ; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind ssp uwtable } attributes #0 = { nounwind ssp uwtable }
attributes #1 = { nounwind readnone speculatable } attributes #1 = { nounwind readnone speculatable }

2
llvm/test/DebugInfo/X86/array2.ll
View File

@ -16,7 +16,7 @@
; Test that we correctly lower dbg.declares for arrays. ; Test that we correctly lower dbg.declares for arrays.
; ;
; CHECK: define i32 @main ; CHECK: define i32 @main
; CHECK: call void @llvm.dbg.value(metadata i32 42, i64 0, metadata ![[ARRAY:[0-9]+]], metadata ![[EXPR:[0-9]+]]) ; CHECK: call void @llvm.dbg.value(metadata i32 42, metadata ![[ARRAY:[0-9]+]], metadata ![[EXPR:[0-9]+]])
; CHECK: ![[ARRAY]] = !DILocalVariable(name: "array",{{.*}} line: 6 ; CHECK: ![[ARRAY]] = !DILocalVariable(name: "array",{{.*}} line: 6
; CHECK: ![[EXPR]] = !DIExpression(DW_OP_LLVM_fragment, 0, 32) ; CHECK: ![[EXPR]] = !DIExpression(DW_OP_LLVM_fragment, 0, 32)
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"

12
llvm/test/DebugInfo/X86/bbjoin.ll
View File

@ -28,23 +28,23 @@ entry:
%x = alloca i32, align 4 %x = alloca i32, align 4
%0 = bitcast i32* %x to i8*, !dbg !14 %0 = bitcast i32* %x to i8*, !dbg !14
call void @llvm.lifetime.start(i64 4, i8* %0) #4, !dbg !14 call void @llvm.lifetime.start(i64 4, i8* %0) #4, !dbg !14
tail call void @llvm.dbg.value(metadata i32 23, i64 0, metadata !9, metadata !15), !dbg !16 tail call void @llvm.dbg.value(metadata i32 23, metadata !9, metadata !15), !dbg !16
store i32 23, i32* %x, align 4, !dbg !16, !tbaa !17 store i32 23, i32* %x, align 4, !dbg !16, !tbaa !17
tail call void @llvm.dbg.value(metadata i32* %x, i64 0, metadata !9, metadata !DIExpression(DW_OP_deref)), !dbg !16 tail call void @llvm.dbg.value(metadata i32* %x, metadata !9, metadata !DIExpression(DW_OP_deref)), !dbg !16
call void @g(i32* nonnull %x) #4, !dbg !21 call void @g(i32* nonnull %x) #4, !dbg !21
call void @llvm.dbg.value(metadata i32* %x, i64 0, metadata !9, metadata !DIExpression(DW_OP_deref)), !dbg !16 call void @llvm.dbg.value(metadata i32* %x, metadata !9, metadata !DIExpression(DW_OP_deref)), !dbg !16
%1 = load i32, i32* %x, align 4, !dbg !22, !tbaa !17 %1 = load i32, i32* %x, align 4, !dbg !22, !tbaa !17
%cmp = icmp eq i32 %1, 42, !dbg !24 %cmp = icmp eq i32 %1, 42, !dbg !24
br i1 %cmp, label %if.then, label %if.end, !dbg !25 br i1 %cmp, label %if.then, label %if.end, !dbg !25
if.then: ; preds = %entry if.then: ; preds = %entry
call void @llvm.dbg.value(metadata i32 43, i64 0, metadata !9, metadata !15), !dbg !16 call void @llvm.dbg.value(metadata i32 43, metadata !9, metadata !15), !dbg !16
store i32 43, i32* %x, align 4, !dbg !26, !tbaa !17 store i32 43, i32* %x, align 4, !dbg !26, !tbaa !17
br label %if.end, !dbg !26 br label %if.end, !dbg !26
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
%2 = phi i32 [ 43, %if.then ], [ %1, %entry ], !dbg !27 %2 = phi i32 [ 43, %if.then ], [ %1, %entry ], !dbg !27
call void @llvm.dbg.value(metadata i32* %x, i64 0, metadata !9, metadata !DIExpression(DW_OP_deref)), !dbg !16 call void @llvm.dbg.value(metadata i32* %x, metadata !9, metadata !DIExpression(DW_OP_deref)), !dbg !16
call void @llvm.lifetime.end(i64 4, i8* %0) #4, !dbg !28 call void @llvm.lifetime.end(i64 4, i8* %0) #4, !dbg !28
ret i32 %2, !dbg !29 ret i32 %2, !dbg !29
} }
@ -58,7 +58,7 @@ declare void @g(i32*) #4
declare void @llvm.lifetime.end(i64, i8* nocapture) #1 declare void @llvm.lifetime.end(i64, i8* nocapture) #1
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #3 declare void @llvm.dbg.value(metadata, metadata, metadata) #3
attributes #0 = { nounwind ssp uwtable } attributes #0 = { nounwind ssp uwtable }
attributes #1 = { argmemonly nounwind } attributes #1 = { argmemonly nounwind }

4
llvm/test/DebugInfo/X86/block-capture.ll
View File

@ -33,7 +33,7 @@ entry:
%block.addr = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, void (...)* }>*, align 8 %block.addr = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, void (...)* }>*, align 8
store i8* %.block_descriptor, i8** %.block_descriptor.addr, align 8 store i8* %.block_descriptor, i8** %.block_descriptor.addr, align 8
%0 = load i8*, i8** %.block_descriptor.addr %0 = load i8*, i8** %.block_descriptor.addr
call void @llvm.dbg.value(metadata i8* %0, i64 0, metadata !47, metadata !43), !dbg !66 call void @llvm.dbg.value(metadata i8* %0, metadata !47, metadata !43), !dbg !66
call void @llvm.dbg.declare(metadata i8* %.block_descriptor, metadata !47, metadata !43), !dbg !66 call void @llvm.dbg.declare(metadata i8* %.block_descriptor, metadata !47, metadata !43), !dbg !66
%block = bitcast i8* %.block_descriptor to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, void (...)* }>*, !dbg !67 %block = bitcast i8* %.block_descriptor to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, void (...)* }>*, !dbg !67
store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, void (...)* }>* %block, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, void (...)* }>** %block.addr, align 8 store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, void (...)* }>* %block, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, void (...)* }>** %block.addr, align 8
@ -50,7 +50,7 @@ entry:
} }
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind ssp uwtable } attributes #0 = { nounwind ssp uwtable }

12
llvm/test/DebugInfo/X86/constant-aggregate.ll
View File

@ -42,28 +42,28 @@ target triple = "x86_64-apple-macosx10.10.0"
; Function Attrs: nounwind readnone ssp uwtable ; Function Attrs: nounwind readnone ssp uwtable
define i32 @_Z3foo1S(i32 %s.coerce) #0 !dbg !12 { define i32 @_Z3foo1S(i32 %s.coerce) #0 !dbg !12 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 %s.coerce, i64 0, metadata !18, metadata !37), !dbg !38 tail call void @llvm.dbg.value(metadata i32 %s.coerce, metadata !18, metadata !37), !dbg !38
tail call void @llvm.dbg.value(metadata i32 1, i64 0, metadata !18, metadata !37), !dbg !38 tail call void @llvm.dbg.value(metadata i32 1, metadata !18, metadata !37), !dbg !38
ret i32 1, !dbg !39 ret i32 1, !dbg !39
} }
; Function Attrs: nounwind readnone ssp uwtable ; Function Attrs: nounwind readnone ssp uwtable
define i32 @_Z3foo1C(i32 %c.coerce) #0 !dbg !19 { define i32 @_Z3foo1C(i32 %c.coerce) #0 !dbg !19 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 %c.coerce, i64 0, metadata !23, metadata !37), !dbg !40 tail call void @llvm.dbg.value(metadata i32 %c.coerce, metadata !23, metadata !37), !dbg !40
tail call void @llvm.dbg.value(metadata i32 2, i64 0, metadata !23, metadata !37), !dbg !40 tail call void @llvm.dbg.value(metadata i32 2, metadata !23, metadata !37), !dbg !40
ret i32 2, !dbg !41 ret i32 2, !dbg !41
} }
; Function Attrs: nounwind readnone ssp uwtable ; Function Attrs: nounwind readnone ssp uwtable
define i32 @_Z3barv() #0 !dbg !24 { define i32 @_Z3barv() #0 !dbg !24 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 3, i64 0, metadata !28, metadata !37), !dbg !42 tail call void @llvm.dbg.value(metadata i32 3, metadata !28, metadata !37), !dbg !42
ret i32 3, !dbg !43 ret i32 3, !dbg !43
} }
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind readnone ssp uwtable } attributes #0 = { nounwind readnone ssp uwtable }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }

12
llvm/test/DebugInfo/X86/constant-loclist.ll
View File

@ -30,19 +30,19 @@ define void @main() #0 !dbg !7 {
%2 = alloca i64, align 8 %2 = alloca i64, align 8
%3 = alloca i64, align 8 %3 = alloca i64, align 8
store double 2.000000e+00, double* %1, align 8, !dbg !21 store double 2.000000e+00, double* %1, align 8, !dbg !21
call void @llvm.dbg.value(metadata i64 0, i64 0, metadata !22, metadata !15), !dbg !24 call void @llvm.dbg.value(metadata i64 0, metadata !22, metadata !15), !dbg !24
call void @llvm.dbg.value(metadata i64 0, i64 0, metadata !25, metadata !15), !dbg !27 call void @llvm.dbg.value(metadata i64 0, metadata !25, metadata !15), !dbg !27
call void @llvm.dbg.value(metadata double 2.000000e+00, i64 0, metadata !19, metadata !15), !dbg !21 call void @llvm.dbg.value(metadata double 2.000000e+00, metadata !19, metadata !15), !dbg !21
store i64 4611686018427387904, i64* %2, align 8, !dbg !24 store i64 4611686018427387904, i64* %2, align 8, !dbg !24
call void @llvm.dbg.value(metadata i64 4611686018427387904, i64 0, metadata !22, metadata !15), !dbg !24 call void @llvm.dbg.value(metadata i64 4611686018427387904, metadata !22, metadata !15), !dbg !24
call void @llvm.dbg.value(metadata i64 4611686018427387904, i64 0, metadata !25, metadata !15), !dbg !27 call void @llvm.dbg.value(metadata i64 4611686018427387904, metadata !25, metadata !15), !dbg !27
store i64 4611686018427387904, i64* %3, align 8, !dbg !27 store i64 4611686018427387904, i64* %3, align 8, !dbg !27
ret void, !dbg !28 ret void, !dbg !28
} }
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.declare(metadata, metadata, metadata) #1 declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind ssp uwtable } attributes #0 = { nounwind ssp uwtable }

4
llvm/test/DebugInfo/X86/dbg-const-int.ll
View File

@ -12,11 +12,11 @@ target triple = "x86_64-apple-macosx10.6.7"
define i32 @foo() nounwind uwtable readnone optsize ssp !dbg !1 { define i32 @foo() nounwind uwtable readnone optsize ssp !dbg !1 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 42, i64 0, metadata !6, metadata !DIExpression()), !dbg !9 tail call void @llvm.dbg.value(metadata i32 42, metadata !6, metadata !DIExpression()), !dbg !9
ret i32 42, !dbg !10 ret i32 42, !dbg !10
} }
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!15} !llvm.module.flags = !{!15}

6
llvm/test/DebugInfo/X86/dbg-const.ll
View File

@ -17,15 +17,15 @@ target triple = "x86_64-apple-darwin10.0.0"
;CHECK-NEXT: .byte 42 ;CHECK-NEXT: .byte 42
define i32 @foobar() nounwind readonly noinline ssp !dbg !0 { define i32 @foobar() nounwind readonly noinline ssp !dbg !0 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 42, i64 0, metadata !6, metadata !DIExpression()), !dbg !9 tail call void @llvm.dbg.value(metadata i32 42, metadata !6, metadata !DIExpression()), !dbg !9
%call = tail call i32 @bar(), !dbg !11 %call = tail call i32 @bar(), !dbg !11
tail call void @llvm.dbg.value(metadata i32 %call, i64 0, metadata !6, metadata !DIExpression()), !dbg !11 tail call void @llvm.dbg.value(metadata i32 %call, metadata !6, metadata !DIExpression()), !dbg !11
%call2 = tail call i32 @bar(), !dbg !11 %call2 = tail call i32 @bar(), !dbg !11
%add = add nsw i32 %call2, %call, !dbg !12 %add = add nsw i32 %call2, %call, !dbg !12
ret i32 %add, !dbg !10 ret i32 %add, !dbg !10
} }
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
declare i32 @bar() nounwind readnone declare i32 @bar() nounwind readnone
!llvm.dbg.cu = !{!2} !llvm.dbg.cu = !{!2}

4
llvm/test/DebugInfo/X86/dbg-i128-const.ll
View File

@ -6,12 +6,12 @@
define i128 @__foo(i128 %a, i128 %b) nounwind !dbg !3 { define i128 @__foo(i128 %a, i128 %b) nounwind !dbg !3 {
entry: entry:
tail call void @llvm.dbg.value(metadata i128 42 , i64 0, metadata !1, metadata !DIExpression()), !dbg !11 tail call void @llvm.dbg.value(metadata i128 42 , metadata !1, metadata !DIExpression()), !dbg !11
%add = add i128 %a, %b, !dbg !11 %add = add i128 %a, %b, !dbg !11
ret i128 %add, !dbg !11 ret i128 %add, !dbg !11
} }
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!5} !llvm.dbg.cu = !{!5}
!llvm.module.flags = !{!16} !llvm.module.flags = !{!16}

8
llvm/test/DebugInfo/X86/dbg-merge-loc-entry.ll
View File

@ -15,12 +15,12 @@ target triple = "x86_64-apple-darwin8"
define hidden i128 @__divti3(i128 %u, i128 %v) nounwind readnone !dbg !9 { define hidden i128 @__divti3(i128 %u, i128 %v) nounwind readnone !dbg !9 {
entry: entry:
tail call void @llvm.dbg.value(metadata i128 %u, i64 0, metadata !14, metadata !DIExpression()), !dbg !15 tail call void @llvm.dbg.value(metadata i128 %u, metadata !14, metadata !DIExpression()), !dbg !15
tail call void @llvm.dbg.value(metadata i64 0, i64 0, metadata !17, metadata !DIExpression()), !dbg !21 tail call void @llvm.dbg.value(metadata i64 0, metadata !17, metadata !DIExpression()), !dbg !21
br i1 undef, label %bb2, label %bb4, !dbg !22 br i1 undef, label %bb2, label %bb4, !dbg !22
bb2: ; preds = %entry bb2: ; preds = %entry
tail call void @llvm.dbg.value(metadata i128 %u, i64 0, metadata !14, metadata !DIExpression()), !dbg !15 tail call void @llvm.dbg.value(metadata i128 %u, metadata !14, metadata !DIExpression()), !dbg !15
br label %bb4, !dbg !23 br label %bb4, !dbg !23
bb4: ; preds = %bb2, %entry bb4: ; preds = %bb2, %entry
@ -35,7 +35,7 @@ __udivmodti4.exit: ; preds = %bb4
declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
declare %0 @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone declare %0 @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone

10
llvm/test/DebugInfo/X86/dbg-value-const-byref.ll
View File

@ -51,13 +51,13 @@ target triple = "x86_64-apple-macosx10.9.0"
define i32 @foo() #0 !dbg !4 { define i32 @foo() #0 !dbg !4 {
entry: entry:
%i = alloca i32, align 4 %i = alloca i32, align 4
call void @llvm.dbg.value(metadata i32 3, i64 0, metadata !10, metadata !DIExpression()), !dbg !15 call void @llvm.dbg.value(metadata i32 3, metadata !10, metadata !DIExpression()), !dbg !15
%call = call i32 @f3(i32 3) #3, !dbg !16 %call = call i32 @f3(i32 3) #3, !dbg !16
call void @llvm.dbg.value(metadata i32 7, i64 0, metadata !10, metadata !DIExpression()), !dbg !18 call void @llvm.dbg.value(metadata i32 7, metadata !10, metadata !DIExpression()), !dbg !18
%call1 = call i32 (...) @f1() #3, !dbg !19 %call1 = call i32 (...) @f1() #3, !dbg !19
call void @llvm.dbg.value(metadata i32 %call1, i64 0, metadata !10, metadata !DIExpression()), !dbg !19 call void @llvm.dbg.value(metadata i32 %call1, metadata !10, metadata !DIExpression()), !dbg !19
store i32 %call1, i32* %i, align 4, !dbg !19, !tbaa !20 store i32 %call1, i32* %i, align 4, !dbg !19, !tbaa !20
call void @llvm.dbg.value(metadata i32* %i, i64 0, metadata !10, metadata !DIExpression(DW_OP_deref)), !dbg !24 call void @llvm.dbg.value(metadata i32* %i, metadata !10, metadata !DIExpression(DW_OP_deref)), !dbg !24
call void @f2(i32* %i) #3, !dbg !24 call void @f2(i32* %i) #3, !dbg !24
ret i32 0, !dbg !25 ret i32 0, !dbg !25
} }
@ -69,7 +69,7 @@ declare i32 @f1(...)
declare void @f2(i32*) declare void @f2(i32*)
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { nounwind ssp uwtable } attributes #0 = { nounwind ssp uwtable }
attributes #2 = { nounwind readnone } attributes #2 = { nounwind readnone }

10
llvm/test/DebugInfo/X86/dbg-value-dag-combine.ll
View File

@ -12,17 +12,17 @@ target triple = "i686-apple-darwin"
; CHECK-NOT: ##DEBUG_VALUE: ; CHECK-NOT: ##DEBUG_VALUE:
declare <4 x i32> @__amdil_get_global_id_int() declare <4 x i32> @__amdil_get_global_id_int()
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) declare void @llvm.dbg.value(metadata, metadata, metadata)
define void @__OpenCL_test_kernel(i32 addrspace(1)* %ip) nounwind !dbg !0 { define void @__OpenCL_test_kernel(i32 addrspace(1)* %ip) nounwind !dbg !0 {
entry: entry:
call void @llvm.dbg.value(metadata i32 addrspace(1)* %ip, i64 0, metadata !7, metadata !DIExpression()), !dbg !8 call void @llvm.dbg.value(metadata i32 addrspace(1)* %ip, metadata !7, metadata !DIExpression()), !dbg !8
%0 = call <4 x i32> @__amdil_get_global_id_int() nounwind %0 = call <4 x i32> @__amdil_get_global_id_int() nounwind
%1 = extractelement <4 x i32> %0, i32 0 %1 = extractelement <4 x i32> %0, i32 0
call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !9, metadata !DIExpression()), !dbg !11 call void @llvm.dbg.value(metadata i32 %1, metadata !9, metadata !DIExpression()), !dbg !11
call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !21, metadata !DIExpression()), !dbg !14 call void @llvm.dbg.value(metadata i32 0, metadata !21, metadata !DIExpression()), !dbg !14
%tmp2 = load i32, i32 addrspace(1)* %ip, align 4, !dbg !15 %tmp2 = load i32, i32 addrspace(1)* %ip, align 4, !dbg !15
%tmp3 = add i32 0, %tmp2, !dbg !15 %tmp3 = add i32 0, %tmp2, !dbg !15
call void @llvm.dbg.value(metadata i32 %tmp3, i64 0, metadata !13, metadata !DIExpression()), !dbg !15 call void @llvm.dbg.value(metadata i32 %tmp3, metadata !13, metadata !DIExpression()), !dbg !15
%arrayidx = getelementptr i32, i32 addrspace(1)* %ip, i32 %1, !dbg !16 %arrayidx = getelementptr i32, i32 addrspace(1)* %ip, i32 %1, !dbg !16
store i32 %tmp3, i32 addrspace(1)* %arrayidx, align 4, !dbg !16 store i32 %tmp3, i32 addrspace(1)* %arrayidx, align 4, !dbg !16
ret void, !dbg !17 ret void, !dbg !17

4
llvm/test/DebugInfo/X86/dbg-value-frame-index.ll
View File

@ -6,7 +6,7 @@ entry:
br label %while.cond br label %while.cond
while.cond: while.cond:
call void @llvm.dbg.value(metadata i64* %end, i64 0, metadata !5, metadata !6), !dbg !7 call void @llvm.dbg.value(metadata i64* %end, metadata !5, metadata !6), !dbg !7
%call = call i1 @fn(i64* %end, i64* %end, i64* null, i8* null, i64 0, i64* null, i32* null, i8* null), !dbg !7 %call = call i1 @fn(i64* %end, i64* %end, i64* null, i8* null, i64 0, i64* null, i32* null, i8* null), !dbg !7
br label %while.body br label %while.body
@ -21,7 +21,7 @@ while.end:
; CHECK: #DEBUG_VALUE: test:w <- [%RSP+8] ; CHECK: #DEBUG_VALUE: test:w <- [%RSP+8]
declare i1 @fn(i64*, i64*, i64*, i8*, i64, i64*, i32*, i8*) declare i1 @fn(i64*, i64*, i64*, i8*, i64, i64*, i32*, i8*)
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) declare void @llvm.dbg.value(metadata, metadata, metadata)
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!2,!3} !llvm.module.flags = !{!2,!3}

6
llvm/test/DebugInfo/X86/dbg-value-g-gmlt.ll
View File

@ -38,7 +38,7 @@ target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: uwtable ; Function Attrs: uwtable
define void @_Z3fooi(i32 %param) local_unnamed_addr #0 !dbg !8 { define void @_Z3fooi(i32 %param) local_unnamed_addr #0 !dbg !8 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 %param, i64 0, metadata !13, metadata !14), !dbg !15 tail call void @llvm.dbg.value(metadata i32 %param, metadata !13, metadata !14), !dbg !15
%tobool = icmp eq i32 %param, 0, !dbg !16 %tobool = icmp eq i32 %param, 0, !dbg !16
br i1 %tobool, label %if.end, label %if.then, !dbg !18 br i1 %tobool, label %if.end, label %if.then, !dbg !18
@ -51,14 +51,14 @@ if.end: ; preds = %if.then, %entry
} }
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
declare void @_Z1fv() local_unnamed_addr #2 declare void @_Z1fv() local_unnamed_addr #2
; Function Attrs: nounwind readnone uwtable ; Function Attrs: nounwind readnone uwtable
define void @_Z3barv() local_unnamed_addr #3 !dbg !22 { define void @_Z3barv() local_unnamed_addr #3 !dbg !22 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !13, metadata !14), !dbg !24 tail call void @llvm.dbg.value(metadata i32 0, metadata !13, metadata !14), !dbg !24
ret void, !dbg !26 ret void, !dbg !26
} }

10
llvm/test/DebugInfo/X86/dbg-value-inlined-parameter.ll
View File

@ -48,8 +48,8 @@ source_filename = "test/DebugInfo/X86/dbg-value-inlined-parameter.ll"
; Function Attrs: nounwind optsize ssp ; Function Attrs: nounwind optsize ssp
define i32 @foo(%struct.S1* nocapture %sp, i32 %nums) #0 !dbg !15 { define i32 @foo(%struct.S1* nocapture %sp, i32 %nums) #0 !dbg !15 {
entry: entry:
tail call void @llvm.dbg.value(metadata %struct.S1* %sp, i64 0, metadata !19, metadata !22), !dbg !23 tail call void @llvm.dbg.value(metadata %struct.S1* %sp, metadata !19, metadata !22), !dbg !23
tail call void @llvm.dbg.value(metadata i32 %nums, i64 0, metadata !21, metadata !22), !dbg !24 tail call void @llvm.dbg.value(metadata i32 %nums, metadata !21, metadata !22), !dbg !24
%tmp2 = getelementptr inbounds %struct.S1, %struct.S1* %sp, i64 0, i32 1, !dbg !25 %tmp2 = getelementptr inbounds %struct.S1, %struct.S1* %sp, i64 0, i32 1, !dbg !25
store i32 %nums, i32* %tmp2, align 4, !dbg !25 store i32 %nums, i32* %tmp2, align 4, !dbg !25
%call = tail call float* @bar(i32 %nums) #3, !dbg !27 %call = tail call float* @bar(i32 %nums) #3, !dbg !27
@ -66,8 +66,8 @@ declare float* @bar(i32) #1
; Function Attrs: nounwind optsize ssp ; Function Attrs: nounwind optsize ssp
define void @foobar() #0 !dbg !29 { define void @foobar() #0 !dbg !29 {
entry: entry:
tail call void @llvm.dbg.value(metadata %struct.S1* @p, i64 0, metadata !19, metadata !22) #4, !dbg !32 tail call void @llvm.dbg.value(metadata %struct.S1* @p, metadata !19, metadata !22) #4, !dbg !32
tail call void @llvm.dbg.value(metadata i32 1, i64 0, metadata !21, metadata !22) #4, !dbg !35 tail call void @llvm.dbg.value(metadata i32 1, metadata !21, metadata !22) #4, !dbg !35
store i32 1, i32* getelementptr inbounds (%struct.S1, %struct.S1* @p, i64 0, i32 1), align 8, !dbg !36 store i32 1, i32* getelementptr inbounds (%struct.S1, %struct.S1* @p, i64 0, i32 1), align 8, !dbg !36
%call.i = tail call float* @bar(i32 1) #3, !dbg !37 %call.i = tail call float* @bar(i32 1) #3, !dbg !37
store float* %call.i, float** getelementptr inbounds (%struct.S1, %struct.S1* @p, i64 0, i32 0), align 8, !dbg !37 store float* %call.i, float** getelementptr inbounds (%struct.S1, %struct.S1* @p, i64 0, i32 0), align 8, !dbg !37
@ -76,7 +76,7 @@ entry:
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { nounwind optsize ssp } attributes #0 = { nounwind optsize ssp }
attributes #1 = { optsize } attributes #1 = { optsize }

10
llvm/test/DebugInfo/X86/dbg-value-isel.ll
View File

@ -13,7 +13,7 @@ target triple = "x86_64-apple-darwin10.0.0"
define void @__OpenCL_nbt02_kernel(i32 addrspace(1)* %ip) nounwind !dbg !0 { define void @__OpenCL_nbt02_kernel(i32 addrspace(1)* %ip) nounwind !dbg !0 {
entry: entry:
call void @llvm.dbg.value(metadata i32 addrspace(1)* %ip, i64 0, metadata !8, metadata !DIExpression()), !dbg !9 call void @llvm.dbg.value(metadata i32 addrspace(1)* %ip, metadata !8, metadata !DIExpression()), !dbg !9
%0 = call <4 x i32> @__amdil_get_local_id_int() nounwind %0 = call <4 x i32> @__amdil_get_local_id_int() nounwind
%1 = extractelement <4 x i32> %0, i32 0 %1 = extractelement <4 x i32> %0, i32 0
br label %2 br label %2
@ -28,7 +28,7 @@ entry:
get_local_id.exit: ; preds = %4 get_local_id.exit: ; preds = %4
%6 = phi i32 [ %5, %4 ] %6 = phi i32 [ %5, %4 ]
call void @llvm.dbg.value(metadata i32 %6, i64 0, metadata !10, metadata !DIExpression()), !dbg !12 call void @llvm.dbg.value(metadata i32 %6, metadata !10, metadata !DIExpression()), !dbg !12
%7 = call <4 x i32> @__amdil_get_global_id_int() nounwind, !dbg !12 %7 = call <4 x i32> @__amdil_get_global_id_int() nounwind, !dbg !12
%8 = extractelement <4 x i32> %7, i32 0, !dbg !12 %8 = extractelement <4 x i32> %7, i32 0, !dbg !12
br label %9 br label %9
@ -43,7 +43,7 @@ get_local_id.exit: ; preds = %4
get_global_id.exit: ; preds = %11 get_global_id.exit: ; preds = %11
%13 = phi i32 [ %12, %11 ] %13 = phi i32 [ %12, %11 ]
call void @llvm.dbg.value(metadata i32 %13, i64 0, metadata !13, metadata !DIExpression()), !dbg !14 call void @llvm.dbg.value(metadata i32 %13, metadata !13, metadata !DIExpression()), !dbg !14
%14 = call <4 x i32> @__amdil_get_local_size_int() nounwind %14 = call <4 x i32> @__amdil_get_local_size_int() nounwind
%15 = extractelement <4 x i32> %14, i32 0 %15 = extractelement <4 x i32> %14, i32 0
br label %16 br label %16
@ -58,7 +58,7 @@ get_global_id.exit: ; preds = %11
get_local_size.exit: ; preds = %18 get_local_size.exit: ; preds = %18
%20 = phi i32 [ %19, %18 ] %20 = phi i32 [ %19, %18 ]
call void @llvm.dbg.value(metadata i32 %20, i64 0, metadata !15, metadata !DIExpression()), !dbg !16 call void @llvm.dbg.value(metadata i32 %20, metadata !15, metadata !DIExpression()), !dbg !16
%tmp5 = add i32 %6, %13, !dbg !17 %tmp5 = add i32 %6, %13, !dbg !17
%tmp7 = add i32 %tmp5, %20, !dbg !17 %tmp7 = add i32 %tmp5, %20, !dbg !17
store i32 %tmp7, i32 addrspace(1)* %ip, align 4, !dbg !17 store i32 %tmp7, i32 addrspace(1)* %ip, align 4, !dbg !17
@ -76,7 +76,7 @@ declare <4 x i32> @__amdil_get_local_id_int() nounwind
declare <4 x i32> @__amdil_get_global_id_int() nounwind declare <4 x i32> @__amdil_get_global_id_int() nounwind
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!2} !llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!22} !llvm.module.flags = !{!22}

4
llvm/test/DebugInfo/X86/dbg-value-location.ll
View File

@ -18,7 +18,7 @@ declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
define i32 @foo(i32 %dev, i64 %cmd, i8* %data, i32 %data2) nounwind optsize ssp !dbg !0 { define i32 @foo(i32 %dev, i64 %cmd, i8* %data, i32 %data2) nounwind optsize ssp !dbg !0 {
entry: entry:
call void @llvm.dbg.value(metadata i32 %dev, i64 0, metadata !12, metadata !DIExpression()), !dbg !13 call void @llvm.dbg.value(metadata i32 %dev, metadata !12, metadata !DIExpression()), !dbg !13
%tmp.i = load i32, i32* @dfm, align 4, !dbg !14 %tmp.i = load i32, i32* @dfm, align 4, !dbg !14
%cmp.i = icmp eq i32 %tmp.i, 0, !dbg !14 %cmp.i = icmp eq i32 %tmp.i, 0, !dbg !14
br i1 %cmp.i, label %if.else, label %if.end.i, !dbg !14 br i1 %cmp.i, label %if.else, label %if.end.i, !dbg !14
@ -45,7 +45,7 @@ if.else: ; preds = %entry
declare hidden fastcc i32 @bar(i32, i32* nocapture) nounwind optsize ssp declare hidden fastcc i32 @bar(i32, i32* nocapture) nounwind optsize ssp
declare hidden fastcc i32 @bar2(i32) nounwind optsize ssp declare hidden fastcc i32 @bar2(i32) nounwind optsize ssp
declare hidden fastcc i32 @bar3(i32) nounwind optsize ssp declare hidden fastcc i32 @bar3(i32) nounwind optsize ssp
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!2} !llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!29} !llvm.module.flags = !{!29}

6
llvm/test/DebugInfo/X86/dbg-value-range.ll
View File

@ -4,10 +4,10 @@
define i32 @bar(%struct.a* nocapture %b) nounwind ssp !dbg !0 { define i32 @bar(%struct.a* nocapture %b) nounwind ssp !dbg !0 {
entry: entry:
tail call void @llvm.dbg.value(metadata %struct.a* %b, i64 0, metadata !6, metadata !DIExpression()), !dbg !13 tail call void @llvm.dbg.value(metadata %struct.a* %b, metadata !6, metadata !DIExpression()), !dbg !13
%tmp1 = getelementptr inbounds %struct.a, %struct.a* %b, i64 0, i32 0, !dbg !14 %tmp1 = getelementptr inbounds %struct.a, %struct.a* %b, i64 0, i32 0, !dbg !14
%tmp2 = load i32, i32* %tmp1, align 4, !dbg !14 %tmp2 = load i32, i32* %tmp1, align 4, !dbg !14
tail call void @llvm.dbg.value(metadata i32 %tmp2, i64 0, metadata !11, metadata !DIExpression()), !dbg !14 tail call void @llvm.dbg.value(metadata i32 %tmp2, metadata !11, metadata !DIExpression()), !dbg !14
%call = tail call i32 (...) @foo(i32 %tmp2) nounwind , !dbg !18 %call = tail call i32 (...) @foo(i32 %tmp2) nounwind , !dbg !18
%add = add nsw i32 %tmp2, 1, !dbg !19 %add = add nsw i32 %tmp2, 1, !dbg !19
ret i32 %add, !dbg !19 ret i32 %add, !dbg !19
@ -15,7 +15,7 @@ entry:
declare i32 @foo(...) declare i32 @foo(...)
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!2} !llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!24} !llvm.module.flags = !{!24}

6
llvm/test/DebugInfo/X86/dbg-value-regmask-clobber.ll
View File

@ -40,8 +40,8 @@ target triple = "x86_64-pc-windows-msvc18.0.0"
; Function Attrs: nounwind uwtable ; Function Attrs: nounwind uwtable
define i32 @main(i32 %argc, i8** nocapture readnone %argv) #0 !dbg !12 { define i32 @main(i32 %argc, i8** nocapture readnone %argv) #0 !dbg !12 {
entry: entry:
tail call void @llvm.dbg.value(metadata i8** %argv, i64 0, metadata !19, metadata !21), !dbg !22 tail call void @llvm.dbg.value(metadata i8** %argv, metadata !19, metadata !21), !dbg !22
tail call void @llvm.dbg.value(metadata i32 %argc, i64 0, metadata !20, metadata !21), !dbg !23 tail call void @llvm.dbg.value(metadata i32 %argc, metadata !20, metadata !21), !dbg !23
store volatile i32 1, i32* @x, align 4, !dbg !24, !tbaa !25 store volatile i32 1, i32* @x, align 4, !dbg !24, !tbaa !25
tail call void @clobber() #2, !dbg !29 tail call void @clobber() #2, !dbg !29
store volatile i32 2, i32* @x, align 4, !dbg !30, !tbaa !25 store volatile i32 2, i32* @x, align 4, !dbg !30, !tbaa !25
@ -65,7 +65,7 @@ if.end: ; preds = %if.else, %if.then
declare void @clobber() declare void @clobber()
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind uwtable } attributes #0 = { nounwind uwtable }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }

4
llvm/test/DebugInfo/X86/dbg-value-terminator.ll
View File

@ -88,7 +88,7 @@ VEC_edge_base_index.exit7.i: ; preds = %"3.i5.i"
"44.i": ; preds = %"42.i" "44.i": ; preds = %"42.i"
%2 = load %a*, %a** undef, align 8, !dbg !12 %2 = load %a*, %a** undef, align 8, !dbg !12
%3 = bitcast %a* %2 to %a*, !dbg !12 %3 = bitcast %a* %2 to %a*, !dbg !12
call void @llvm.dbg.value(metadata %a* %3, i64 0, metadata !6, metadata !DIExpression(DW_OP_deref)), !dbg !12 call void @llvm.dbg.value(metadata %a* %3, metadata !6, metadata !DIExpression(DW_OP_deref)), !dbg !12
br label %may_unswitch_on.exit, !dbg !12 br label %may_unswitch_on.exit, !dbg !12
"45.i": ; preds = %"38.i" "45.i": ; preds = %"38.i"
@ -109,7 +109,7 @@ may_unswitch_on.exit: ; preds = %"44.i", %"42.i", %"
attributes #0 = { nounwind readnone } attributes #0 = { nounwind readnone }
attributes #1 = { nounwind uwtable } attributes #1 = { nounwind uwtable }
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!22} !llvm.module.flags = !{!22}

4
llvm/test/DebugInfo/X86/debug-info-blocks.ll
View File

@ -167,7 +167,7 @@ define internal void @"__9-[A init]_block_invoke"(i8* %.block_descriptor) #0 !db
%d = alloca %1*, align 8 %d = alloca %1*, align 8
store i8* %.block_descriptor, i8** %1, align 8 store i8* %.block_descriptor, i8** %1, align 8
%3 = load i8*, i8** %1 %3 = load i8*, i8** %1
call void @llvm.dbg.value(metadata i8* %3, i64 0, metadata !76, metadata !DIExpression()), !dbg !88 call void @llvm.dbg.value(metadata i8* %3, metadata !76, metadata !DIExpression()), !dbg !88
call void @llvm.dbg.declare(metadata i8* %.block_descriptor, metadata !76, metadata !DIExpression()), !dbg !88 call void @llvm.dbg.declare(metadata i8* %.block_descriptor, metadata !76, metadata !DIExpression()), !dbg !88
%4 = bitcast i8* %.block_descriptor to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>*, !dbg !88 %4 = bitcast i8* %.block_descriptor to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>*, !dbg !88
store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %4, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>** %2, align 8, !dbg !88 store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %4, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>** %2, align 8, !dbg !88
@ -200,7 +200,7 @@ define internal void @"__9-[A init]_block_invoke"(i8* %.block_descriptor) #0 !db
ret void, !dbg !90 ret void, !dbg !90
} }
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
declare i8* @objc_msgSend_fixup(i8*, %struct._message_ref_t*, ...) declare i8* @objc_msgSend_fixup(i8*, %struct._message_ref_t*, ...)

6
llvm/test/DebugInfo/X86/debug-loc-frame.ll
View File

@ -53,9 +53,9 @@ entry:
%0 = bitcast i32* %val to i8*, !dbg !22 %0 = bitcast i32* %val to i8*, !dbg !22
call void @llvm.lifetime.start(i64 4, i8* %0), !dbg !22 call void @llvm.lifetime.start(i64 4, i8* %0), !dbg !22
%1 = load i32, i32* @data, align 4, !dbg !23, !tbaa !24 %1 = load i32, i32* @data, align 4, !dbg !23, !tbaa !24
tail call void @llvm.dbg.value(metadata i32 %1, i64 0, metadata !21, metadata !28), !dbg !29 tail call void @llvm.dbg.value(metadata i32 %1, metadata !21, metadata !28), !dbg !29
store i32 %1, i32* %val, align 4, !dbg !30, !tbaa !24 store i32 %1, i32* %val, align 4, !dbg !30, !tbaa !24
tail call void @llvm.dbg.value(metadata i32* %val, i64 0, metadata !21, metadata !31), !dbg !29 tail call void @llvm.dbg.value(metadata i32* %val, metadata !21, metadata !31), !dbg !29
call void @foo(i32 1, i32* nonnull %val), !dbg !32 call void @foo(i32 1, i32* nonnull %val), !dbg !32
call void @foo(i32 2, i32* nonnull @data), !dbg !33 call void @foo(i32 2, i32* nonnull @data), !dbg !33
%2 = load i32, i32* @zero, align 4, !dbg !34, !tbaa !24 %2 = load i32, i32* @zero, align 4, !dbg !34, !tbaa !24
@ -72,7 +72,7 @@ declare void @foo(i32, i32*) local_unnamed_addr
declare void @llvm.lifetime.end(i64, i8* nocapture) #0 declare void @llvm.lifetime.end(i64, i8* nocapture) #0
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { argmemonly nounwind } attributes #0 = { argmemonly nounwind }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }

10
llvm/test/DebugInfo/X86/debug-ranges-offset.ll
View File

@ -31,11 +31,11 @@ entry:
%call = call i8* @_Znwm(i64 4) #4, !dbg !19 %call = call i8* @_Znwm(i64 4) #4, !dbg !19
%_msret = load i64, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @__msan_retval_tls, i64 0, i64 0), align 8, !dbg !19 %_msret = load i64, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @__msan_retval_tls, i64 0, i64 0), align 8, !dbg !19
%3 = bitcast i8* %call to i32*, !dbg !19 %3 = bitcast i8* %call to i32*, !dbg !19
tail call void @llvm.dbg.value(metadata i32* %3, i64 0, metadata !9, metadata !DIExpression()), !dbg !19 tail call void @llvm.dbg.value(metadata i32* %3, metadata !9, metadata !DIExpression()), !dbg !19
%4 = inttoptr i64 %1 to i64*, !dbg !19 %4 = inttoptr i64 %1 to i64*, !dbg !19
store i64 %_msret, i64* %4, align 8, !dbg !19 store i64 %_msret, i64* %4, align 8, !dbg !19
store volatile i32* %3, i32** %p, align 8, !dbg !19 store volatile i32* %3, i32** %p, align 8, !dbg !19
tail call void @llvm.dbg.value(metadata i32** %p, i64 0, metadata !9, metadata !DIExpression()), !dbg !19 tail call void @llvm.dbg.value(metadata i32** %p, metadata !9, metadata !DIExpression()), !dbg !19
%p.0.p.0. = load volatile i32*, i32** %p, align 8, !dbg !20 %p.0.p.0. = load volatile i32*, i32** %p, align 8, !dbg !20
%_msld = load i64, i64* %4, align 8, !dbg !20 %_msld = load i64, i64* %4, align 8, !dbg !20
%_mscmp = icmp eq i64 %_msld, 0, !dbg !20 %_mscmp = icmp eq i64 %_msld, 0, !dbg !20
@ -96,11 +96,11 @@ entry:
%call.i = call i8* @_Znwm(i64 4) #4, !dbg !30 %call.i = call i8* @_Znwm(i64 4) #4, !dbg !30
%_msret = load i64, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @__msan_retval_tls, i64 0, i64 0), align 8, !dbg !30 %_msret = load i64, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @__msan_retval_tls, i64 0, i64 0), align 8, !dbg !30
%3 = bitcast i8* %call.i to i32*, !dbg !30 %3 = bitcast i8* %call.i to i32*, !dbg !30
tail call void @llvm.dbg.value(metadata i32* %3, i64 0, metadata !32, metadata !DIExpression()), !dbg !30 tail call void @llvm.dbg.value(metadata i32* %3, metadata !32, metadata !DIExpression()), !dbg !30
%4 = inttoptr i64 %1 to i64*, !dbg !30 %4 = inttoptr i64 %1 to i64*, !dbg !30
store i64 %_msret, i64* %4, align 8, !dbg !30 store i64 %_msret, i64* %4, align 8, !dbg !30
store volatile i32* %3, i32** %p.i, align 8, !dbg !30 store volatile i32* %3, i32** %p.i, align 8, !dbg !30
tail call void @llvm.dbg.value(metadata i32** %p.i, i64 0, metadata !32, metadata !DIExpression()), !dbg !30 tail call void @llvm.dbg.value(metadata i32** %p.i, metadata !32, metadata !DIExpression()), !dbg !30
%p.i.0.p.0.p.0..i = load volatile i32*, i32** %p.i, align 8, !dbg !33 %p.i.0.p.0.p.0..i = load volatile i32*, i32** %p.i, align 8, !dbg !33
%_msld = load i64, i64* %4, align 8, !dbg !33 %_msld = load i64, i64* %4, align 8, !dbg !33
%_mscmp = icmp eq i64 %_msld, 0, !dbg !33 %_mscmp = icmp eq i64 %_msld, 0, !dbg !33
@ -148,7 +148,7 @@ _Z1fv.exit: ; preds = %16, %if.then.i
declare void @__msan_init() declare void @__msan_init()
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
; Function Attrs: nounwind ; Function Attrs: nounwind
declare i32 @puts(i8* nocapture readonly) #3 declare i32 @puts(i8* nocapture readonly) #3

4
llvm/test/DebugInfo/X86/deleted-bit-piece.ll
View File

@ -14,14 +14,14 @@ entry:
br i1 undef, label %exit, label %bb br i1 undef, label %exit, label %bb
bb: ; preds = %entry bb: ; preds = %entry
call void @llvm.dbg.value(metadata i8* undef, i64 0, metadata !15, metadata !16), !dbg !17 call void @llvm.dbg.value(metadata i8* undef, metadata !15, metadata !16), !dbg !17
br label %exit br label %exit
exit: ; preds = %bb, %entry exit: ; preds = %bb, %entry
ret void ret void
} }
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) declare void @llvm.dbg.value(metadata, metadata, metadata)
!llvm.module.flags = !{!0, !1} !llvm.module.flags = !{!0, !1}
!llvm.dbg.cu = !{!2} !llvm.dbg.cu = !{!2}

4
llvm/test/DebugInfo/X86/dw_op_minus_direct.ll
View File

@ -26,11 +26,11 @@ target triple = "x86_64-apple-macosx10.12.0"
define i32 @inc(i32 %i) local_unnamed_addr #1 !dbg !7 { define i32 @inc(i32 %i) local_unnamed_addr #1 !dbg !7 {
entry: entry:
%add = add nsw i32 %i, 1, !dbg !15 %add = add nsw i32 %i, 1, !dbg !15
tail call void @llvm.dbg.value(metadata i32 %add, i64 0, metadata !12, metadata !13), !dbg !14 tail call void @llvm.dbg.value(metadata i32 %add, metadata !12, metadata !13), !dbg !14
ret i32 %add, !dbg !16 ret i32 %add, !dbg !16
} }
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }

6
llvm/test/DebugInfo/X86/dwarf-aranges-no-dwarf-labels.ll
View File

@ -28,14 +28,14 @@ target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind readnone uwtable ; Function Attrs: nounwind readnone uwtable
define i32 @_Z3fooi(i32 %bar) #0 !dbg !9 { define i32 @_Z3fooi(i32 %bar) #0 !dbg !9 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 %bar, i64 0, metadata !13, metadata !14), !dbg !15 tail call void @llvm.dbg.value(metadata i32 %bar, metadata !13, metadata !14), !dbg !15
ret i32 %bar, !dbg !15 ret i32 %bar, !dbg !15
} }
; Function Attrs: nounwind readnone uwtable ; Function Attrs: nounwind readnone uwtable
define i32 @_Z4foo2i(i32 %bar2) #0 !dbg !16 { define i32 @_Z4foo2i(i32 %bar2) #0 !dbg !16 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 %bar2, i64 0, metadata !18, metadata !14), !dbg !19 tail call void @llvm.dbg.value(metadata i32 %bar2, metadata !18, metadata !14), !dbg !19
ret i32 %bar2, !dbg !19 ret i32 %bar2, !dbg !19
} }
@ -51,7 +51,7 @@ entry:
} }
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { nounwind readnone uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind readnone uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readonly uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind readonly uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }

4
llvm/test/DebugInfo/X86/earlydup-crash.ll
View File

@ -4,7 +4,7 @@
%struct.cpp_dir = type { %struct.cpp_dir*, i8*, i32, i8, i8**, i8*, i8* (i8*, %struct.cpp_dir*)*, i64, i32, i8 } %struct.cpp_dir = type { %struct.cpp_dir*, i8*, i32, i8, i8**, i8*, i8* (i8*, %struct.cpp_dir*)*, i64, i32, i8 }
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
define internal i8* @framework_construct_pathname(i8* %fname, %struct.cpp_dir* %dir) nounwind ssp !dbg !2 { define internal i8* @framework_construct_pathname(i8* %fname, %struct.cpp_dir* %dir) nounwind ssp !dbg !2 {
entry: entry:
@ -13,7 +13,7 @@ entry:
bb: ; preds = %entry bb: ; preds = %entry
%tmp = icmp eq i32 undef, 0 %tmp = icmp eq i32 undef, 0
%tmp1 = add i32 0, 11 %tmp1 = add i32 0, 11
call void @llvm.dbg.value(metadata i32 %tmp1, i64 0, metadata !0, metadata !DIExpression()), !dbg !DILocation(scope: !1) call void @llvm.dbg.value(metadata i32 %tmp1, metadata !0, metadata !DIExpression()), !dbg !DILocation(scope: !1)
br i1 undef, label %bb18, label %bb31.preheader br i1 undef, label %bb18, label %bb31.preheader
bb31.preheader: ; preds = %bb19, %bb bb31.preheader: ; preds = %bb19, %bb

8
llvm/test/DebugInfo/X86/elf-names.ll
View File

@ -22,7 +22,7 @@
define void @_ZN1DC2Ev(%class.D* nocapture %this) unnamed_addr nounwind uwtable align 2 !dbg !5 { define void @_ZN1DC2Ev(%class.D* nocapture %this) unnamed_addr nounwind uwtable align 2 !dbg !5 {
entry: entry:
tail call void @llvm.dbg.value(metadata %class.D* %this, i64 0, metadata !29, metadata !DIExpression()), !dbg !36 tail call void @llvm.dbg.value(metadata %class.D* %this, metadata !29, metadata !DIExpression()), !dbg !36
%c1 = getelementptr inbounds %class.D, %class.D* %this, i64 0, i32 0, !dbg !37 %c1 = getelementptr inbounds %class.D, %class.D* %this, i64 0, i32 0, !dbg !37
store i32 1, i32* %c1, align 4, !dbg !37 store i32 1, i32* %c1, align 4, !dbg !37
%c2 = getelementptr inbounds %class.D, %class.D* %this, i64 0, i32 1, !dbg !42 %c2 = getelementptr inbounds %class.D, %class.D* %this, i64 0, i32 1, !dbg !42
@ -36,8 +36,8 @@ entry:
define void @_ZN1DC2ERKS_(%class.D* nocapture %this, %class.D* nocapture %d) unnamed_addr nounwind uwtable align 2 !dbg !31 { define void @_ZN1DC2ERKS_(%class.D* nocapture %this, %class.D* nocapture %d) unnamed_addr nounwind uwtable align 2 !dbg !31 {
entry: entry:
tail call void @llvm.dbg.value(metadata %class.D* %this, i64 0, metadata !34, metadata !DIExpression()), !dbg !46 tail call void @llvm.dbg.value(metadata %class.D* %this, metadata !34, metadata !DIExpression()), !dbg !46
tail call void @llvm.dbg.value(metadata %class.D* %d, i64 0, metadata !35, metadata !DIExpression()), !dbg !46 tail call void @llvm.dbg.value(metadata %class.D* %d, metadata !35, metadata !DIExpression()), !dbg !46
%c1 = getelementptr inbounds %class.D, %class.D* %d, i64 0, i32 0, !dbg !47 %c1 = getelementptr inbounds %class.D, %class.D* %d, i64 0, i32 0, !dbg !47
%0 = load i32, i32* %c1, align 4, !dbg !47 %0 = load i32, i32* %c1, align 4, !dbg !47
%c12 = getelementptr inbounds %class.D, %class.D* %this, i64 0, i32 0, !dbg !47 %c12 = getelementptr inbounds %class.D, %class.D* %this, i64 0, i32 0, !dbg !47
@ -57,7 +57,7 @@ entry:
ret void, !dbg !52 ret void, !dbg !52
} }
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!54} !llvm.module.flags = !{!54}

16
llvm/test/DebugInfo/X86/fission-ranges.ll
View File

@ -91,8 +91,8 @@ entry:
; Function Attrs: nounwind uwtable ; Function Attrs: nounwind uwtable
define internal fastcc void @foo() #0 !dbg !8 { define internal fastcc void @foo() #0 !dbg !8 {
entry: entry:
tail call void @llvm.dbg.value(metadata i32 1, i64 0, metadata !13, metadata !DIExpression()), !dbg !30 tail call void @llvm.dbg.value(metadata i32 1, metadata !13, metadata !DIExpression()), !dbg !30
tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !14, metadata !DIExpression()), !dbg !31 tail call void @llvm.dbg.value(metadata i32 0, metadata !14, metadata !DIExpression()), !dbg !31
%c.promoted9 = load i32, i32* @c, align 4, !dbg !32, !tbaa !33 %c.promoted9 = load i32, i32* @c, align 4, !dbg !32, !tbaa !33
br label %for.cond1.preheader, !dbg !31 br label %for.cond1.preheader, !dbg !31
@ -114,28 +114,28 @@ for.cond7.preheader: ; preds = %for.inc10, %for.con
for.body9: ; preds = %for.body9, %for.cond7.preheader for.body9: ; preds = %for.body9, %for.cond7.preheader
%and2 = phi i32 [ %and.lcssa5, %for.cond7.preheader ], [ %and, %for.body9 ], !dbg !40 %and2 = phi i32 [ %and.lcssa5, %for.cond7.preheader ], [ %and, %for.body9 ], !dbg !40
%e.01 = phi i32 [ 0, %for.cond7.preheader ], [ %inc, %for.body9 ] %e.01 = phi i32 [ 0, %for.cond7.preheader ], [ %inc, %for.body9 ]
tail call void @llvm.dbg.value(metadata i32* @c, i64 0, metadata !19, metadata !DIExpression()), !dbg !40 tail call void @llvm.dbg.value(metadata i32* @c, metadata !19, metadata !DIExpression()), !dbg !40
%and = and i32 %and2, 1, !dbg !32 %and = and i32 %and2, 1, !dbg !32
%inc = add i32 %e.01, 1, !dbg !39 %inc = add i32 %e.01, 1, !dbg !39
tail call void @llvm.dbg.value(metadata i32 %inc, i64 0, metadata !18, metadata !DIExpression()), !dbg !39 tail call void @llvm.dbg.value(metadata i32 %inc, metadata !18, metadata !DIExpression()), !dbg !39
%exitcond = icmp eq i32 %inc, 30, !dbg !39 %exitcond = icmp eq i32 %inc, 30, !dbg !39
br i1 %exitcond, label %for.inc10, label %for.body9, !dbg !39 br i1 %exitcond, label %for.inc10, label %for.body9, !dbg !39
for.inc10: ; preds = %for.body9 for.inc10: ; preds = %for.body9
%inc11 = add nsw i32 %b.03, 1, !dbg !38 %inc11 = add nsw i32 %b.03, 1, !dbg !38
tail call void @llvm.dbg.value(metadata i32 %inc11, i64 0, metadata !15, metadata !DIExpression()), !dbg !38 tail call void @llvm.dbg.value(metadata i32 %inc11, metadata !15, metadata !DIExpression()), !dbg !38
%exitcond11 = icmp eq i32 %inc11, 30, !dbg !38 %exitcond11 = icmp eq i32 %inc11, 30, !dbg !38
br i1 %exitcond11, label %for.inc13, label %for.cond7.preheader, !dbg !38 br i1 %exitcond11, label %for.inc13, label %for.cond7.preheader, !dbg !38
for.inc13: ; preds = %for.inc10 for.inc13: ; preds = %for.inc10
%inc14 = add i32 %d.06, 1, !dbg !37 %inc14 = add i32 %d.06, 1, !dbg !37
tail call void @llvm.dbg.value(metadata i32 %inc14, i64 0, metadata !16, metadata !DIExpression()), !dbg !37 tail call void @llvm.dbg.value(metadata i32 %inc14, metadata !16, metadata !DIExpression()), !dbg !37
%exitcond12 = icmp eq i32 %inc14, 30, !dbg !37 %exitcond12 = icmp eq i32 %inc14, 30, !dbg !37
br i1 %exitcond12, label %for.inc16, label %for.cond4.preheader, !dbg !37 br i1 %exitcond12, label %for.inc16, label %for.cond4.preheader, !dbg !37
for.inc16: ; preds = %for.inc13 for.inc16: ; preds = %for.inc13
%inc17 = add nsw i32 %a.08, 1, !dbg !31 %inc17 = add nsw i32 %a.08, 1, !dbg !31
tail call void @llvm.dbg.value(metadata i32 %inc17, i64 0, metadata !14, metadata !DIExpression()), !dbg !31 tail call void @llvm.dbg.value(metadata i32 %inc17, metadata !14, metadata !DIExpression()), !dbg !31
%exitcond13 = icmp eq i32 %inc17, 30, !dbg !31 %exitcond13 = icmp eq i32 %inc17, 30, !dbg !31
br i1 %exitcond13, label %for.end18, label %for.cond1.preheader, !dbg !31 br i1 %exitcond13, label %for.end18, label %for.cond1.preheader, !dbg !31
@ -145,7 +145,7 @@ for.end18: ; preds = %for.inc16
} }
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }

6
llvm/test/DebugInfo/X86/float_const.ll
View File

@ -11,8 +11,8 @@ target triple = "x86_64-apple-macosx10.10.0"
define void @foo() #0 !dbg !7 { define void @foo() #0 !dbg !7 {
entry: entry:
tail call void @llvm.dbg.declare(metadata float* undef, metadata !13, metadata !19), !dbg !20 tail call void @llvm.dbg.declare(metadata float* undef, metadata !13, metadata !19), !dbg !20
tail call void @llvm.dbg.value(metadata i32 1078523331, i64 0, metadata !13, metadata !19), !dbg !20 tail call void @llvm.dbg.value(metadata i32 1078523331, metadata !13, metadata !19), !dbg !20
tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !13, metadata !19), !dbg !20 tail call void @llvm.dbg.value(metadata i32 0, metadata !13, metadata !19), !dbg !20
; CHECK: DW_AT_const_value [DW_FORM_sdata] (0) ; CHECK: DW_AT_const_value [DW_FORM_sdata] (0)
; CHECK-NEXT: DW_AT_name {{.*}}"a" ; CHECK-NEXT: DW_AT_name {{.*}}"a"
ret void, !dbg !21 ret void, !dbg !21
@ -22,7 +22,7 @@ entry:
declare void @llvm.dbg.declare(metadata, metadata, metadata) #1 declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind optsize readnone uwtable } attributes #0 = { nounwind optsize readnone uwtable }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }

6
llvm/test/DebugInfo/X86/float_const_loclist.ll
View File

@ -43,8 +43,8 @@ target triple = "x86_64-apple-macosx10.11.0"
define void @foo() #0 !dbg !4 { define void @foo() #0 !dbg !4 {
entry: entry:
tail call void (...) @barrier() #3, !dbg !16 tail call void (...) @barrier() #3, !dbg !16
tail call void @llvm.dbg.value(metadata float 0x40091EB860000000, i64 0, metadata !8, metadata !17), !dbg !18 tail call void @llvm.dbg.value(metadata float 0x40091EB860000000, metadata !8, metadata !17), !dbg !18
tail call void @llvm.dbg.value(metadata x86_fp80 0xK4000C8F5C28F5C28F800, i64 0, metadata !10, metadata !17), !dbg !19 tail call void @llvm.dbg.value(metadata x86_fp80 0xK4000C8F5C28F5C28F800, metadata !10, metadata !17), !dbg !19
tail call void (...) @barrier() #3, !dbg !20 tail call void (...) @barrier() #3, !dbg !20
ret void, !dbg !21 ret void, !dbg !21
} }
@ -52,7 +52,7 @@ entry:
declare void @barrier(...) declare void @barrier(...)
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { nounwind ssp uwtable } attributes #0 = { nounwind ssp uwtable }
attributes #2 = { nounwind readnone } attributes #2 = { nounwind readnone }

2
llvm/test/DebugInfo/X86/formal_parameter.ll
View File

@ -49,7 +49,7 @@ declare i32 @lookup(...)
declare i32 @verify(...) declare i32 @verify(...)
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind ssp uwtable } attributes #0 = { nounwind ssp uwtable }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }

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