forked from OSchip/llvm-project
[M68k][AsmParser] Support negative integer constants
Parsing negative integer constants as expressions. Differential Revision: https://reviews.llvm.org/D101732
This commit is contained in:
Min-Yih Hsu
parent
34da083a8c
commit
abac6023bb
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@ -49,7 +49,7 @@ class M68kAsmParser : public MCTargetAsmParser {
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// Parser functions.
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void eatComma();
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bool isExpr() const;
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bool isExpr();
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OperandMatchResultTy parseImm(OperandVector &Operands);
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OperandMatchResultTy parseMemOp(OperandVector &Operands);
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@ -581,11 +581,13 @@ OperandMatchResultTy M68kAsmParser::tryParseRegister(unsigned &RegNo,
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return Result;
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}
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bool M68kAsmParser::isExpr() const {
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bool M68kAsmParser::isExpr() {
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switch (Parser.getTok().getKind()) {
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case AsmToken::Identifier:
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case AsmToken::Integer:
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return true;
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case AsmToken::Minus:
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return getLexer().peekTok().getKind() == AsmToken::Integer;
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default:
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return false;
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@ -1,88 +0,0 @@
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# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
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# RUN: | extract-section .text \
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# RUN: | FileCheck %s -check-prefixes=ADD8FI,ADD32FI,ADD8PI,ADD32PI,ADD8JI,ADD32JI
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#------------------------------------------------------------------------------
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# MxBiArOp_FMI class used for binary arithmetic operations and operates on
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# memory and immediate data. It uses MxArithImmEncoding class.
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#------------------------------------------------------------------------------
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--- # ARII
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# -------------------------------+-------+-----------+-----------
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# F E D C B A 9 8 | 7 6 | 5 4 3 | 2 1 0
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# -------------------------------+-------+-----------+-----------
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# OPWORD x x x x x x x x | SIZE | MODE | REG
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# -------------------------------+-------+-----------+-----------
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# ADD8FI: 0 0 0 0 0 1 1 0 . 0 0 1 1 0 0 0 0
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# ADD8FI-SAME: 0 0 0 0 0 0 0 0 . 1 1 1 1 1 1 1 1
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# ADD8FI-SAME: 0 0 0 0 1 0 0 0 . 0 0 0 0 0 0 0 0
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# -------------------------------+-------------------------------
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# ADD8FI-SAME: 0 0 0 0 0 1 1 0 . 0 0 1 1 0 0 1 1
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# ADD8FI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
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# ADD8FI-SAME: 1 0 0 1 1 0 0 0 . 1 1 1 1 1 1 1 1
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# -------------------------------+-------------------------------
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# ADD32FI-SAME: 0 0 0 0 0 1 1 0 . 1 0 1 1 0 0 1 0
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# ADD32FI-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
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# ADD32FI-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
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# ADD32FI-SAME: 0 0 0 1 1 0 0 0 . 0 0 0 0 1 1 0 1
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# ---+-----------+---+-------+---+-------------------------------
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# BRIEF DA | REG | L | SCALE | 0 | DISPLACEMENT
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# ---+-----------+---+-------+---+-------------------------------
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name: MxBiArOp_FMI_ARII
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body: |
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bb.0:
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ADD8fi 0, $a0, $d0, -1, implicit-def $ccr
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ADD8fi -1, $a3, $a1, 0, implicit-def $ccr
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ADD32fi 13, $a2, $d1, -1, implicit-def $ccr
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...
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--- # ARID
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# -------------------------------+-------+-----------+-----------
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# F E D C B A 9 8 | 7 6 | 5 4 3 | 2 1 0
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# -------------------------------+-------+-----------+-----------
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# OPWORD x x x x x x x x | SIZE | MODE | REG
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# -------------------------------+-------+-----------+-----------
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# ADD8PI-SAME: 0 0 0 0 0 1 1 0 . 0 0 1 0 1 0 0 0
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# ADD8PI-SAME: 0 0 0 0 0 0 0 0 . 1 1 1 1 1 1 1 1
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# ADD8PI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
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# -------------------------------+-------------------------------
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# ADD8PI-SAME: 0 0 0 0 0 1 1 0 . 0 0 1 0 1 0 1 1
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# ADD8PI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
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# ADD8PI-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
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# -------------------------------+-------------------------------
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# ADD32PI-SAME: 0 0 0 0 0 1 1 0 . 1 0 1 0 1 0 1 0
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# ADD32PI-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
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# ADD32PI-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
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# ADD32PI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 1 1 0 1
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name: MxBiArOp_FMI_ARID
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body: |
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bb.0:
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ADD8pi 0, $a0, -1, implicit-def $ccr
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ADD8pi -1, $a3, 0, implicit-def $ccr
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ADD32pi 13, $a2, -1, implicit-def $ccr
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...
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--- # ARI
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# -------------------------------+-------+-----------+-----------
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# F E D C B A 9 8 | 7 6 | 5 4 3 | 2 1 0
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# -------------------------------+-------+-----------+-----------
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# OPWORD x x x x x x x x | SIZE | MODE | REG
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# -------------------------------+-------+-----------+-----------
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# ADD8JI-SAME: 0 0 0 0 0 1 1 0 . 0 0 0 1 0 0 0 0
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# ADD8JI-SAME: 0 0 0 0 0 0 0 0 . 1 1 1 1 1 1 1 1
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# -------------------------------+-------------------------------
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# ADD8JI-SAME: 0 0 0 0 0 1 1 0 . 0 0 0 1 0 0 1 1
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# ADD8JI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
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# -------------------------------+-------------------------------
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# ADD32JI-SAME: 0 0 0 0 0 1 1 0 . 1 0 0 1 0 0 1 0
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# ADD32JI-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
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# ADD32JI-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
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name: MxBiArOp_FMI_ARI
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body: |
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bb.0:
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ADD8ji $a0, -1, implicit-def $ccr
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ADD8ji $a3, 0, implicit-def $ccr
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ADD32ji $a2, -1, implicit-def $ccr
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...
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@ -1,73 +0,0 @@
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# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
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# RUN: | extract-section .text \
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# RUN: | FileCheck %s -check-prefixes=ADD8FD,ADD32FD,ADD8PD,ADD32PD,ADD8JD,ADD32JD
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#------------------------------------------------------------------------------
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# MxBiArOp_FMR class used for binary arithmetic operations and operates on
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# register and memory; the result is store to memory. It uses MxArithEncoding
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# encoding class and MxOpModeEAd opmode class.
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#------------------------------------------------------------------------------
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--- # ARII
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# ---------------+-----------+-----------+-----------+-----------
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# F E D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
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# ---------------+-----------+-----------+-----------+-----------
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# OPWORD x x x x | REG | OPMODE | MODE | REG
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# ---------------+-----------+-----------+-----------+-----------
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# ADD8FD: 1 1 0 1 0 0 0 1 . 0 0 1 1 0 0 0 0
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# ADD8FD-SAME: 0 0 0 1 1 0 0 0 . 0 0 0 0 0 0 0 0
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# ---------------------------------------------------------------
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# ADD8FD-SAME: 1 1 0 1 0 0 0 1 . 0 0 1 1 0 0 0 0
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# ADD8FD-SAME: 0 0 0 1 1 0 0 0 . 1 1 1 1 1 1 1 1
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# ---------------------------------------------------------------
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# ADD32FD-SAME: 1 1 0 1 0 0 0 1 . 1 0 1 1 0 0 0 1
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# ADD32FD-SAME: 0 0 0 1 1 0 0 0 . 0 0 0 0 0 0 0 0
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# ---------------------------------------------------------------
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# ADD32FD-SAME: 1 1 0 1 0 0 1 1 . 1 0 1 1 0 0 1 0
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# ADD32FD-SAME: 1 0 1 0 1 0 0 0 . 0 0 0 0 0 0 0 0
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# ---+-----------+---+-------+---+-------------------------------
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# BRIEF DA | REG | L | SCALE | 0 | DISPLACEMENT
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# ---+-----------+---+-------+---+-------------------------------
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name: MxBiArOp_FMR_ARII
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body: |
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bb.0:
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ADD8fd 0, $a0, $d1, $bd0, implicit-def $ccr
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ADD8fd -1, $a0, $d1, $bd0, implicit-def $ccr
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ADD32fd 0, $a1, $d1, $d0, implicit-def $ccr
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ADD32fd 0, $a2, $a2, $d1, implicit-def $ccr
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...
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--- # ARID
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# ---------------+-----------+-----------+-----------+-----------
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# F E D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
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# ---------------+-----------+-----------+-----------+-----------
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# OPWORD x x x x | REG | OPMODE | MODE | REG
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# ---------------+-----------+-----------+-----------+-----------
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# ADD8PD-SAME: 1 1 0 1 0 0 0 1 . 0 0 1 0 1 0 0 0
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# ADD8PD-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
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# ---------------------------------------------------------------
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# ADD32PD-SAME: 1 1 0 1 0 0 0 1 . 1 0 1 0 1 0 0 1
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# ADD32PD-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
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name: MxBiArOp_FMR_ARID
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body: |
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bb.0:
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ADD8pd 0, $a0, $bd0, implicit-def $ccr
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ADD32pd -1, $a1, $d0, implicit-def $ccr
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...
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--- # ARI
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# ---------------+-----------+-----------+-----------+-----------
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# F E D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
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# ---------------+-----------+-----------+-----------+-----------
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# OPWORD x x x x | REG | OPMODE | MODE | REG
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# ---------------+-----------+-----------+-----------+-----------
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# ADD8JD-SAME: 1 1 0 1 0 0 0 1 . 0 0 0 1 0 0 0 0
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# ---------------------------------------------------------------
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# ADD32JD-SAME: 1 1 0 1 0 1 1 1 . 1 0 0 1 0 0 0 1
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name: MxBiArOp_FMR_ARI
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body: |
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bb.0:
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ADD8jd $a0, $bd0, implicit-def $ccr
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ADD32jd $a1, $d3, implicit-def $ccr
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...
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@ -1,115 +0,0 @@
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# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
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# RUN: | extract-section .text \
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# RUN: | FileCheck %s -check-prefixes=BTST8KI,BTST8QI,BTST8FI,BTST8PI,BTST8JI
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#------------------------------------------------------------------------------
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# MxBTST_MI class used for BTST operations, the source is locate in memory and
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# the bit number is immediate value. This instruciton can only operate on 8 bits.
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#------------------------------------------------------------------------------
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--- # PCI
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# ---------------------------------------+-----------+-----------
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# F E D C B A 9 8 7 6 | 5 4 3 | 2 1 0
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# ---------------------------------------+-----------+-----------
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# 0 0 0 0 1 0 0 0 0 0 | MODE | REG
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# ---------------------------------------+-----------+-----------
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# BTST8KI: 0 0 0 0 1 0 0 0 . 0 0 1 1 1 0 1 1
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# BTST8KI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
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# BTST8KI-SAME: 0 0 0 1 1 0 0 0 . 1 1 1 1 1 1 1 1
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# -------------------------------+-------+-----------+-----------
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# BTST8KI-SAME: 0 0 0 0 1 0 0 0 . 0 0 1 1 1 0 1 1
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# BTST8KI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 1
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# BTST8KI-SAME: 0 0 0 0 1 0 0 0 . 0 0 0 0 0 0 0 0
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# ---+-----------+---+-------+---+-------------------------------
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# BRIEF DA | REG | L | SCALE | 0 | DISPLACEMENT
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# ---+-----------+---+-------+---+-------------------------------
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name: MxBTST_MI_PCI
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body: |
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bb.0:
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BTST8ki -1, $d1, 0, implicit-def $ccr
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BTST8ki 0, $d0, 1, implicit-def $ccr
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...
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--- # PCD
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# ---------------------------------------+-----------+-----------
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# F E D C B A 9 8 7 6 | 5 4 3 | 2 1 0
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# ---------------------------------------+-----------+-----------
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# 0 0 0 0 1 0 0 0 0 0 | MODE | REG
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# ---------------------------------------+-----------+-----------
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# BTST8QI-SAME: 0 0 0 0 1 0 0 0 . 0 0 1 1 1 0 1 0
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# BTST8QI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
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# BTST8QI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
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# -------------------------------+-------+-----------+-----------
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# BTST8QI-SAME: 0 0 0 0 1 0 0 0 . 0 0 1 1 1 0 1 0
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# BTST8QI-SAME: 0 0 0 0 0 0 0 0 . 1 1 1 1 1 1 1 1
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# BTST8QI-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
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# -------------------------------+-------+-----------+-----------
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name: MxBTST_MI_PCD
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body: |
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bb.0:
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BTST8qi 0, 0, implicit-def $ccr
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BTST8qi -1, -1, implicit-def $ccr
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...
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--- # ARII
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# ---------------------------------------+-----------+-----------
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# F E D C B A 9 8 7 6 | 5 4 3 | 2 1 0
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# ---------------------------------------+-----------+-----------
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# 0 0 0 0 1 0 0 0 0 0 | MODE | REG
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# ---------------------------------------+-----------+-----------
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# BTST8FI-SAME: 0 0 0 0 1 0 0 0 . 0 0 1 1 0 0 0 1
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# BTST8FI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
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# BTST8FI-SAME: 1 0 0 0 1 0 0 0 . 1 1 1 1 1 1 1 1
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# -------------------------------+-------+-----------+-----------
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# BTST8FI-SAME: 0 0 0 0 1 0 0 0 . 0 0 1 1 0 0 0 0
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# BTST8FI-SAME: 0 0 0 0 0 0 0 0 . 1 1 1 1 1 1 1 1
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# BTST8FI-SAME: 1 0 0 0 1 0 0 0 . 0 0 0 0 0 0 0 0
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# ---+-----------+---+-------+---+-------------------------------
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# BRIEF DA | REG | L | SCALE | 0 | DISPLACEMENT
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# ---+-----------+---+-------+---+-------------------------------
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name: MxBTST_MI_ARII
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body: |
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bb.0:
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BTST8fi -1, $a1, $a0, 0, implicit-def $ccr
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BTST8fi 0, $a0, $a0, -1, implicit-def $ccr
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...
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--- # ARID
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# ---------------------------------------+-----------+-----------
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# F E D C B A 9 8 7 6 | 5 4 3 | 2 1 0
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# ---------------------------------------+-----------+-----------
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# 0 0 0 0 1 0 0 0 0 0 | MODE | REG
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# ---------------------------------------+-----------+-----------
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# BTST8PI-SAME: 0 0 0 0 1 0 0 0 . 0 0 1 0 1 0 0 1
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# BTST8PI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
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# BTST8PI-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
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# -------------------------------+-------+-----------+-----------
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# BTST8PI-SAME: 0 0 0 0 1 0 0 0 . 0 0 1 0 1 0 0 0
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# BTST8PI-SAME: 0 0 0 0 0 0 0 0 . 1 1 1 1 1 1 1 1
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# BTST8PI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
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name: MxBTST_MI_ARID
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body: |
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bb.0:
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BTST8pi -1, $a1, 0, implicit-def $ccr
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BTST8pi 0, $a0, -1, implicit-def $ccr
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...
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--- # ARI
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# ---------------------------------------+-----------+-----------
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# F E D C B A 9 8 7 6 | 5 4 3 | 2 1 0
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# ---------------------------------------+-----------+-----------
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# 0 0 0 0 1 0 0 0 0 0 | MODE | REG
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# ---------------------------------------+-----------+-----------
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# BTST8JI-SAME: 0 0 0 0 1 0 0 0 . 0 0 0 1 0 0 0 1
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# BTST8JI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
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# -------------------------------+-------+-----------+-----------
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# BTST8JI-SAME: 0 0 0 0 1 0 0 0 . 0 0 0 1 0 0 0 0
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# BTST8JI-SAME: 0 0 0 0 0 0 0 0 . 1 1 1 1 1 1 1 1
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name: MxBTST_MI_ARI
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body: |
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bb.0:
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BTST8ji $a1, 0, implicit-def $ccr
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BTST8ji $a0, -1, implicit-def $ccr
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...
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@ -1,104 +0,0 @@
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# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
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# RUN: | extract-section .text \
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# RUN: | FileCheck %s -check-prefixes=BTST8KD,BTST8QD,BTST8FD,BTST8PD,BTST8JD
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#------------------------------------------------------------------------------
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# MxBTST_MR class used for BTST operations, the source is locate in memory and
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# the bit number is in register. This instruciton can only operate on 8 bits.
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#------------------------------------------------------------------------------
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--- # PCI
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# ---------------+-----------+-----------+-----------+-----------
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# F E D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
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# ---------------+-----------+-----------+-----------+-----------
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# 0 0 0 0 | REG | 1 0 0 | MODE | REG
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# ---------------+-----------+-----------+-----------+-----------
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# BTST8KD: 0 0 0 0 0 0 0 1 . 0 0 1 1 1 0 1 1
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# BTST8KD-SAME: 0 0 0 1 1 0 0 0 . 1 1 1 1 1 1 1 1
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# -------------------------------+-------+-----------+-----------
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# BTST8KD-SAME: 0 0 0 0 0 0 1 1 . 0 0 1 1 1 0 1 1
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# BTST8KD-SAME: 0 0 0 0 1 0 0 0 . 0 0 0 0 0 0 0 0
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# ---+-----------+---+-------+---+-------------------------------
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# BRIEF DA | REG | L | SCALE | 0 | DISPLACEMENT
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# ---+-----------+---+-------+---+-------------------------------
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name: MxBTST_MR_PCI
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body: |
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bb.0:
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BTST8kd -1, $d1, $bd0, implicit-def $ccr
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BTST8kd 0, $d0, $bd1, implicit-def $ccr
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...
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--- # PCD
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# ---------------+-----------+-----------+-----------+-----------
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# F E D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
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# ---------------+-----------+-----------+-----------+-----------
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# 0 0 0 0 | REG | 1 0 0 | MODE | REG
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# ---------------+-----------+-----------+-----------+-----------
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# BTST8QD-SAME: 0 0 0 0 0 0 0 1 . 0 0 1 1 1 0 1 0
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# BTST8QD-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
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# -------------------------------+-------+-----------+-----------
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# BTST8QD-SAME: 0 0 0 0 0 0 1 1 . 0 0 1 1 1 0 1 0
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# BTST8QD-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
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# -------------------------------+-------+-----------+-----------
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name: MxBTST_MR_PCD
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body: |
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bb.0:
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BTST8qd 0, $bd0, implicit-def $ccr
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BTST8qd -1, $bd1, implicit-def $ccr
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...
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--- # ARII
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# ---------------+-----------+-----------+-----------+-----------
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# F E D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
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# ---------------+-----------+-----------+-----------+-----------
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# 0 0 0 0 | REG | 1 0 0 | MODE | REG
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# ---------------+-----------+-----------+-----------+-----------
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# BTST8FD-SAME: 0 0 0 0 0 0 0 1 . 0 0 1 1 0 0 0 1
|
||||
# BTST8FD-SAME: 1 0 0 0 1 0 0 0 . 1 1 1 1 1 1 1 1
|
||||
# -------------------------------+-------+-----------+-----------
|
||||
# BTST8FD-SAME: 0 0 0 0 0 0 1 1 . 0 0 1 1 0 0 0 0
|
||||
# BTST8FD-SAME: 1 0 0 0 1 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---+-----------+---+-------+---+-------------------------------
|
||||
# BRIEF DA | REG | L | SCALE | 0 | DISPLACEMENT
|
||||
# ---+-----------+---+-------+---+-------------------------------
|
||||
name: MxBTST_MR_ARII
|
||||
body: |
|
||||
bb.0:
|
||||
BTST8fd -1, $a1, $a0, $bd0, implicit-def $ccr
|
||||
BTST8fd 0, $a0, $a0, $bd1, implicit-def $ccr
|
||||
|
||||
...
|
||||
--- # ARID
|
||||
# ---------------+-----------+-----------+-----------+-----------
|
||||
# F E D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
|
||||
# ---------------+-----------+-----------+-----------+-----------
|
||||
# 0 0 0 0 | REG | 1 0 0 | MODE | REG
|
||||
# ---------------+-----------+-----------+-----------+-----------
|
||||
# BTST8PD-SAME: 0 0 0 0 0 0 0 1 . 0 0 1 0 1 0 0 1
|
||||
# BTST8PD-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
|
||||
# -------------------------------+-------+-----------+-----------
|
||||
# BTST8PD-SAME: 0 0 0 0 0 0 1 1 . 0 0 1 0 1 0 0 0
|
||||
# BTST8PD-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
name: MxBTST_MR_ARID
|
||||
body: |
|
||||
bb.0:
|
||||
BTST8pd -1, $a1, $bd0, implicit-def $ccr
|
||||
BTST8pd 0, $a0, $bd1, implicit-def $ccr
|
||||
|
||||
...
|
||||
--- # ARI
|
||||
# ---------------+-----------+-----------+-----------+-----------
|
||||
# F E D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
|
||||
# ---------------+-----------+-----------+-----------+-----------
|
||||
# 0 0 0 0 | REG | 1 0 0 | MODE | REG
|
||||
# ---------------+-----------+-----------+-----------+-----------
|
||||
# BTST8JD-SAME: 0 0 0 0 0 0 0 1 . 0 0 0 1 0 0 0 1
|
||||
# BTST8JD-SAME: 0 0 0 0 0 0 1 1 . 0 0 0 1 0 0 0 0
|
||||
name: MxBTST_MR_ARI
|
||||
body: |
|
||||
bb.0:
|
||||
BTST8jd $a1, $bd0, implicit-def $ccr
|
||||
BTST8jd $a0, $bd1, implicit-def $ccr
|
||||
|
||||
...
|
||||
|
|
@ -1,140 +0,0 @@
|
|||
# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
|
||||
# RUN: | extract-section .text \
|
||||
# RUN: | FileCheck %s -check-prefixes=SETD8CC,SETD8LS,SETD8LT,SETD8EQ,SETD8MI,SETD8F
|
||||
# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
|
||||
# RUN: | extract-section .text \
|
||||
# RUN: | FileCheck %s -check-prefixes=SETD8NE,SETD8GE,SETD8CS,SETD8PL,SETD8GT,SETD8T
|
||||
# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
|
||||
# RUN: | extract-section .text \
|
||||
# RUN: | FileCheck %s -check-prefixes=SETD8HI,SETD8VC,SETD8LE,SETD8VS,SETP8CC,SETP8LS
|
||||
# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
|
||||
# RUN: | extract-section .text \
|
||||
# RUN: | FileCheck %s -check-prefixes=SETP8LT,SETP8EQ,SETP8MI,SETP8F,SETP8NE,SETP8GE
|
||||
# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
|
||||
# RUN: | extract-section .text \
|
||||
# RUN: | FileCheck %s -check-prefixes=SETP8CS,SETP8PL,SETP8GT,SETP8T,SETP8HI,SETP8VC
|
||||
# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
|
||||
# RUN: | extract-section .text \
|
||||
# RUN: | FileCheck %s -check-prefixes=SETP8LE,SETP8VS
|
||||
|
||||
#------------------------------------------------------------------------------
|
||||
# MxScc sets byte filled with 1s or 0s based on cc condition
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
--- # MxScc_D
|
||||
# ---------------+---------------+-------+-----------+-----------
|
||||
# F E D C | B A 9 8 | 7 6 | 5 4 3 | 2 1 0
|
||||
# ---------------+---------------+-------+-----------+-----------
|
||||
# 0 1 0 1 | CONDITION | 1 1 | MODE | REG
|
||||
# ---------------+---------------+-------+-----------+-----------
|
||||
# SETD8T: 0 1 0 1 0 0 0 0 . 1 1 0 0 0 0 0 0
|
||||
# SETD8F: 0 1 0 1 0 0 0 1 . 1 1 0 0 0 0 0 1
|
||||
# SETD8HI: 0 1 0 1 0 0 1 0 . 1 1 0 0 0 0 1 0
|
||||
# SETD8LS-SAME: 0 1 0 1 0 0 1 1 . 1 1 0 0 0 0 1 1
|
||||
# SETD8CC: 0 1 0 1 0 1 0 0 . 1 1 0 0 0 1 0 0
|
||||
# SETD8CS-SAME: 0 1 0 1 0 1 0 1 . 1 1 0 0 0 1 0 1
|
||||
# SETD8NE-SAME: 0 1 0 1 0 1 1 0 . 1 1 0 0 0 1 1 0
|
||||
# SETD8EQ-SAME: 0 1 0 1 0 1 1 1 . 1 1 0 0 0 1 1 1
|
||||
# SETD8VC-SAME: 0 1 0 1 1 0 0 0 . 1 1 0 0 0 0 0 0
|
||||
# SETD8VS-SAME: 0 1 0 1 1 0 0 1 . 1 1 0 0 0 0 0 0
|
||||
# SETD8PL-SAME: 0 1 0 1 1 0 1 0 . 1 1 0 0 0 0 0 0
|
||||
# SETD8MI-SAME: 0 1 0 1 1 0 1 1 . 1 1 0 0 0 0 0 0
|
||||
# SETD8GE-SAME: 0 1 0 1 1 1 0 0 . 1 1 0 0 0 0 0 0
|
||||
# SETD8LT-SAME: 0 1 0 1 1 1 0 1 . 1 1 0 0 0 0 0 0
|
||||
# SETD8GT-SAME: 0 1 0 1 1 1 1 0 . 1 1 0 0 0 0 0 0
|
||||
# SETD8LE-SAME: 0 1 0 1 1 1 1 1 . 1 1 0 0 0 0 0 0
|
||||
name: MxScc_D
|
||||
body: |
|
||||
bb.0:
|
||||
$bd0 = SETd8t implicit $ccr
|
||||
$bd1 = SETd8f implicit $ccr
|
||||
$bd2 = SETd8hi implicit $ccr
|
||||
$bd3 = SETd8ls implicit $ccr
|
||||
$bd4 = SETd8cc implicit $ccr
|
||||
$bd5 = SETd8cs implicit $ccr
|
||||
$bd6 = SETd8ne implicit $ccr
|
||||
$bd7 = SETd8eq implicit $ccr
|
||||
$bd0 = SETd8vc implicit $ccr
|
||||
$bd0 = SETd8vs implicit $ccr
|
||||
$bd0 = SETd8pl implicit $ccr
|
||||
$bd0 = SETd8mi implicit $ccr
|
||||
$bd0 = SETd8ge implicit $ccr
|
||||
$bd0 = SETd8lt implicit $ccr
|
||||
$bd0 = SETd8gt implicit $ccr
|
||||
$bd0 = SETd8le implicit $ccr
|
||||
|
||||
...
|
||||
--- # MxScc_ARID
|
||||
# ---------------+---------------+-------+-----------+-----------
|
||||
# F E D C | B A 9 8 | 7 6 | 5 4 3 | 2 1 0
|
||||
# ---------------+---------------+-------+-----------+-----------
|
||||
# 0 1 0 1 | CONDITION | 1 1 | MODE | REG
|
||||
# ---------------+---------------+-------+-----------+-----------
|
||||
# SETP8T: 0 1 0 1 0 0 0 0 . 1 1 1 0 1 0 0 0
|
||||
# SETP8T-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
|
||||
# ---------------------------------------------------------------
|
||||
# SETP8F: 0 1 0 1 0 0 0 1 . 1 1 1 0 1 0 0 1
|
||||
# SETP8F-SAME: 0 0 0 0 0 0 0 0 . 0 0 1 0 1 0 1 0
|
||||
# ---------------------------------------------------------------
|
||||
# SETP8HI-SAME: 0 1 0 1 0 0 1 0 . 1 1 1 0 1 0 1 0
|
||||
# SETP8HI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# SETP8LS-SAME: 0 1 0 1 0 0 1 1 . 1 1 1 0 1 0 1 1
|
||||
# SETP8LS-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# SETP8CC-SAME: 0 1 0 1 0 1 0 0 . 1 1 1 0 1 1 0 0
|
||||
# SETP8CC-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# SETP8CS: 0 1 0 1 0 1 0 1 . 1 1 1 0 1 1 0 1
|
||||
# SETP8CS-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# SETP8NE-SAME: 0 1 0 1 0 1 1 0 . 1 1 1 0 1 1 1 0
|
||||
# SETP8NE-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# SETP8EQ-SAME: 0 1 0 1 0 1 1 1 . 1 1 1 0 1 0 0 0
|
||||
# SETP8EQ-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# SETP8VC-SAME: 0 1 0 1 1 0 0 0 . 1 1 1 0 1 0 0 0
|
||||
# SETP8VC-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# SETP8VS: 0 1 0 1 1 0 0 1 . 1 1 1 0 1 0 0 0
|
||||
# SETP8VS-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# SETP8PL-SAME: 0 1 0 1 1 0 1 0 . 1 1 1 0 1 0 0 0
|
||||
# SETP8PL-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# SETP8MI-SAME: 0 1 0 1 1 0 1 1 . 1 1 1 0 1 0 0 0
|
||||
# SETP8MI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# SETP8GE-SAME: 0 1 0 1 1 1 0 0 . 1 1 1 0 1 0 0 0
|
||||
# SETP8GE-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# SETP8LT: 0 1 0 1 1 1 0 1 . 1 1 1 0 1 0 0 0
|
||||
# SETP8LT-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# SETP8GT-SAME: 0 1 0 1 1 1 1 0 . 1 1 1 0 1 0 0 0
|
||||
# SETP8GT-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# SETP8LE: 0 1 0 1 1 1 1 1 . 1 1 1 0 1 0 0 0
|
||||
# SETP8LE-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
name: MxScc_ARID
|
||||
body: |
|
||||
bb.0:
|
||||
SETp8t -1, $a0, implicit $ccr
|
||||
SETp8f 42, $a1, implicit $ccr
|
||||
SETp8hi 0, $a2, implicit $ccr
|
||||
SETp8ls 0, $a3, implicit $ccr
|
||||
SETp8cc 0, $a4, implicit $ccr
|
||||
SETp8cs 0, $a5, implicit $ccr
|
||||
SETp8ne 0, $a6, implicit $ccr
|
||||
SETp8eq 0, $a0, implicit $ccr
|
||||
SETp8vc 0, $a0, implicit $ccr
|
||||
SETp8vs 0, $a0, implicit $ccr
|
||||
SETp8pl 0, $a0, implicit $ccr
|
||||
SETp8mi 0, $a0, implicit $ccr
|
||||
SETp8ge 0, $a0, implicit $ccr
|
||||
SETp8lt 0, $a0, implicit $ccr
|
||||
SETp8gt 0, $a0, implicit $ccr
|
||||
SETp8le 0, $a0, implicit $ccr
|
||||
|
||||
...
|
||||
|
|
@ -1,65 +0,0 @@
|
|||
# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
|
||||
# RUN: | extract-section .text \
|
||||
# RUN: | FileCheck %s -check-prefixes=LEA32Q,LEA32F,LEA32P
|
||||
|
||||
#------------------------------------------------------------------------------
|
||||
# MxLEA is used to calculate effective address and load it into a address reg
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
--- # PCD
|
||||
# ---------------------------------------------------------------
|
||||
# F E D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
|
||||
# ---------------------------------------------------------------
|
||||
# 0 1 0 0 | DST REG | 1 1 1 | MODE | REG
|
||||
# ---------------------------------------------------------------
|
||||
# LEA32Q: 0 1 0 0 0 0 0 1 . 1 1 1 1 1 0 1 0
|
||||
# LEA32Q-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# LEA32Q-SAME: 0 1 0 0 0 0 0 1 . 1 1 1 1 1 0 1 0
|
||||
# LEA32Q-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
|
||||
name: MxLEA_PCD
|
||||
body: |
|
||||
bb.0:
|
||||
$a0 = LEA32q 0, implicit-def $ccr
|
||||
$a0 = LEA32q -1, implicit-def $ccr
|
||||
|
||||
...
|
||||
--- # ARII
|
||||
# ---------------------------------------------------------------
|
||||
# F E D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
|
||||
# ---------------------------------------------------------------
|
||||
# 0 1 0 0 | DST REG | 1 1 1 | MODE | REG
|
||||
# ---------------------------------------------------------------
|
||||
# LEA32F-SAME: 0 1 0 0 0 0 0 1 . 1 1 1 1 0 0 0 1
|
||||
# LEA32F-SAME: 0 0 0 1 1 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# LEA32F-SAME: 0 1 0 0 0 0 1 1 . 1 1 1 1 0 0 1 0
|
||||
# LEA32F-SAME: 1 0 1 0 1 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---+-----------+---+-------+---+-------------------------------
|
||||
# BRIEF DA | REG | L | SCALE | 0 | DISPLACEMENT
|
||||
# ---+-----------+---+-------+---+-------------------------------
|
||||
name: MxLEA_ARII
|
||||
body: |
|
||||
bb.0:
|
||||
$a0 = LEA32f 0, $a1, $d1, implicit-def $ccr
|
||||
$a1 = LEA32f 0, $a2, $a2, implicit-def $ccr
|
||||
|
||||
...
|
||||
--- # ARID
|
||||
# ---------------------------------------------------------------
|
||||
# F E D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
|
||||
# ---------------------------------------------------------------
|
||||
# 0 1 0 0 | DST REG | 1 1 1 | MODE | REG
|
||||
# ---------------------------------------------------------------
|
||||
# LEA32P-SAME: 0 1 0 0 0 0 0 1 . 1 1 1 0 1 0 0 1
|
||||
# LEA32P-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
|
||||
# ---------------------------------------------------------------
|
||||
# LEA32P-SAME: 0 1 0 0 0 0 0 1 . 1 1 1 0 1 0 0 1
|
||||
# LEA32P-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
|
||||
name: MxLEA_ARID
|
||||
body: |
|
||||
bb.0:
|
||||
$a0 = LEA32p -1, $a1, implicit-def $ccr
|
||||
$a0 = LEA32p -1, $a1, implicit-def $ccr
|
||||
|
||||
...
|
||||
|
|
@ -1,97 +0,0 @@
|
|||
# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj -o - \
|
||||
# RUN: | extract-section .text \
|
||||
# RUN: | FileCheck %s -check-prefixes=MOV8FI,MOV32FI,MOV8PI,MOV32PI,MOV8JI,MOV32JI
|
||||
|
||||
#------------------------------------------------------------------------------
|
||||
# MxMove_MI is used for moving immediate to memory
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
--- # ARII
|
||||
# ---------------------------+-----------+-----------+-----------
|
||||
# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
|
||||
# -------+-------+-----------+-----------+-----------+-----------
|
||||
# | | DESTINATION | SOURCE
|
||||
# 0 0 | SIZE | REG | MODE | MODE | REG
|
||||
# -------+-------+-----------+-----------+-----------+-----------
|
||||
# MOV8FI: 0 0 0 1 0 0 0 1 . 1 0 1 1 1 1 0 0
|
||||
# MOV8FI-SAME: 0 0 0 0 0 0 0 0 . 1 1 1 1 1 1 1 1
|
||||
# MOV8FI-SAME: 0 0 0 1 1 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# MOV8FI-SAME: 0 0 0 1 0 0 0 1 . 1 0 1 1 1 1 0 0
|
||||
# MOV8FI-SAME: 0 0 0 0 0 0 0 0 . 0 0 1 0 1 0 1 0
|
||||
# MOV8FI-SAME: 0 0 0 1 1 0 0 0 . 1 1 1 1 1 1 1 1
|
||||
# ---------------------------------------------------------------
|
||||
# MOV32FI-SAME: 0 0 1 0 0 0 1 1 . 1 0 1 1 1 1 0 0
|
||||
# MOV32FI-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
|
||||
# MOV32FI-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
|
||||
# MOV32FI-SAME: 0 0 0 1 1 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# MOV32FI-SAME: 0 0 1 0 0 1 0 1 . 1 0 1 1 1 1 0 0
|
||||
# MOV32FI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# MOV32FI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# MOV32FI-SAME: 1 0 1 0 1 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---+-----------+---+-------+---+-------------------------------
|
||||
# BRIEF DA | REG | L | SCALE | 0 | DISPLACEMENT
|
||||
# ---+-----------+---+-------+---+-------------------------------
|
||||
name: MxMove_MI_ARII
|
||||
body: |
|
||||
bb.0:
|
||||
MOV8fi 0, $a0, $d1, -1, implicit-def $ccr
|
||||
MOV8fi -1, $a0, $d1, 42, implicit-def $ccr
|
||||
MOV32fi 0, $a1, $d1, -1, implicit-def $ccr
|
||||
MOV32fi 0, $a2, $a2, 0, implicit-def $ccr
|
||||
|
||||
...
|
||||
--- # ARID
|
||||
# ---------------------------+-----------+-----------+-----------
|
||||
# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
|
||||
# -------+-------+-----------+-----------+-----------+-----------
|
||||
# | | DESTINATION | SOURCE
|
||||
# 0 0 | SIZE | REG | MODE | MODE | REG
|
||||
# -------+-------+-----------+-----------+-----------+-----------
|
||||
# MOV8PI-SAME: 0 0 0 1 0 0 0 1 . 0 1 1 1 1 1 0 0
|
||||
# MOV8PI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# MOV8PI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# MOV32PI-SAME: 0 0 1 0 0 0 1 1 . 0 1 1 1 1 1 0 0
|
||||
# MOV32PI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# MOV32PI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# MOV32PI-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
|
||||
# ---------------------------------------------------------------
|
||||
# MOV32PI-SAME: 0 0 1 0 0 0 1 1 . 0 1 1 1 1 1 0 0
|
||||
# MOV32PI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# MOV32PI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# MOV32PI-SAME: 1 1 1 1 1 1 1 1 . 1 1 1 1 1 1 1 1
|
||||
name: MxMove_MI_ARID
|
||||
body: |
|
||||
bb.0:
|
||||
MOV8pi 0, $a0, 0, implicit-def $ccr
|
||||
MOV32pi -1, $a1, 0, implicit-def $ccr
|
||||
MOV32pi -1, $a1, 0, implicit-def $ccr
|
||||
|
||||
...
|
||||
--- # ARI
|
||||
# ---------------------------+-----------+-----------+-----------
|
||||
# F E | D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
|
||||
# -------+-------+-----------+-----------+-----------+-----------
|
||||
# | | DESTINATION | SOURCE
|
||||
# 0 0 | SIZE | REG | MODE | MODE | REG
|
||||
# -------+-------+-----------+-----------+-----------+-----------
|
||||
# MOV8JI-SAME: 0 0 0 1 0 0 0 0 . 1 0 1 1 1 1 0 0
|
||||
# MOV8JI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# MOV32JI-SAME: 0 0 1 0 0 0 1 0 . 1 0 1 1 1 1 0 0
|
||||
# MOV32JI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# MOV32JI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# ---------------------------------------------------------------
|
||||
# MOV32JI-SAME: 0 0 1 0 0 0 1 0 . 1 0 1 1 1 1 0 0
|
||||
# MOV32JI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
# MOV32JI-SAME: 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0
|
||||
name: MxMove_MI_ARI
|
||||
body: |
|
||||
bb.0:
|
||||
MOV8ji $a0, 0, implicit-def $ccr
|
||||
MOV32ji $a1, 0, implicit-def $ccr
|
||||
MOV32ji $a1, 0, implicit-def $ccr
|
||||
|
||||
...
|
||||
|
|
@ -0,0 +1,41 @@
|
|||
; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
|
||||
.text
|
||||
.globl MxBiArOp_FMI_ARII
|
||||
; CHECK-LABEL: MxBiArOp_FMI_ARII:
|
||||
MxBiArOp_FMI_ARII:
|
||||
; CHECK: add.b #-1, (0,%a0,%d0)
|
||||
; CHECK-SAME: encoding: [0x06,0x30,0x00,0xff,0x08,0x00]
|
||||
add.b #-1, (0,%a0,%d0)
|
||||
; CHECK: add.b #0, (-1,%a3,%a1)
|
||||
; CHECK-SAME: encoding: [0x06,0x33,0x00,0x00,0x98,0xff]
|
||||
add.b #0, (-1,%a3,%a1)
|
||||
; CHECK: add.l #-1, (13,%a2,%d1)
|
||||
; CHECK-SAME: encoding: [0x06,0xb2,0xff,0xff,0xff,0xff,0x18,0x0d]
|
||||
add.l #-1, (13,%a2,%d1)
|
||||
|
||||
.globl MxBiArOp_FMI_ARID
|
||||
; CHECK-LABEL: MxBiArOp_FMI_ARID:
|
||||
MxBiArOp_FMI_ARID:
|
||||
; CHECK: add.b #-1, (0,%a0)
|
||||
; CHECK-SAME: encoding: [0x06,0x28,0x00,0xff,0x00,0x00]
|
||||
add.b #-1, (0,%a0)
|
||||
; CHECK: add.b #0, (-1,%a3)
|
||||
; CHECK-SAME: encoding: [0x06,0x2b,0x00,0x00,0xff,0xff]
|
||||
add.b #0, (-1,%a3)
|
||||
; CHECK: add.l #-1, (13,%a2)
|
||||
; CHECK-SAME: encoding: [0x06,0xaa,0xff,0xff,0xff,0xff,0x00,0x0d]
|
||||
add.l #-1, (13,%a2)
|
||||
|
||||
.globl MxBiArOp_FMI_ARI
|
||||
; CHECK-LABEL: MxBiArOp_FMI_ARI:
|
||||
MxBiArOp_FMI_ARI:
|
||||
; CHECK: add.b #-1, (%a0)
|
||||
; CHECK-SAME: encoding: [0x06,0x10,0x00,0xff]
|
||||
add.b #-1, (%a0)
|
||||
; CHECK: add.b #0, (%a3)
|
||||
; CHECK-SAME: encoding: [0x06,0x13,0x00,0x00]
|
||||
add.b #0, (%a3)
|
||||
; CHECK: add.l #-1, (%a2)
|
||||
; CHECK-SAME: encoding: [0x06,0x92,0xff,0xff,0xff,0xff]
|
||||
add.l #-1, (%a2)
|
||||
|
||||
|
|
@ -0,0 +1,38 @@
|
|||
; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
|
||||
.text
|
||||
.globl MxBiArOp_FMR_ARII
|
||||
; CHECK-LABEL: MxBiArOp_FMR_ARII:
|
||||
MxBiArOp_FMR_ARII:
|
||||
; CHECK: add.b %d0, (0,%a0,%d1)
|
||||
; CHECK-SAME: encoding: [0xd1,0x30,0x18,0x00]
|
||||
add.b %d0, (0,%a0,%d1)
|
||||
; CHECK: add.b %d0, (-1,%a0,%d1)
|
||||
; CHECK-SAME: encoding: [0xd1,0x30,0x18,0xff]
|
||||
add.b %d0, (-1,%a0,%d1)
|
||||
; CHECK: add.l %d0, (0,%a1,%d1)
|
||||
; CHECK-SAME: encoding: [0xd1,0xb1,0x18,0x00]
|
||||
add.l %d0, (0,%a1,%d1)
|
||||
; CHECK: add.l %d1, (0,%a2,%a2)
|
||||
; CHECK-SAME: encoding: [0xd3,0xb2,0xa8,0x00]
|
||||
add.l %d1, (0,%a2,%a2)
|
||||
|
||||
.globl MxBiArOp_FMR_ARID
|
||||
; CHECK-LABEL: MxBiArOp_FMR_ARID:
|
||||
MxBiArOp_FMR_ARID:
|
||||
; CHECK: add.b %d0, (0,%a0)
|
||||
; CHECK-SAME: encoding: [0xd1,0x28,0x00,0x00]
|
||||
add.b %d0, (0,%a0)
|
||||
; CHECK: add.l %d0, (-1,%a1)
|
||||
; CHECK-SAME: encoding: [0xd1,0xa9,0xff,0xff]
|
||||
add.l %d0, (-1,%a1)
|
||||
|
||||
.globl MxBiArOp_FMR_ARI
|
||||
; CHECK-LABEL: MxBiArOp_FMR_ARI:
|
||||
MxBiArOp_FMR_ARI:
|
||||
; CHECK: add.b %d0, (%a0)
|
||||
; CHECK-SAME: encoding: [0xd1,0x10]
|
||||
add.b %d0, (%a0)
|
||||
; CHECK: add.l %d3, (%a1)
|
||||
; CHECK-SAME: encoding: [0xd7,0x91]
|
||||
add.l %d3, (%a1)
|
||||
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
|
||||
.text
|
||||
.globl MxBTST_MI_PCI
|
||||
; CHECK-LABEL: MxBTST_MI_PCI:
|
||||
MxBTST_MI_PCI:
|
||||
; CHECK: btst #0, (-1,%pc,%d1)
|
||||
; CHECK-SAME: encoding: [0x08,0x3b,0x00,0x00,0x18,0xff]
|
||||
btst #0, (-1,%pc,%d1)
|
||||
; CHECK: btst #1, (0,%pc,%d0)
|
||||
; CHECK-SAME: encoding: [0x08,0x3b,0x00,0x01,0x08,0x00]
|
||||
btst #1, (0,%pc,%d0)
|
||||
|
||||
.globl MxBTST_MI_PCD
|
||||
; CHECK-LABEL: MxBTST_MI_PCD:
|
||||
MxBTST_MI_PCD:
|
||||
; CHECK: btst #0, (0,%pc)
|
||||
; CHECK-SAME: encoding: [0x08,0x3a,0x00,0x00,0x00,0x00]
|
||||
btst #0, (0,%pc)
|
||||
; CHECK: btst #-1, (-1,%pc)
|
||||
; CHECK-SAME: encoding: [0x08,0x3a,0x00,0xff,0xff,0xff]
|
||||
btst #-1, (-1,%pc)
|
||||
|
||||
.globl MxBTST_MI_ARII
|
||||
; CHECK-LABEL: MxBTST_MI_ARII:
|
||||
MxBTST_MI_ARII:
|
||||
; CHECK: btst #0, (-1,%a1,%a0)
|
||||
; CHECK-SAME: encoding: [0x08,0x31,0x00,0x00,0x88,0xff]
|
||||
btst #0, (-1,%a1,%a0)
|
||||
; CHECK: btst #-1, (0,%a0,%a0)
|
||||
; CHECK-SAME: encoding: [0x08,0x30,0x00,0xff,0x88,0x00]
|
||||
btst #-1, (0,%a0,%a0)
|
||||
|
||||
.globl MxBTST_MI_ARID
|
||||
; CHECK-LABEL: MxBTST_MI_ARID:
|
||||
MxBTST_MI_ARID:
|
||||
; CHECK: btst #0, (-1,%a1)
|
||||
; CHECK-SAME: encoding: [0x08,0x29,0x00,0x00,0xff,0xff]
|
||||
btst #0, (-1,%a1)
|
||||
; CHECK: btst #-1, (0,%a0)
|
||||
; CHECK-SAME: encoding: [0x08,0x28,0x00,0xff,0x00,0x00]
|
||||
btst #-1, (0,%a0)
|
||||
|
||||
.globl MxBTST_MI_ARI
|
||||
; CHECK-LABEL: MxBTST_MI_ARI:
|
||||
MxBTST_MI_ARI:
|
||||
; CHECK: btst #0, (%a1)
|
||||
; CHECK-SAME: encoding: [0x08,0x11,0x00,0x00]
|
||||
btst #0, (%a1)
|
||||
; CHECK: btst #-1, (%a0)
|
||||
; CHECK-SAME: encoding: [0x08,0x10,0x00,0xff]
|
||||
btst #-1, (%a0)
|
||||
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
|
||||
.text
|
||||
.globl MxBTST_MR_PCI
|
||||
; CHECK-LABEL: MxBTST_MR_PCI:
|
||||
MxBTST_MR_PCI:
|
||||
; CHECK: btst %d0, (-1,%pc,%d1)
|
||||
; CHECK-SAME: encoding: [0x01,0x3b,0x18,0xff]
|
||||
btst %d0, (-1,%pc,%d1)
|
||||
; CHECK: btst %d1, (0,%pc,%d0)
|
||||
; CHECK-SAME: encoding: [0x03,0x3b,0x08,0x00]
|
||||
btst %d1, (0,%pc,%d0)
|
||||
|
||||
.globl MxBTST_MR_PCD
|
||||
; CHECK-LABEL: MxBTST_MR_PCD:
|
||||
MxBTST_MR_PCD:
|
||||
; CHECK: btst %d0, (0,%pc)
|
||||
; CHECK-SAME: encoding: [0x01,0x3a,0x00,0x00]
|
||||
btst %d0, (0,%pc)
|
||||
; CHECK: btst %d1, (-1,%pc)
|
||||
; CHECK-SAME: encoding: [0x03,0x3a,0xff,0xff]
|
||||
btst %d1, (-1,%pc)
|
||||
|
||||
.globl MxBTST_MR_ARII
|
||||
; CHECK-LABEL: MxBTST_MR_ARII:
|
||||
MxBTST_MR_ARII:
|
||||
; CHECK: btst %d0, (-1,%a1,%a0)
|
||||
; CHECK-SAME: encoding: [0x01,0x31,0x88,0xff]
|
||||
btst %d0, (-1,%a1,%a0)
|
||||
; CHECK: btst %d1, (0,%a0,%a0)
|
||||
; CHECK-SAME: encoding: [0x03,0x30,0x88,0x00]
|
||||
btst %d1, (0,%a0,%a0)
|
||||
|
||||
.globl MxBTST_MR_ARID
|
||||
; CHECK-LABEL: MxBTST_MR_ARID:
|
||||
MxBTST_MR_ARID:
|
||||
; CHECK: btst %d0, (-1,%a1)
|
||||
; CHECK-SAME: encoding: [0x01,0x29,0xff,0xff]
|
||||
btst %d0, (-1,%a1)
|
||||
; CHECK: btst %d1, (0,%a0)
|
||||
; CHECK-SAME: encoding: [0x03,0x28,0x00,0x00]
|
||||
btst %d1, (0,%a0)
|
||||
|
||||
.globl MxBTST_MR_ARI
|
||||
; CHECK-LABEL: MxBTST_MR_ARI:
|
||||
MxBTST_MR_ARI:
|
||||
; CHECK: btst %d0, (%a1)
|
||||
; CHECK-SAME: encoding: [0x01,0x11]
|
||||
btst %d0, (%a1)
|
||||
; CHECK: btst %d1, (%a0)
|
||||
; CHECK-SAME: encoding: [0x03,0x10]
|
||||
btst %d1, (%a0)
|
||||
|
||||
|
|
@ -0,0 +1,106 @@
|
|||
; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
|
||||
.text
|
||||
.globl MxScc_D
|
||||
; CHECK-LABEL: MxScc_D:
|
||||
MxScc_D:
|
||||
; CHECK: st %d0
|
||||
; CHECK-SAME: encoding: [0x50,0xc0]
|
||||
st %d0
|
||||
; CHECK: sf %d1
|
||||
; CHECK-SAME: encoding: [0x51,0xc1]
|
||||
sf %d1
|
||||
; CHECK: shi %d2
|
||||
; CHECK-SAME: encoding: [0x52,0xc2]
|
||||
shi %d2
|
||||
; CHECK: sls %d3
|
||||
; CHECK-SAME: encoding: [0x53,0xc3]
|
||||
sls %d3
|
||||
; CHECK: scc %d4
|
||||
; CHECK-SAME: encoding: [0x54,0xc4]
|
||||
scc %d4
|
||||
; CHECK: scs %d5
|
||||
; CHECK-SAME: encoding: [0x55,0xc5]
|
||||
scs %d5
|
||||
; CHECK: sne %d6
|
||||
; CHECK-SAME: encoding: [0x56,0xc6]
|
||||
sne %d6
|
||||
; CHECK: seq %d7
|
||||
; CHECK-SAME: encoding: [0x57,0xc7]
|
||||
seq %d7
|
||||
; CHECK: svc %d0
|
||||
; CHECK-SAME: encoding: [0x58,0xc0]
|
||||
svc %d0
|
||||
; CHECK: svs %d0
|
||||
; CHECK-SAME: encoding: [0x59,0xc0]
|
||||
svs %d0
|
||||
; CHECK: spl %d0
|
||||
; CHECK-SAME: encoding: [0x5a,0xc0]
|
||||
spl %d0
|
||||
; CHECK: smi %d0
|
||||
; CHECK-SAME: encoding: [0x5b,0xc0]
|
||||
smi %d0
|
||||
; CHECK: sge %d0
|
||||
; CHECK-SAME: encoding: [0x5c,0xc0]
|
||||
sge %d0
|
||||
; CHECK: slt %d0
|
||||
; CHECK-SAME: encoding: [0x5d,0xc0]
|
||||
slt %d0
|
||||
; CHECK: sgt %d0
|
||||
; CHECK-SAME: encoding: [0x5e,0xc0]
|
||||
sgt %d0
|
||||
; CHECK: sle %d0
|
||||
; CHECK-SAME: encoding: [0x5f,0xc0]
|
||||
sle %d0
|
||||
|
||||
.globl MxScc_ARID
|
||||
; CHECK-LABEL: MxScc_ARID:
|
||||
MxScc_ARID:
|
||||
; CHECK: st (-1,%a0)
|
||||
; CHECK-SAME: encoding: [0x50,0xe8,0xff,0xff]
|
||||
st (-1,%a0)
|
||||
; CHECK: sf (42,%a1)
|
||||
; CHECK-SAME: encoding: [0x51,0xe9,0x00,0x2a]
|
||||
sf (42,%a1)
|
||||
; CHECK: shi (0,%a2)
|
||||
; CHECK-SAME: encoding: [0x52,0xea,0x00,0x00]
|
||||
shi (0,%a2)
|
||||
; CHECK: sls (0,%a3)
|
||||
; CHECK-SAME: encoding: [0x53,0xeb,0x00,0x00]
|
||||
sls (0,%a3)
|
||||
; CHECK: scc (0,%a4)
|
||||
; CHECK-SAME: encoding: [0x54,0xec,0x00,0x00]
|
||||
scc (0,%a4)
|
||||
; CHECK: scs (0,%a5)
|
||||
; CHECK-SAME: encoding: [0x55,0xed,0x00,0x00]
|
||||
scs (0,%a5)
|
||||
; CHECK: sne (0,%a6)
|
||||
; CHECK-SAME: encoding: [0x56,0xee,0x00,0x00]
|
||||
sne (0,%a6)
|
||||
; CHECK: seq (0,%a0)
|
||||
; CHECK-SAME: encoding: [0x57,0xe8,0x00,0x00]
|
||||
seq (0,%a0)
|
||||
; CHECK: svc (0,%a0)
|
||||
; CHECK-SAME: encoding: [0x58,0xe8,0x00,0x00]
|
||||
svc (0,%a0)
|
||||
; CHECK: svs (0,%a0)
|
||||
; CHECK-SAME: encoding: [0x59,0xe8,0x00,0x00]
|
||||
svs (0,%a0)
|
||||
; CHECK: spl (0,%a0)
|
||||
; CHECK-SAME: encoding: [0x5a,0xe8,0x00,0x00]
|
||||
spl (0,%a0)
|
||||
; CHECK: smi (0,%a0)
|
||||
; CHECK-SAME: encoding: [0x5b,0xe8,0x00,0x00]
|
||||
smi (0,%a0)
|
||||
; CHECK: sge (0,%a0)
|
||||
; CHECK-SAME: encoding: [0x5c,0xe8,0x00,0x00]
|
||||
sge (0,%a0)
|
||||
; CHECK: slt (0,%a0)
|
||||
; CHECK-SAME: encoding: [0x5d,0xe8,0x00,0x00]
|
||||
slt (0,%a0)
|
||||
; CHECK: sgt (0,%a0)
|
||||
; CHECK-SAME: encoding: [0x5e,0xe8,0x00,0x00]
|
||||
sgt (0,%a0)
|
||||
; CHECK: sle (0,%a0)
|
||||
; CHECK-SAME: encoding: [0x5f,0xe8,0x00,0x00]
|
||||
sle (0,%a0)
|
||||
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
|
||||
.text
|
||||
.globl MxLEA_PCD
|
||||
; CHECK-LABEL: MxLEA_PCD:
|
||||
MxLEA_PCD:
|
||||
; CHECK: lea (0,%pc), %a0
|
||||
; CHECK-SAME: encoding: [0x41,0xfa,0x00,0x00]
|
||||
lea (0,%pc), %a0
|
||||
; CHECK: lea (-1,%pc), %a0
|
||||
; CHECK-SAME: encoding: [0x41,0xfa,0xff,0xff]
|
||||
lea (-1,%pc), %a0
|
||||
|
||||
.globl MxLEA_ARII
|
||||
; CHECK-LABEL: MxLEA_ARII:
|
||||
MxLEA_ARII:
|
||||
; CHECK: lea (0,%a1,%d1), %a0
|
||||
; CHECK-SAME: encoding: [0x41,0xf1,0x18,0x00]
|
||||
lea (0,%a1,%d1), %a0
|
||||
; CHECK: lea (0,%a2,%a2), %a1
|
||||
; CHECK-SAME: encoding: [0x43,0xf2,0xa8,0x00]
|
||||
lea (0,%a2,%a2), %a1
|
||||
|
||||
.globl MxLEA_ARID
|
||||
; CHECK-LABEL: MxLEA_ARID:
|
||||
MxLEA_ARID:
|
||||
; CHECK: lea (-1,%a1), %a0
|
||||
; CHECK-SAME: encoding: [0x41,0xe9,0xff,0xff]
|
||||
lea (-1,%a1), %a0
|
||||
; CHECK: lea (-1,%a1), %a0
|
||||
; CHECK-SAME: encoding: [0x41,0xe9,0xff,0xff]
|
||||
lea (-1,%a1), %a0
|
||||
|
||||
|
|
@ -0,0 +1,44 @@
|
|||
; RUN: llvm-mc -triple=m68k -show-encoding %s | FileCheck %s
|
||||
.text
|
||||
.globl MxMove_MI_ARII
|
||||
; CHECK-LABEL: MxMove_MI_ARII:
|
||||
MxMove_MI_ARII:
|
||||
; CHECK: move.b #-1, (0,%a0,%d1)
|
||||
; CHECK-SAME: encoding: [0x11,0xbc,0x00,0xff,0x18,0x00]
|
||||
move.b #-1, (0,%a0,%d1)
|
||||
; CHECK: move.b #42, (-1,%a0,%d1)
|
||||
; CHECK-SAME: encoding: [0x11,0xbc,0x00,0x2a,0x18,0xff]
|
||||
move.b #42, (-1,%a0,%d1)
|
||||
; CHECK: move.l #-1, (0,%a1,%d1)
|
||||
; CHECK-SAME: encoding: [0x23,0xbc,0xff,0xff,0xff,0xff,0x18,0x00]
|
||||
move.l #-1, (0,%a1,%d1)
|
||||
; CHECK: move.l #0, (0,%a2,%a2)
|
||||
; CHECK-SAME: encoding: [0x25,0xbc,0x00,0x00,0x00,0x00,0xa8,0x00]
|
||||
move.l #0, (0,%a2,%a2)
|
||||
|
||||
.globl MxMove_MI_ARID
|
||||
; CHECK-LABEL: MxMove_MI_ARID:
|
||||
MxMove_MI_ARID:
|
||||
; CHECK: move.b #0, (0,%a0)
|
||||
; CHECK-SAME: encoding: [0x11,0x7c,0x00,0x00,0x00,0x00]
|
||||
move.b #0, (0,%a0)
|
||||
; CHECK: move.l #0, (-1,%a1)
|
||||
; CHECK-SAME: encoding: [0x23,0x7c,0x00,0x00,0x00,0x00,0xff,0xff]
|
||||
move.l #0, (-1,%a1)
|
||||
; CHECK: move.l #0, (-1,%a1)
|
||||
; CHECK-SAME: encoding: [0x23,0x7c,0x00,0x00,0x00,0x00,0xff,0xff]
|
||||
move.l #0, (-1,%a1)
|
||||
|
||||
.globl MxMove_MI_ARI
|
||||
; CHECK-LABEL: MxMove_MI_ARI:
|
||||
MxMove_MI_ARI:
|
||||
; CHECK: move.b #0, (%a0)
|
||||
; CHECK-SAME: encoding: [0x10,0xbc,0x00,0x00]
|
||||
move.b #0, (%a0)
|
||||
; CHECK: move.l #0, (%a1)
|
||||
; CHECK-SAME: encoding: [0x22,0xbc,0x00,0x00,0x00,0x00]
|
||||
move.l #0, (%a1)
|
||||
; CHECK: move.l #0, (%a1)
|
||||
; CHECK-SAME: encoding: [0x22,0xbc,0x00,0x00,0x00,0x00]
|
||||
move.l #0, (%a1)
|
||||
|
||||
Loading…
Reference in New Issue