forked from OSchip/llvm-project
copy mmx values from/to memory with GPRs on x86-32
instead of with mmx registers. This horribleness is apparently done by gcc to avoid having to insert emms in places that really should have it. This is the second half of rdar://5741668. llvm-svn: 47474
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@ -5897,7 +5897,31 @@ static SDOperand PerformSTORECombine(StoreSDNode *St, SelectionDAG &DAG,
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St->isVolatile(), St->getAlignment());
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}
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// TODO: 2 32-bit copies.
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// Otherwise, lower to two 32-bit copies.
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SDOperand LoAddr = Ld->getBasePtr();
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SDOperand HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr,
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DAG.getConstant(MVT::i32, 4));
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SDOperand LoLd = DAG.getLoad(MVT::i32, Ld->getChain(), LoAddr,
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Ld->getSrcValue(), Ld->getSrcValueOffset(),
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Ld->isVolatile(), Ld->getAlignment());
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SDOperand HiLd = DAG.getLoad(MVT::i32, Ld->getChain(), HiAddr,
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Ld->getSrcValue(), Ld->getSrcValueOffset()+4,
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Ld->isVolatile(),
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MinAlign(Ld->getAlignment(), 4));
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LoAddr = St->getBasePtr();
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HiAddr = DAG.getNode(ISD::ADD, MVT::i32, LoAddr,
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DAG.getConstant(MVT::i32, 4));
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SDOperand LoSt = DAG.getStore(LoLd.getValue(1), LoLd, LoAddr,
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St->getSrcValue(), St->getSrcValueOffset(),
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St->isVolatile(), St->getAlignment());
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SDOperand HiSt = DAG.getStore(HiLd.getValue(1), HiLd, HiAddr,
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St->getSrcValue(), St->getSrcValueOffset()+4,
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St->isVolatile(),
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MinAlign(St->getAlignment(), 4));
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return DAG.getNode(ISD::TokenFactor, MVT::Other, LoSt, HiSt);
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}
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return SDOperand();
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}
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@ -1,4 +1,5 @@
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; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq.*(%rsi), %rax}
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; RUN: llvm-as < %s | llc -march=x86 | grep {movl.*4(%eax),}
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; This test should use GPRs to copy the mmx value, not MMX regs. Using mmx regs,
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; increases the places that need to use emms.
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@ -6,9 +7,9 @@
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; rdar://5741668
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target triple = "x86_64-apple-darwin8"
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define i32 @foo(<1 x i64>* %x, <1 x i64>* %y) nounwind {
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define void @foo(<1 x i64>* %x, <1 x i64>* %y) nounwind {
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entry:
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%tmp1 = load <1 x i64>* %y, align 8 ; <<1 x i64>> [#uses=1]
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store <1 x i64> %tmp1, <1 x i64>* %x, align 8
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ret i32 undef
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ret void
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}
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