Handle composed subreg indices when processing REQ_SEQUENCE instructions.

llvm-svn: 105066
This commit is contained in:
Jakob Stoklund Olesen 2010-05-29 00:14:14 +00:00
parent 032f3261a2
commit ab6223949e
1 changed files with 4 additions and 5 deletions

View File

@ -1136,14 +1136,13 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
static void UpdateRegSequenceSrcs(unsigned SrcReg,
unsigned DstReg, unsigned SubIdx,
MachineRegisterInfo *MRI) {
MachineRegisterInfo *MRI,
const TargetRegisterInfo &TRI) {
for (MachineRegisterInfo::reg_iterator RI = MRI->reg_begin(SrcReg),
RE = MRI->reg_end(); RI != RE; ) {
MachineOperand &MO = RI.getOperand();
++RI;
MO.setReg(DstReg);
assert(MO.getSubReg() == 0);
MO.setSubReg(SubIdx);
MO.substVirtReg(DstReg, SubIdx, TRI);
}
}
@ -1315,7 +1314,7 @@ bool TwoAddressInstructionPass::EliminateRegSequences() {
for (unsigned i = 1, e = MI->getNumOperands(); i < e; i += 2) {
unsigned SrcReg = MI->getOperand(i).getReg();
unsigned SubIdx = MI->getOperand(i+1).getImm();
UpdateRegSequenceSrcs(SrcReg, DstReg, SubIdx, MRI);
UpdateRegSequenceSrcs(SrcReg, DstReg, SubIdx, MRI, *TRI);
}
if (IsImpDef) {