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[MC] Suppress .Lcfi labels when emitting textual assembly 

Summary:
This suppresses the generation of .Lcfi labels in our textual assembler.
It was annoying that this generated cascading .Lcfi labels:
  llc foo.ll -o - | llvm-mc | llvm-mc

After three trips through MCAsmStreamer, we'd have three labels in the
output when none are necessary. We should only bother creating the
labels and frame data when making a real object file.

This supercedes D38605, which moved the entire .seh_ implementation into
MCObjectStreamer.

This has the advantage that we do more checking when emitting textual
assembly, as a minor efficiency cost. Outputting textual assembly is not
performance critical, so this shouldn't matter.

Reviewers: majnemer, MatzeB

Subscribers: qcolombet, nemanjai, javed.absar, eraman, hiraditya, JDevlieghere, llvm-commits

Differential Revision: https://reviews.llvm.org/D38638

llvm-svn: 315259
This commit is contained in:
Reid Kleckner 2017-10-10 00:57:36 +00:00
parent a11b983e11
commit ab23dace56
95 changed files with 23 additions and 2957 deletions
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1
llvm/include/llvm/MC/MCObjectStreamer.h
View File

@ -43,6 +43,7 @@ class MCObjectStreamer : public MCStreamer {
virtual void EmitInstToData(const MCInst &Inst, const MCSubtargetInfo&) = 0;
void EmitCFIStartProcImpl(MCDwarfFrameInfo &Frame) override;
void EmitCFIEndProcImpl(MCDwarfFrameInfo &Frame) override;
MCSymbol *EmitCFILabel() override;
protected:
MCObjectStreamer(MCContext &Context, MCAsmBackend &TAB, raw_pwrite_stream &OS,

5
llvm/include/llvm/MC/MCStreamer.h
View File

@ -173,7 +173,6 @@ class MCStreamer {
MCDwarfFrameInfo *getCurrentDwarfFrameInfo();
void EnsureValidDwarfFrame();
MCSymbol *EmitCFILabel();
MCSymbol *EmitCFICommon();
/// Similar to DwarfFrameInfos, but for SEH unwind info. Chained frames may
@ -203,6 +202,10 @@ protected:
virtual void EmitCFIStartProcImpl(MCDwarfFrameInfo &Frame);
virtual void EmitCFIEndProcImpl(MCDwarfFrameInfo &CurFrame);
/// When emitting an object file, create and emit a real label. When emitting
/// textual assembly, this should do nothing to avoid polluting our output.
virtual MCSymbol *EmitCFILabel();
WinEH::FrameInfo *getCurrentWinFrameInfo() {
return CurrentWinFrameInfo;
}

6
llvm/lib/MC/MCObjectStreamer.cpp
View File

@ -146,6 +146,12 @@ void MCObjectStreamer::EmitValueImpl(const MCExpr *Value, unsigned Size,
DF->getContents().resize(DF->getContents().size() + Size, 0);
}
MCSymbol *MCObjectStreamer::EmitCFILabel() {
MCSymbol *Label = getContext().createTempSymbol("cfi", true);
EmitLabel(Label);
return Label;
}
void MCObjectStreamer::EmitCFIStartProcImpl(MCDwarfFrameInfo &Frame) {
// We need to create a local symbol to avoid relocations.
Frame.Begin = getContext().createTempSymbol();

10
llvm/lib/MC/MCStreamer.cpp
View File

@ -355,13 +355,13 @@ void MCStreamer::EmitCFIEndProc() {
void MCStreamer::EmitCFIEndProcImpl(MCDwarfFrameInfo &Frame) {
// Put a dummy non-null value in Frame.End to mark that this frame has been
// closed.
Frame.End = (MCSymbol *) 1;
Frame.End = (MCSymbol *)1;
}
MCSymbol *MCStreamer::EmitCFILabel() {
MCSymbol *Label = getContext().createTempSymbol("cfi", true);
EmitLabel(Label);
return Label;
// Return a dummy non-null value so that label fields appear filled in when
// generating textual assembly.
return (MCSymbol *)1;
}
MCSymbol *MCStreamer::EmitCFICommon() {
@ -735,6 +735,8 @@ void MCStreamer::EmitWindowsUnwindTables() {
void MCStreamer::Finish() {
if (!DwarfFrameInfos.empty() && !DwarfFrameInfos.back().End)
report_fatal_error("Unfinished frame!");
if (!WinFrameInfos.empty() && !WinFrameInfos.back()->End)
report_fatal_error("Unfinished frame!");
MCTargetStreamer *TS = getTargetStreamer();
if (TS)

6
llvm/test/CodeGen/AArch64/arm64-patchpoint-webkit_jscc.ll
View File

@ -13,7 +13,6 @@
define void @jscall_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
entry:
; CHECK-LABEL: jscall_patchpoint_codegen:
; CHECK: Lcfi
; CHECK: str x{{.+}}, [sp]
; CHECK-NEXT: mov x0, x{{.+}}
; CHECK: Ltmp
@ -22,7 +21,6 @@ entry:
; CHECK: movk x16, #48879
; CHECK-NEXT: blr x16
; FAST-LABEL: jscall_patchpoint_codegen:
; FAST: Lcfi
; FAST: str x{{.+}}, [sp]
; FAST: Ltmp
; FAST-NEXT: mov x16, #281470681743360
@ -40,7 +38,6 @@ entry:
define i64 @jscall_patchpoint_codegen2(i64 %callee) {
entry:
; CHECK-LABEL: jscall_patchpoint_codegen2:
; CHECK: Lcfi
; CHECK: orr w[[REG:[0-9]+]], wzr, #0x6
; CHECK-NEXT: str x[[REG]], [sp, #24]
; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x4
@ -53,7 +50,6 @@ entry:
; CHECK-NEXT: movk x16, #48879
; CHECK-NEXT: blr x16
; FAST-LABEL: jscall_patchpoint_codegen2:
; FAST: Lcfi
; FAST: orr [[REG1:x[0-9]+]], xzr, #0x2
; FAST-NEXT: orr [[REG2:w[0-9]+]], wzr, #0x4
; FAST-NEXT: orr [[REG3:x[0-9]+]], xzr, #0x6
@ -74,7 +70,6 @@ entry:
define i64 @jscall_patchpoint_codegen3(i64 %callee) {
entry:
; CHECK-LABEL: jscall_patchpoint_codegen3:
; CHECK: Lcfi
; CHECK: mov w[[REG:[0-9]+]], #10
; CHECK-NEXT: str x[[REG]], [sp, #48]
; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x8
@ -91,7 +86,6 @@ entry:
; CHECK-NEXT: movk x16, #48879
; CHECK-NEXT: blr x16
; FAST-LABEL: jscall_patchpoint_codegen3:
; FAST: Lcfi
; FAST: orr [[REG1:x[0-9]+]], xzr, #0x2
; FAST-NEXT: orr [[REG2:w[0-9]+]], wzr, #0x4
; FAST-NEXT: orr [[REG3:x[0-9]+]], xzr, #0x6

2
llvm/test/CodeGen/PowerPC/empty-functions.ll
View File

@ -31,9 +31,7 @@ entry:
; LINUX-FP-NEXT: {{^}}#
; LINUX-FP-NEXT: stwu 1, -16(1)
; LINUX-FP-NEXT: stw 31, 12(1)
; LINUX-FP-NEXT: {{^}}.L{{.*}}:{{$}}
; LINUX-FP-NEXT: .cfi_def_cfa_offset 16
; LINUX-FP-NEXT: {{^}}.L{{.*}}:{{$}}
; LINUX-FP-NEXT: .cfi_offset r31, -4
; LINUX-FP-NEXT: mr 31, 1
; LINUX-FP-NEXT: {{^}}.L[[END:.*]]:{{$}}

2
llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll
View File

@ -207,9 +207,7 @@ define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) {
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 0, 16(1)
; CHECK-NEXT: stdu 1, -32(1)
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .Lcfi1:
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: li 5, 2
; CHECK-NEXT: bl memcmp

1
llvm/test/CodeGen/X86/2011-10-19-widen_vselect.ll
View File

@ -69,7 +69,6 @@ define void @full_test() {
; X32-LABEL: full_test:
; X32: # BB#0: # %entry
; X32-NEXT: subl $60, %esp
; X32-NEXT: .Lcfi0:
; X32-NEXT: .cfi_def_cfa_offset 64
; X32-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
; X32-NEXT: cvttps2dq %xmm2, %xmm0

3
llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll
View File

@ -11,12 +11,9 @@ define i64 @test_add_i64(i64 %arg1, i64 %arg2) {
; X32-LABEL: test_add_i64:
; X32: # BB#0:
; X32-NEXT: pushl %ebp
; X32-NEXT: .Lcfi0:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: .Lcfi1:
; X32-NEXT: .cfi_offset %ebp, -8
; X32-NEXT: movl %esp, %ebp
; X32-NEXT: .Lcfi2:
; X32-NEXT: .cfi_def_cfa_register %ebp
; X32-NEXT: movl 16(%ebp), %eax
; X32-NEXT: movl 20(%ebp), %edx

1
llvm/test/CodeGen/X86/GlobalISel/brcond.ll
View File

@ -21,7 +21,6 @@ define i32 @test_1(i32 %a, i32 %b, i32 %tValue, i32 %fValue) {
; X32-LABEL: test_1:
; X32: # BB#0: # %entry
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi0:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: cmpl %eax, {{[0-9]+}}(%esp)

24
llvm/test/CodeGen/X86/GlobalISel/callingconv.ll
View File

@ -113,7 +113,6 @@ define <8 x i32> @test_v8i32_args(<8 x i32> %arg1, <8 x i32> %arg2) {
; X32-LABEL: test_v8i32_args:
; X32: # BB#0:
; X32-NEXT: subl $12, %esp
; X32-NEXT: .Lcfi0:
; X32-NEXT: .cfi_def_cfa_offset 16
; X32-NEXT: movups 16(%esp), %xmm1
; X32-NEXT: movaps %xmm2, %xmm0
@ -133,7 +132,6 @@ define void @test_trivial_call() {
; X32-LABEL: test_trivial_call:
; X32: # BB#0:
; X32-NEXT: subl $12, %esp
; X32-NEXT: .Lcfi1:
; X32-NEXT: .cfi_def_cfa_offset 16
; X32-NEXT: calll trivial_callee
; X32-NEXT: addl $12, %esp
@ -142,7 +140,6 @@ define void @test_trivial_call() {
; X64-LABEL: test_trivial_call:
; X64: # BB#0:
; X64-NEXT: pushq %rax
; X64-NEXT: .Lcfi0:
; X64-NEXT: .cfi_def_cfa_offset 16
; X64-NEXT: callq trivial_callee
; X64-NEXT: popq %rax
@ -156,7 +153,6 @@ define void @test_simple_arg_call(i32 %in0, i32 %in1) {
; X32-LABEL: test_simple_arg_call:
; X32: # BB#0:
; X32-NEXT: subl $12, %esp
; X32-NEXT: .Lcfi2:
; X32-NEXT: .cfi_def_cfa_offset 16
; X32-NEXT: movl 16(%esp), %eax
; X32-NEXT: movl 20(%esp), %ecx
@ -169,7 +165,6 @@ define void @test_simple_arg_call(i32 %in0, i32 %in1) {
; X64-LABEL: test_simple_arg_call:
; X64: # BB#0:
; X64-NEXT: pushq %rax
; X64-NEXT: .Lcfi1:
; X64-NEXT: .cfi_def_cfa_offset 16
; X64-NEXT: movl %edi, %eax
; X64-NEXT: movl %esi, %edi
@ -186,7 +181,6 @@ define void @test_simple_arg8_call(i32 %in0) {
; X32-LABEL: test_simple_arg8_call:
; X32: # BB#0:
; X32-NEXT: subl $44, %esp
; X32-NEXT: .Lcfi3:
; X32-NEXT: .cfi_def_cfa_offset 48
; X32-NEXT: movl 48(%esp), %eax
; X32-NEXT: movl %eax, (%esp)
@ -204,7 +198,6 @@ define void @test_simple_arg8_call(i32 %in0) {
; X64-LABEL: test_simple_arg8_call:
; X64: # BB#0:
; X64-NEXT: subq $24, %rsp
; X64-NEXT: .Lcfi2:
; X64-NEXT: .cfi_def_cfa_offset 32
; X64-NEXT: movl %edi, (%rsp)
; X64-NEXT: movl %edi, 8(%rsp)
@ -225,7 +218,6 @@ define i32 @test_simple_return_callee() {
; X32-LABEL: test_simple_return_callee:
; X32: # BB#0:
; X32-NEXT: subl $12, %esp
; X32-NEXT: .Lcfi4:
; X32-NEXT: .cfi_def_cfa_offset 16
; X32-NEXT: movl $5, %eax
; X32-NEXT: movl %eax, (%esp)
@ -237,7 +229,6 @@ define i32 @test_simple_return_callee() {
; X64-LABEL: test_simple_return_callee:
; X64: # BB#0:
; X64-NEXT: pushq %rax
; X64-NEXT: .Lcfi3:
; X64-NEXT: .cfi_def_cfa_offset 16
; X64-NEXT: movl $5, %edi
; X64-NEXT: callq simple_return_callee
@ -254,7 +245,6 @@ define <8 x i32> @test_split_return_callee(<8 x i32> %arg1, <8 x i32> %arg2) {
; X32-LABEL: test_split_return_callee:
; X32: # BB#0:
; X32-NEXT: subl $44, %esp
; X32-NEXT: .Lcfi5:
; X32-NEXT: .cfi_def_cfa_offset 48
; X32-NEXT: movaps %xmm0, (%esp) # 16-byte Spill
; X32-NEXT: movaps %xmm1, 16(%esp) # 16-byte Spill
@ -269,7 +259,6 @@ define <8 x i32> @test_split_return_callee(<8 x i32> %arg1, <8 x i32> %arg2) {
; X64-LABEL: test_split_return_callee:
; X64: # BB#0:
; X64-NEXT: subq $40, %rsp
; X64-NEXT: .Lcfi4:
; X64-NEXT: .cfi_def_cfa_offset 48
; X64-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; X64-NEXT: movaps %xmm1, 16(%rsp) # 16-byte Spill
@ -289,7 +278,6 @@ define void @test_indirect_call(void()* %func) {
; X32-LABEL: test_indirect_call:
; X32: # BB#0:
; X32-NEXT: subl $12, %esp
; X32-NEXT: .Lcfi6:
; X32-NEXT: .cfi_def_cfa_offset 16
; X32-NEXT: calll *16(%esp)
; X32-NEXT: addl $12, %esp
@ -298,7 +286,6 @@ define void @test_indirect_call(void()* %func) {
; X64-LABEL: test_indirect_call:
; X64: # BB#0:
; X64-NEXT: pushq %rax
; X64-NEXT: .Lcfi5:
; X64-NEXT: .cfi_def_cfa_offset 16
; X64-NEXT: callq *%rdi
; X64-NEXT: popq %rax
@ -312,17 +299,12 @@ define void @test_abi_exts_call(i8* %addr) {
; X32-LABEL: test_abi_exts_call:
; X32: # BB#0:
; X32-NEXT: pushl %ebx
; X32-NEXT: .Lcfi7:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: pushl %esi
; X32-NEXT: .Lcfi8:
; X32-NEXT: .cfi_def_cfa_offset 12
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi9:
; X32-NEXT: .cfi_def_cfa_offset 16
; X32-NEXT: .Lcfi10:
; X32-NEXT: .cfi_offset %esi, -12
; X32-NEXT: .Lcfi11:
; X32-NEXT: .cfi_offset %ebx, -8
; X32-NEXT: movl 16(%esp), %eax
; X32-NEXT: movb (%eax), %bl
@ -342,9 +324,7 @@ define void @test_abi_exts_call(i8* %addr) {
; X64-LABEL: test_abi_exts_call:
; X64: # BB#0:
; X64-NEXT: pushq %rbx
; X64-NEXT: .Lcfi6:
; X64-NEXT: .cfi_def_cfa_offset 16
; X64-NEXT: .Lcfi7:
; X64-NEXT: .cfi_offset %rbx, -16
; X64-NEXT: movb (%rdi), %al
; X64-NEXT: movzbl %al, %ebx
@ -368,7 +348,6 @@ define void @test_variadic_call_1(i8** %addr_ptr, i32* %val_ptr) {
; X32-LABEL: test_variadic_call_1:
; X32: # BB#0:
; X32-NEXT: subl $12, %esp
; X32-NEXT: .Lcfi12:
; X32-NEXT: .cfi_def_cfa_offset 16
; X32-NEXT: movl 16(%esp), %eax
; X32-NEXT: movl 20(%esp), %ecx
@ -383,7 +362,6 @@ define void @test_variadic_call_1(i8** %addr_ptr, i32* %val_ptr) {
; X64-LABEL: test_variadic_call_1:
; X64: # BB#0:
; X64-NEXT: pushq %rax
; X64-NEXT: .Lcfi8:
; X64-NEXT: .cfi_def_cfa_offset 16
; X64-NEXT: movq (%rdi), %rdi
; X64-NEXT: movl (%rsi), %esi
@ -402,7 +380,6 @@ define void @test_variadic_call_2(i8** %addr_ptr, double* %val_ptr) {
; X32-LABEL: test_variadic_call_2:
; X32: # BB#0:
; X32-NEXT: subl $12, %esp
; X32-NEXT: .Lcfi13:
; X32-NEXT: .cfi_def_cfa_offset 16
; X32-NEXT: movl 16(%esp), %eax
; X32-NEXT: movl 20(%esp), %ecx
@ -421,7 +398,6 @@ define void @test_variadic_call_2(i8** %addr_ptr, double* %val_ptr) {
; X64-LABEL: test_variadic_call_2:
; X64: # BB#0:
; X64-NEXT: pushq %rax
; X64-NEXT: .Lcfi9:
; X64-NEXT: .cfi_def_cfa_offset 16
; X64-NEXT: movq (%rdi), %rdi
; X64-NEXT: movq (%rsi), %rcx

1
llvm/test/CodeGen/X86/GlobalISel/frameIndex.ll
View File

@ -15,7 +15,6 @@ define i32* @allocai32() {
; X32-LABEL: allocai32:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi0:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movl %esp, %eax
; X32-NEXT: popl %ecx

1
llvm/test/CodeGen/X86/TruncAssertZext.ll
View File

@ -16,7 +16,6 @@ define i64 @main() {
; CHECK-LABEL: main:
; CHECK: # BB#0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: callq foo
; CHECK-NEXT: movabsq $-4294967041, %rcx # imm = 0xFFFFFFFF000000FF

28
llvm/test/CodeGen/X86/atomic128.ll
View File

@ -10,9 +10,7 @@ define i128 @val_compare_and_swap(i128* %p, i128 %oldval, i128 %newval) {
; CHECK-LABEL: val_compare_and_swap:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: Lcfi1:
; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rcx, %r9
; CHECK-NEXT: movq %rsi, %rax
@ -30,9 +28,7 @@ define void @fetch_and_nand(i128* %p, i128 %bits) {
; CHECK-LABEL: fetch_and_nand:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: Lcfi2:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: Lcfi3:
; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax
@ -62,9 +58,7 @@ define void @fetch_and_or(i128* %p, i128 %bits) {
; CHECK-LABEL: fetch_and_or:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: Lcfi4:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: Lcfi5:
; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax
@ -92,9 +86,7 @@ define void @fetch_and_add(i128* %p, i128 %bits) {
; CHECK-LABEL: fetch_and_add:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: Lcfi6:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: Lcfi7:
; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax
@ -122,9 +114,7 @@ define void @fetch_and_sub(i128* %p, i128 %bits) {
; CHECK-LABEL: fetch_and_sub:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: Lcfi8:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: Lcfi9:
; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax
@ -152,9 +142,7 @@ define void @fetch_and_min(i128* %p, i128 %bits) {
; CHECK-LABEL: fetch_and_min:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: Lcfi10:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: Lcfi11:
; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax
@ -185,9 +173,7 @@ define void @fetch_and_max(i128* %p, i128 %bits) {
; CHECK-LABEL: fetch_and_max:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: Lcfi12:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: Lcfi13:
; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax
@ -218,9 +204,7 @@ define void @fetch_and_umin(i128* %p, i128 %bits) {
; CHECK-LABEL: fetch_and_umin:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: Lcfi14:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: Lcfi15:
; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax
@ -251,9 +235,7 @@ define void @fetch_and_umax(i128* %p, i128 %bits) {
; CHECK-LABEL: fetch_and_umax:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: Lcfi16:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: Lcfi17:
; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax
@ -284,9 +266,7 @@ define i128 @atomic_load_seq_cst(i128* %p) {
; CHECK-LABEL: atomic_load_seq_cst:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: Lcfi18:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: Lcfi19:
; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: xorl %edx, %edx
@ -303,9 +283,7 @@ define i128 @atomic_load_relaxed(i128* %p) {
; CHECK-LABEL: atomic_load_relaxed:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: Lcfi20:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: Lcfi21:
; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: xorl %edx, %edx
@ -322,9 +300,7 @@ define void @atomic_store_seq_cst(i128* %p, i128 %in) {
; CHECK-LABEL: atomic_store_seq_cst:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: Lcfi22:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: Lcfi23:
; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %rcx
; CHECK-NEXT: movq %rsi, %rbx
@ -346,9 +322,7 @@ define void @atomic_store_release(i128* %p, i128 %in) {
; CHECK-LABEL: atomic_store_release:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: Lcfi24:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: Lcfi25:
; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %rcx
; CHECK-NEXT: movq %rsi, %rbx
@ -370,9 +344,7 @@ define void @atomic_store_relaxed(i128* %p, i128 %in) {
; CHECK-LABEL: atomic_store_relaxed:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: Lcfi26:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: Lcfi27:
; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %rcx
; CHECK-NEXT: movq %rsi, %rbx

34
llvm/test/CodeGen/X86/avx2-vbroadcast.ll
View File

@ -1094,7 +1094,6 @@ define void @isel_crash_16b(i8* %cV_R.addr) {
; X32-LABEL: isel_crash_16b:
; X32: ## BB#0: ## %eintry
; X32-NEXT: subl $60, %esp
; X32-NEXT: Lcfi0:
; X32-NEXT: .cfi_def_cfa_offset 64
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: vxorps %xmm0, %xmm0, %xmm0
@ -1134,12 +1133,9 @@ define void @isel_crash_32b(i8* %cV_R.addr) {
; X32-LABEL: isel_crash_32b:
; X32: ## BB#0: ## %eintry
; X32-NEXT: pushl %ebp
; X32-NEXT: Lcfi1:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: Lcfi2:
; X32-NEXT: .cfi_offset %ebp, -8
; X32-NEXT: movl %esp, %ebp
; X32-NEXT: Lcfi3:
; X32-NEXT: .cfi_def_cfa_register %ebp
; X32-NEXT: andl $-32, %esp
; X32-NEXT: subl $128, %esp
@ -1157,12 +1153,9 @@ define void @isel_crash_32b(i8* %cV_R.addr) {
; X64-LABEL: isel_crash_32b:
; X64: ## BB#0: ## %eintry
; X64-NEXT: pushq %rbp
; X64-NEXT: Lcfi0:
; X64-NEXT: .cfi_def_cfa_offset 16
; X64-NEXT: Lcfi1:
; X64-NEXT: .cfi_offset %rbp, -16
; X64-NEXT: movq %rsp, %rbp
; X64-NEXT: Lcfi2:
; X64-NEXT: .cfi_def_cfa_register %rbp
; X64-NEXT: andq $-32, %rsp
; X64-NEXT: subq $128, %rsp
@ -1196,7 +1189,6 @@ define void @isel_crash_8w(i16* %cV_R.addr) {
; X32-LABEL: isel_crash_8w:
; X32: ## BB#0: ## %entry
; X32-NEXT: subl $60, %esp
; X32-NEXT: Lcfi4:
; X32-NEXT: .cfi_def_cfa_offset 64
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: vxorps %xmm0, %xmm0, %xmm0
@ -1236,12 +1228,9 @@ define void @isel_crash_16w(i16* %cV_R.addr) {
; X32-LABEL: isel_crash_16w:
; X32: ## BB#0: ## %eintry
; X32-NEXT: pushl %ebp
; X32-NEXT: Lcfi5:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: Lcfi6:
; X32-NEXT: .cfi_offset %ebp, -8
; X32-NEXT: movl %esp, %ebp
; X32-NEXT: Lcfi7:
; X32-NEXT: .cfi_def_cfa_register %ebp
; X32-NEXT: andl $-32, %esp
; X32-NEXT: subl $128, %esp
@ -1259,12 +1248,9 @@ define void @isel_crash_16w(i16* %cV_R.addr) {
; X64-LABEL: isel_crash_16w:
; X64: ## BB#0: ## %eintry
; X64-NEXT: pushq %rbp
; X64-NEXT: Lcfi3:
; X64-NEXT: .cfi_def_cfa_offset 16
; X64-NEXT: Lcfi4:
; X64-NEXT: .cfi_offset %rbp, -16
; X64-NEXT: movq %rsp, %rbp
; X64-NEXT: Lcfi5:
; X64-NEXT: .cfi_def_cfa_register %rbp
; X64-NEXT: andq $-32, %rsp
; X64-NEXT: subq $128, %rsp
@ -1298,7 +1284,6 @@ define void @isel_crash_4d(i32* %cV_R.addr) {
; X32-LABEL: isel_crash_4d:
; X32: ## BB#0: ## %entry
; X32-NEXT: subl $60, %esp
; X32-NEXT: Lcfi8:
; X32-NEXT: .cfi_def_cfa_offset 64
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: vxorps %xmm0, %xmm0, %xmm0
@ -1348,12 +1333,9 @@ define void @isel_crash_8d(i32* %cV_R.addr) {
; X32-LABEL: isel_crash_8d:
; X32: ## BB#0: ## %eintry
; X32-NEXT: pushl %ebp
; X32-NEXT: Lcfi9:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: Lcfi10:
; X32-NEXT: .cfi_offset %ebp, -8
; X32-NEXT: movl %esp, %ebp
; X32-NEXT: Lcfi11:
; X32-NEXT: .cfi_def_cfa_register %ebp
; X32-NEXT: andl $-32, %esp
; X32-NEXT: subl $128, %esp
@ -1371,12 +1353,9 @@ define void @isel_crash_8d(i32* %cV_R.addr) {
; X64-AVX2-LABEL: isel_crash_8d:
; X64-AVX2: ## BB#0: ## %eintry
; X64-AVX2-NEXT: pushq %rbp
; X64-AVX2-NEXT: Lcfi6:
; X64-AVX2-NEXT: .cfi_def_cfa_offset 16
; X64-AVX2-NEXT: Lcfi7:
; X64-AVX2-NEXT: .cfi_offset %rbp, -16
; X64-AVX2-NEXT: movq %rsp, %rbp
; X64-AVX2-NEXT: Lcfi8:
; X64-AVX2-NEXT: .cfi_def_cfa_register %rbp
; X64-AVX2-NEXT: andq $-32, %rsp
; X64-AVX2-NEXT: subq $128, %rsp
@ -1395,12 +1374,9 @@ define void @isel_crash_8d(i32* %cV_R.addr) {
; X64-AVX512VL-LABEL: isel_crash_8d:
; X64-AVX512VL: ## BB#0: ## %eintry
; X64-AVX512VL-NEXT: pushq %rbp
; X64-AVX512VL-NEXT: Lcfi6:
; X64-AVX512VL-NEXT: .cfi_def_cfa_offset 16
; X64-AVX512VL-NEXT: Lcfi7:
; X64-AVX512VL-NEXT: .cfi_offset %rbp, -16
; X64-AVX512VL-NEXT: movq %rsp, %rbp
; X64-AVX512VL-NEXT: Lcfi8:
; X64-AVX512VL-NEXT: .cfi_def_cfa_register %rbp
; X64-AVX512VL-NEXT: andq $-32, %rsp
; X64-AVX512VL-NEXT: subq $128, %rsp
@ -1433,7 +1409,6 @@ define void @isel_crash_2q(i64* %cV_R.addr) {
; X32-LABEL: isel_crash_2q:
; X32: ## BB#0: ## %entry
; X32-NEXT: subl $60, %esp
; X32-NEXT: Lcfi12:
; X32-NEXT: .cfi_def_cfa_offset 64
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: vxorps %xmm0, %xmm0, %xmm0
@ -1487,12 +1462,9 @@ define void @isel_crash_4q(i64* %cV_R.addr) {
; X32-LABEL: isel_crash_4q:
; X32: ## BB#0: ## %eintry
; X32-NEXT: pushl %ebp
; X32-NEXT: Lcfi13:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: Lcfi14:
; X32-NEXT: .cfi_offset %ebp, -8
; X32-NEXT: movl %esp, %ebp
; X32-NEXT: Lcfi15:
; X32-NEXT: .cfi_def_cfa_register %ebp
; X32-NEXT: andl $-32, %esp
; X32-NEXT: subl $128, %esp
@ -1516,12 +1488,9 @@ define void @isel_crash_4q(i64* %cV_R.addr) {
; X64-AVX2-LABEL: isel_crash_4q:
; X64-AVX2: ## BB#0: ## %eintry
; X64-AVX2-NEXT: pushq %rbp
; X64-AVX2-NEXT: Lcfi9:
; X64-AVX2-NEXT: .cfi_def_cfa_offset 16
; X64-AVX2-NEXT: Lcfi10:
; X64-AVX2-NEXT: .cfi_offset %rbp, -16
; X64-AVX2-NEXT: movq %rsp, %rbp
; X64-AVX2-NEXT: Lcfi11:
; X64-AVX2-NEXT: .cfi_def_cfa_register %rbp
; X64-AVX2-NEXT: andq $-32, %rsp
; X64-AVX2-NEXT: subq $128, %rsp
@ -1540,12 +1509,9 @@ define void @isel_crash_4q(i64* %cV_R.addr) {
; X64-AVX512VL-LABEL: isel_crash_4q:
; X64-AVX512VL: ## BB#0: ## %eintry
; X64-AVX512VL-NEXT: pushq %rbp
; X64-AVX512VL-NEXT: Lcfi9:
; X64-AVX512VL-NEXT: .cfi_def_cfa_offset 16
; X64-AVX512VL-NEXT: Lcfi10:
; X64-AVX512VL-NEXT: .cfi_offset %rbp, -16
; X64-AVX512VL-NEXT: movq %rsp, %rbp
; X64-AVX512VL-NEXT: Lcfi11:
; X64-AVX512VL-NEXT: .cfi_def_cfa_register %rbp
; X64-AVX512VL-NEXT: andq $-32, %rsp
; X64-AVX512VL-NEXT: subq $128, %rsp

25
llvm/test/CodeGen/X86/avx512-calling-conv.ll
View File

@ -121,7 +121,6 @@ define <8 x i32> @test5(<8 x i32>%a, <8 x i32>%b) {
; KNL-LABEL: test5:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rax
; KNL-NEXT: Lcfi0:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
; KNL-NEXT: vpmovdw %zmm0, %ymm0
@ -136,7 +135,6 @@ define <8 x i32> @test5(<8 x i32>%a, <8 x i32>%b) {
; SKX-LABEL: test5:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rax
; SKX-NEXT: Lcfi0:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: vpcmpgtd %ymm1, %ymm0, %k0
; SKX-NEXT: vpmovm2w %k0, %xmm0
@ -151,7 +149,6 @@ define <8 x i32> @test5(<8 x i32>%a, <8 x i32>%b) {
; KNL_X32-LABEL: test5:
; KNL_X32: ## BB#0:
; KNL_X32-NEXT: subl $12, %esp
; KNL_X32-NEXT: Lcfi0:
; KNL_X32-NEXT: .cfi_def_cfa_offset 16
; KNL_X32-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
; KNL_X32-NEXT: vpmovdw %zmm0, %ymm0
@ -174,7 +171,6 @@ define <16 x i32> @test6(<16 x i32>%a, <16 x i32>%b) {
; KNL-LABEL: test6:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rax
; KNL-NEXT: Lcfi1:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: vpcmpgtd %zmm1, %zmm0, %k1
; KNL-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
@ -189,7 +185,6 @@ define <16 x i32> @test6(<16 x i32>%a, <16 x i32>%b) {
; SKX-LABEL: test6:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rax
; SKX-NEXT: Lcfi1:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: vpcmpgtd %zmm1, %zmm0, %k0
; SKX-NEXT: vpmovm2b %k0, %xmm0
@ -204,7 +199,6 @@ define <16 x i32> @test6(<16 x i32>%a, <16 x i32>%b) {
; KNL_X32-LABEL: test6:
; KNL_X32: ## BB#0:
; KNL_X32-NEXT: subl $12, %esp
; KNL_X32-NEXT: Lcfi1:
; KNL_X32-NEXT: .cfi_def_cfa_offset 16
; KNL_X32-NEXT: vpcmpgtd %zmm1, %zmm0, %k1
; KNL_X32-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
@ -227,7 +221,6 @@ define <4 x i32> @test7(<4 x i32>%a, <4 x i32>%b) {
; KNL-LABEL: test7:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rax
; KNL-NEXT: Lcfi2:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; KNL-NEXT: callq _func4xi1
@ -239,7 +232,6 @@ define <4 x i32> @test7(<4 x i32>%a, <4 x i32>%b) {
; SKX-LABEL: test7:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rax
; SKX-NEXT: Lcfi2:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: vpcmpgtd %xmm1, %xmm0, %k0
; SKX-NEXT: vpmovm2d %k0, %xmm0
@ -252,7 +244,6 @@ define <4 x i32> @test7(<4 x i32>%a, <4 x i32>%b) {
; KNL_X32-LABEL: test7:
; KNL_X32: ## BB#0:
; KNL_X32-NEXT: subl $12, %esp
; KNL_X32-NEXT: Lcfi2:
; KNL_X32-NEXT: .cfi_def_cfa_offset 16
; KNL_X32-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; KNL_X32-NEXT: calll _func4xi1
@ -270,7 +261,6 @@ define <8 x i1> @test7a(<8 x i32>%a, <8 x i32>%b) {
; KNL-LABEL: test7a:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rax
; KNL-NEXT: Lcfi3:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
; KNL-NEXT: vpmovdw %zmm0, %ymm0
@ -289,7 +279,6 @@ define <8 x i1> @test7a(<8 x i32>%a, <8 x i32>%b) {
; SKX-LABEL: test7a:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rax
; SKX-NEXT: Lcfi3:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: vpcmpgtd %ymm1, %ymm0, %k0
; SKX-NEXT: vpmovm2w %k0, %xmm0
@ -307,7 +296,6 @@ define <8 x i1> @test7a(<8 x i32>%a, <8 x i32>%b) {
; KNL_X32-LABEL: test7a:
; KNL_X32: ## BB#0:
; KNL_X32-NEXT: subl $12, %esp
; KNL_X32-NEXT: Lcfi3:
; KNL_X32-NEXT: .cfi_def_cfa_offset 16
; KNL_X32-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
; KNL_X32-NEXT: vpmovdw %zmm0, %ymm0
@ -408,19 +396,13 @@ define i32 @test12(i32 %a1, i32 %a2, i32 %b1) {
; ALL_X64-LABEL: test12:
; ALL_X64: ## BB#0:
; ALL_X64-NEXT: pushq %rbp
; ALL_X64-NEXT: Lcfi4:
; ALL_X64-NEXT: .cfi_def_cfa_offset 16
; ALL_X64-NEXT: pushq %r14
; ALL_X64-NEXT: Lcfi5:
; ALL_X64-NEXT: .cfi_def_cfa_offset 24
; ALL_X64-NEXT: pushq %rbx
; ALL_X64-NEXT: Lcfi6:
; ALL_X64-NEXT: .cfi_def_cfa_offset 32
; ALL_X64-NEXT: Lcfi7:
; ALL_X64-NEXT: .cfi_offset %rbx, -32
; ALL_X64-NEXT: Lcfi8:
; ALL_X64-NEXT: .cfi_offset %r14, -24
; ALL_X64-NEXT: Lcfi9:
; ALL_X64-NEXT: .cfi_offset %rbp, -16
; ALL_X64-NEXT: movl %esi, %r14d
; ALL_X64-NEXT: movl %edi, %ebp
@ -442,22 +424,15 @@ define i32 @test12(i32 %a1, i32 %a2, i32 %b1) {
; KNL_X32-LABEL: test12:
; KNL_X32: ## BB#0:
; KNL_X32-NEXT: pushl %ebx
; KNL_X32-NEXT: Lcfi4:
; KNL_X32-NEXT: .cfi_def_cfa_offset 8
; KNL_X32-NEXT: pushl %edi
; KNL_X32-NEXT: Lcfi5:
; KNL_X32-NEXT: .cfi_def_cfa_offset 12
; KNL_X32-NEXT: pushl %esi
; KNL_X32-NEXT: Lcfi6:
; KNL_X32-NEXT: .cfi_def_cfa_offset 16
; KNL_X32-NEXT: subl $16, %esp
; KNL_X32-NEXT: Lcfi7:
; KNL_X32-NEXT: .cfi_def_cfa_offset 32
; KNL_X32-NEXT: Lcfi8:
; KNL_X32-NEXT: .cfi_offset %esi, -16
; KNL_X32-NEXT: Lcfi9:
; KNL_X32-NEXT: .cfi_offset %edi, -12
; KNL_X32-NEXT: Lcfi10:
; KNL_X32-NEXT: .cfi_offset %ebx, -8
; KNL_X32-NEXT: movl {{[0-9]+}}(%esp), %esi
; KNL_X32-NEXT: movl {{[0-9]+}}(%esp), %edi

1
llvm/test/CodeGen/X86/avx512-fsel.ll
View File

@ -8,7 +8,6 @@ define i32 @test(float %a, float %b) {
; CHECK-LABEL: test:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: vcmpeqss %xmm1, %xmm0, %k0
; CHECK-NEXT: kmovw %k0, %eax

99
llvm/test/CodeGen/X86/avx512-insert-extract.ll
View File

@ -799,12 +799,9 @@ define i32 @test_insertelement_v32i1(i32 %a, i32 %b, <32 x i32> %x , <32 x i32>
; KNL-LABEL: test_insertelement_v32i1:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi0:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi1:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi2:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-32, %rsp
; KNL-NEXT: subq $32, %rsp
@ -1286,12 +1283,9 @@ define i64 @test_extractelement_variable_v4i64(<4 x i64> %t1, i32 %index) {
; KNL-LABEL: test_extractelement_variable_v4i64:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi3:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi4:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi5:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-32, %rsp
; KNL-NEXT: subq $64, %rsp
@ -1307,12 +1301,9 @@ define i64 @test_extractelement_variable_v4i64(<4 x i64> %t1, i32 %index) {
; SKX-LABEL: test_extractelement_variable_v4i64:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rbp
; SKX-NEXT: Lcfi0:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: Lcfi1:
; SKX-NEXT: .cfi_offset %rbp, -16
; SKX-NEXT: movq %rsp, %rbp
; SKX-NEXT: Lcfi2:
; SKX-NEXT: .cfi_def_cfa_register %rbp
; SKX-NEXT: andq $-32, %rsp
; SKX-NEXT: subq $64, %rsp
@ -1332,12 +1323,9 @@ define i64 @test_extractelement_variable_v8i64(<8 x i64> %t1, i32 %index) {
; KNL-LABEL: test_extractelement_variable_v8i64:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi6:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi7:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi8:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-64, %rsp
; KNL-NEXT: subq $128, %rsp
@ -1353,12 +1341,9 @@ define i64 @test_extractelement_variable_v8i64(<8 x i64> %t1, i32 %index) {
; SKX-LABEL: test_extractelement_variable_v8i64:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rbp
; SKX-NEXT: Lcfi3:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: Lcfi4:
; SKX-NEXT: .cfi_offset %rbp, -16
; SKX-NEXT: movq %rsp, %rbp
; SKX-NEXT: Lcfi5:
; SKX-NEXT: .cfi_def_cfa_register %rbp
; SKX-NEXT: andq $-64, %rsp
; SKX-NEXT: subq $128, %rsp
@ -1390,12 +1375,9 @@ define double @test_extractelement_variable_v4f64(<4 x double> %t1, i32 %index)
; KNL-LABEL: test_extractelement_variable_v4f64:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi9:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi10:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi11:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-32, %rsp
; KNL-NEXT: subq $64, %rsp
@ -1411,12 +1393,9 @@ define double @test_extractelement_variable_v4f64(<4 x double> %t1, i32 %index)
; SKX-LABEL: test_extractelement_variable_v4f64:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rbp
; SKX-NEXT: Lcfi6:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: Lcfi7:
; SKX-NEXT: .cfi_offset %rbp, -16
; SKX-NEXT: movq %rsp, %rbp
; SKX-NEXT: Lcfi8:
; SKX-NEXT: .cfi_def_cfa_register %rbp
; SKX-NEXT: andq $-32, %rsp
; SKX-NEXT: subq $64, %rsp
@ -1436,12 +1415,9 @@ define double @test_extractelement_variable_v8f64(<8 x double> %t1, i32 %index)
; KNL-LABEL: test_extractelement_variable_v8f64:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi12:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi13:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi14:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-64, %rsp
; KNL-NEXT: subq $128, %rsp
@ -1457,12 +1433,9 @@ define double @test_extractelement_variable_v8f64(<8 x double> %t1, i32 %index)
; SKX-LABEL: test_extractelement_variable_v8f64:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rbp
; SKX-NEXT: Lcfi9:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: Lcfi10:
; SKX-NEXT: .cfi_offset %rbp, -16
; SKX-NEXT: movq %rsp, %rbp
; SKX-NEXT: Lcfi11:
; SKX-NEXT: .cfi_def_cfa_register %rbp
; SKX-NEXT: andq $-64, %rsp
; SKX-NEXT: subq $128, %rsp
@ -1494,12 +1467,9 @@ define i32 @test_extractelement_variable_v8i32(<8 x i32> %t1, i32 %index) {
; KNL-LABEL: test_extractelement_variable_v8i32:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi15:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi16:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi17:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-32, %rsp
; KNL-NEXT: subq $64, %rsp
@ -1515,12 +1485,9 @@ define i32 @test_extractelement_variable_v8i32(<8 x i32> %t1, i32 %index) {
; SKX-LABEL: test_extractelement_variable_v8i32:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rbp
; SKX-NEXT: Lcfi12:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: Lcfi13:
; SKX-NEXT: .cfi_offset %rbp, -16
; SKX-NEXT: movq %rsp, %rbp
; SKX-NEXT: Lcfi14:
; SKX-NEXT: .cfi_def_cfa_register %rbp
; SKX-NEXT: andq $-32, %rsp
; SKX-NEXT: subq $64, %rsp
@ -1540,12 +1507,9 @@ define i32 @test_extractelement_variable_v16i32(<16 x i32> %t1, i32 %index) {
; KNL-LABEL: test_extractelement_variable_v16i32:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi18:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi19:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi20:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-64, %rsp
; KNL-NEXT: subq $128, %rsp
@ -1561,12 +1525,9 @@ define i32 @test_extractelement_variable_v16i32(<16 x i32> %t1, i32 %index) {
; SKX-LABEL: test_extractelement_variable_v16i32:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rbp
; SKX-NEXT: Lcfi15:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: Lcfi16:
; SKX-NEXT: .cfi_offset %rbp, -16
; SKX-NEXT: movq %rsp, %rbp
; SKX-NEXT: Lcfi17:
; SKX-NEXT: .cfi_def_cfa_register %rbp
; SKX-NEXT: andq $-64, %rsp
; SKX-NEXT: subq $128, %rsp
@ -1598,12 +1559,9 @@ define float @test_extractelement_variable_v8f32(<8 x float> %t1, i32 %index) {
; KNL-LABEL: test_extractelement_variable_v8f32:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi21:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi22:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi23:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-32, %rsp
; KNL-NEXT: subq $64, %rsp
@ -1619,12 +1577,9 @@ define float @test_extractelement_variable_v8f32(<8 x float> %t1, i32 %index) {
; SKX-LABEL: test_extractelement_variable_v8f32:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rbp
; SKX-NEXT: Lcfi18:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: Lcfi19:
; SKX-NEXT: .cfi_offset %rbp, -16
; SKX-NEXT: movq %rsp, %rbp
; SKX-NEXT: Lcfi20:
; SKX-NEXT: .cfi_def_cfa_register %rbp
; SKX-NEXT: andq $-32, %rsp
; SKX-NEXT: subq $64, %rsp
@ -1644,12 +1599,9 @@ define float @test_extractelement_variable_v16f32(<16 x float> %t1, i32 %index)
; KNL-LABEL: test_extractelement_variable_v16f32:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi24:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi25:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi26:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-64, %rsp
; KNL-NEXT: subq $128, %rsp
@ -1665,12 +1617,9 @@ define float @test_extractelement_variable_v16f32(<16 x float> %t1, i32 %index)
; SKX-LABEL: test_extractelement_variable_v16f32:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rbp
; SKX-NEXT: Lcfi21:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: Lcfi22:
; SKX-NEXT: .cfi_offset %rbp, -16
; SKX-NEXT: movq %rsp, %rbp
; SKX-NEXT: Lcfi23:
; SKX-NEXT: .cfi_def_cfa_register %rbp
; SKX-NEXT: andq $-64, %rsp
; SKX-NEXT: subq $128, %rsp
@ -1702,12 +1651,9 @@ define i16 @test_extractelement_variable_v16i16(<16 x i16> %t1, i32 %index) {
; KNL-LABEL: test_extractelement_variable_v16i16:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi27:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi28:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi29:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-32, %rsp
; KNL-NEXT: subq $64, %rsp
@ -1723,12 +1669,9 @@ define i16 @test_extractelement_variable_v16i16(<16 x i16> %t1, i32 %index) {
; SKX-LABEL: test_extractelement_variable_v16i16:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rbp
; SKX-NEXT: Lcfi24:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: Lcfi25:
; SKX-NEXT: .cfi_offset %rbp, -16
; SKX-NEXT: movq %rsp, %rbp
; SKX-NEXT: Lcfi26:
; SKX-NEXT: .cfi_def_cfa_register %rbp
; SKX-NEXT: andq $-32, %rsp
; SKX-NEXT: subq $64, %rsp
@ -1748,12 +1691,9 @@ define i16 @test_extractelement_variable_v32i16(<32 x i16> %t1, i32 %index) {
; KNL-LABEL: test_extractelement_variable_v32i16:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi30:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi31:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi32:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-64, %rsp
; KNL-NEXT: subq $128, %rsp
@ -1770,12 +1710,9 @@ define i16 @test_extractelement_variable_v32i16(<32 x i16> %t1, i32 %index) {
; SKX-LABEL: test_extractelement_variable_v32i16:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rbp
; SKX-NEXT: Lcfi27:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: Lcfi28:
; SKX-NEXT: .cfi_offset %rbp, -16
; SKX-NEXT: movq %rsp, %rbp
; SKX-NEXT: Lcfi29:
; SKX-NEXT: .cfi_def_cfa_register %rbp
; SKX-NEXT: andq $-64, %rsp
; SKX-NEXT: subq $128, %rsp
@ -1808,12 +1745,9 @@ define i8 @test_extractelement_variable_v32i8(<32 x i8> %t1, i32 %index) {
; KNL-LABEL: test_extractelement_variable_v32i8:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi33:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi34:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi35:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-32, %rsp
; KNL-NEXT: subq $64, %rsp
@ -1830,12 +1764,9 @@ define i8 @test_extractelement_variable_v32i8(<32 x i8> %t1, i32 %index) {
; SKX-LABEL: test_extractelement_variable_v32i8:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rbp
; SKX-NEXT: Lcfi30:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: Lcfi31:
; SKX-NEXT: .cfi_offset %rbp, -16
; SKX-NEXT: movq %rsp, %rbp
; SKX-NEXT: Lcfi32:
; SKX-NEXT: .cfi_def_cfa_register %rbp
; SKX-NEXT: andq $-32, %rsp
; SKX-NEXT: subq $64, %rsp
@ -1857,12 +1788,9 @@ define i8 @test_extractelement_variable_v64i8(<64 x i8> %t1, i32 %index) {
; KNL-LABEL: test_extractelement_variable_v64i8:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi36:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi37:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi38:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-64, %rsp
; KNL-NEXT: subq $128, %rsp
@ -1880,12 +1808,9 @@ define i8 @test_extractelement_variable_v64i8(<64 x i8> %t1, i32 %index) {
; SKX-LABEL: test_extractelement_variable_v64i8:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rbp
; SKX-NEXT: Lcfi33:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: Lcfi34:
; SKX-NEXT: .cfi_offset %rbp, -16
; SKX-NEXT: movq %rsp, %rbp
; SKX-NEXT: Lcfi35:
; SKX-NEXT: .cfi_def_cfa_register %rbp
; SKX-NEXT: andq $-64, %rsp
; SKX-NEXT: subq $128, %rsp
@ -1907,12 +1832,9 @@ define i8 @test_extractelement_variable_v64i8_indexi8(<64 x i8> %t1, i8 %index)
; KNL-LABEL: test_extractelement_variable_v64i8_indexi8:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi39:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi40:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi41:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-64, %rsp
; KNL-NEXT: subq $128, %rsp
@ -1931,12 +1853,9 @@ define i8 @test_extractelement_variable_v64i8_indexi8(<64 x i8> %t1, i8 %index)
; SKX-LABEL: test_extractelement_variable_v64i8_indexi8:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rbp
; SKX-NEXT: Lcfi36:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: Lcfi37:
; SKX-NEXT: .cfi_offset %rbp, -16
; SKX-NEXT: movq %rsp, %rbp
; SKX-NEXT: Lcfi38:
; SKX-NEXT: .cfi_def_cfa_register %rbp
; SKX-NEXT: andq $-64, %rsp
; SKX-NEXT: subq $128, %rsp
@ -2020,12 +1939,9 @@ define zeroext i8 @test_extractelement_varible_v8i1(<8 x i32> %a, <8 x i32> %b,
; KNL-LABEL: test_extractelement_varible_v8i1:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi42:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi43:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi44:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-64, %rsp
; KNL-NEXT: subq $128, %rsp
@ -2046,12 +1962,9 @@ define zeroext i8 @test_extractelement_varible_v8i1(<8 x i32> %a, <8 x i32> %b,
; SKX-LABEL: test_extractelement_varible_v8i1:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rbp
; SKX-NEXT: Lcfi39:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: Lcfi40:
; SKX-NEXT: .cfi_offset %rbp, -16
; SKX-NEXT: movq %rsp, %rbp
; SKX-NEXT: Lcfi41:
; SKX-NEXT: .cfi_def_cfa_register %rbp
; SKX-NEXT: andq $-64, %rsp
; SKX-NEXT: subq $128, %rsp
@ -2076,12 +1989,9 @@ define zeroext i8 @test_extractelement_varible_v16i1(<16 x i32> %a, <16 x i32> %
; KNL-LABEL: test_extractelement_varible_v16i1:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi45:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi46:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi47:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-64, %rsp
; KNL-NEXT: subq $128, %rsp
@ -2100,12 +2010,9 @@ define zeroext i8 @test_extractelement_varible_v16i1(<16 x i32> %a, <16 x i32> %
; SKX-LABEL: test_extractelement_varible_v16i1:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rbp
; SKX-NEXT: Lcfi42:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: Lcfi43:
; SKX-NEXT: .cfi_offset %rbp, -16
; SKX-NEXT: movq %rsp, %rbp
; SKX-NEXT: Lcfi44:
; SKX-NEXT: .cfi_def_cfa_register %rbp
; SKX-NEXT: andq $-64, %rsp
; SKX-NEXT: subq $128, %rsp
@ -2130,12 +2037,9 @@ define zeroext i8 @test_extractelement_varible_v32i1(<32 x i8> %a, <32 x i8> %b,
; KNL-LABEL: test_extractelement_varible_v32i1:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi48:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi49:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi50:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-32, %rsp
; KNL-NEXT: subq $64, %rsp
@ -2157,12 +2061,9 @@ define zeroext i8 @test_extractelement_varible_v32i1(<32 x i8> %a, <32 x i8> %b,
; SKX-LABEL: test_extractelement_varible_v32i1:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rbp
; SKX-NEXT: Lcfi45:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: Lcfi46:
; SKX-NEXT: .cfi_offset %rbp, -16
; SKX-NEXT: movq %rsp, %rbp
; SKX-NEXT: Lcfi47:
; SKX-NEXT: .cfi_def_cfa_register %rbp
; SKX-NEXT: andq $-64, %rsp
; SKX-NEXT: subq $128, %rsp

3
llvm/test/CodeGen/X86/avx512-insert-extract_i1.ll
View File

@ -7,12 +7,9 @@ define zeroext i8 @test_extractelement_varible_v64i1(<64 x i8> %a, <64 x i8> %b,
; SKX-LABEL: test_extractelement_varible_v64i1:
; SKX: ## BB#0:
; SKX-NEXT: pushq %rbp
; SKX-NEXT: Lcfi0:
; SKX-NEXT: .cfi_def_cfa_offset 16
; SKX-NEXT: Lcfi1:
; SKX-NEXT: .cfi_offset %rbp, -16
; SKX-NEXT: movq %rsp, %rbp
; SKX-NEXT: Lcfi2:
; SKX-NEXT: .cfi_def_cfa_register %rbp
; SKX-NEXT: andq $-64, %rsp
; SKX-NEXT: subq $128, %rsp

42
llvm/test/CodeGen/X86/avx512-mask-op.ll
View File

@ -934,12 +934,9 @@ define <64 x i8> @test16(i64 %x) {
; KNL-LABEL: test16:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi0:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi1:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi2:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-32, %rsp
; KNL-NEXT: subq $64, %rsp
@ -1004,12 +1001,9 @@ define <64 x i8> @test16(i64 %x) {
; AVX512DQ-LABEL: test16:
; AVX512DQ: ## BB#0:
; AVX512DQ-NEXT: pushq %rbp
; AVX512DQ-NEXT: Lcfi0:
; AVX512DQ-NEXT: .cfi_def_cfa_offset 16
; AVX512DQ-NEXT: Lcfi1:
; AVX512DQ-NEXT: .cfi_offset %rbp, -16
; AVX512DQ-NEXT: movq %rsp, %rbp
; AVX512DQ-NEXT: Lcfi2:
; AVX512DQ-NEXT: .cfi_def_cfa_register %rbp
; AVX512DQ-NEXT: andq $-32, %rsp
; AVX512DQ-NEXT: subq $64, %rsp
@ -1050,12 +1044,9 @@ define <64 x i8> @test17(i64 %x, i32 %y, i32 %z) {
; KNL-LABEL: test17:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi3:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi4:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi5:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-32, %rsp
; KNL-NEXT: subq $64, %rsp
@ -1124,12 +1115,9 @@ define <64 x i8> @test17(i64 %x, i32 %y, i32 %z) {
; AVX512DQ-LABEL: test17:
; AVX512DQ: ## BB#0:
; AVX512DQ-NEXT: pushq %rbp
; AVX512DQ-NEXT: Lcfi3:
; AVX512DQ-NEXT: .cfi_def_cfa_offset 16
; AVX512DQ-NEXT: Lcfi4:
; AVX512DQ-NEXT: .cfi_offset %rbp, -16
; AVX512DQ-NEXT: movq %rsp, %rbp
; AVX512DQ-NEXT: Lcfi5:
; AVX512DQ-NEXT: .cfi_def_cfa_register %rbp
; AVX512DQ-NEXT: andq $-32, %rsp
; AVX512DQ-NEXT: subq $64, %rsp
@ -1835,12 +1823,9 @@ define void @ktest_2(<32 x float> %in, float * %base) {
; KNL-LABEL: ktest_2:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi6:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: Lcfi7:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: movq %rsp, %rbp
; KNL-NEXT: Lcfi8:
; KNL-NEXT: .cfi_def_cfa_register %rbp
; KNL-NEXT: andq $-32, %rsp
; KNL-NEXT: subq $32, %rsp
@ -2186,12 +2171,9 @@ define void @ktest_2(<32 x float> %in, float * %base) {
; AVX512DQ-LABEL: ktest_2:
; AVX512DQ: ## BB#0:
; AVX512DQ-NEXT: pushq %rbp
; AVX512DQ-NEXT: Lcfi6:
; AVX512DQ-NEXT: .cfi_def_cfa_offset 16
; AVX512DQ-NEXT: Lcfi7:
; AVX512DQ-NEXT: .cfi_offset %rbp, -16
; AVX512DQ-NEXT: movq %rsp, %rbp
; AVX512DQ-NEXT: Lcfi8:
; AVX512DQ-NEXT: .cfi_def_cfa_register %rbp
; AVX512DQ-NEXT: andq $-32, %rsp
; AVX512DQ-NEXT: subq $32, %rsp
@ -2959,34 +2941,22 @@ define void @store_64i1(<64 x i1>* %a, <64 x i1> %v) {
; KNL-LABEL: store_64i1:
; KNL: ## BB#0:
; KNL-NEXT: pushq %rbp
; KNL-NEXT: Lcfi9:
; KNL-NEXT: .cfi_def_cfa_offset 16
; KNL-NEXT: pushq %r15
; KNL-NEXT: Lcfi10:
; KNL-NEXT: .cfi_def_cfa_offset 24
; KNL-NEXT: pushq %r14
; KNL-NEXT: Lcfi11:
; KNL-NEXT: .cfi_def_cfa_offset 32
; KNL-NEXT: pushq %r13
; KNL-NEXT: Lcfi12:
; KNL-NEXT: .cfi_def_cfa_offset 40
; KNL-NEXT: pushq %r12
; KNL-NEXT: Lcfi13:
; KNL-NEXT: .cfi_def_cfa_offset 48
; KNL-NEXT: pushq %rbx
; KNL-NEXT: Lcfi14:
; KNL-NEXT: .cfi_def_cfa_offset 56
; KNL-NEXT: Lcfi15:
; KNL-NEXT: .cfi_offset %rbx, -56
; KNL-NEXT: Lcfi16:
; KNL-NEXT: .cfi_offset %r12, -48
; KNL-NEXT: Lcfi17:
; KNL-NEXT: .cfi_offset %r13, -40
; KNL-NEXT: Lcfi18:
; KNL-NEXT: .cfi_offset %r14, -32
; KNL-NEXT: Lcfi19:
; KNL-NEXT: .cfi_offset %r15, -24
; KNL-NEXT: Lcfi20:
; KNL-NEXT: .cfi_offset %rbp, -16
; KNL-NEXT: vpmovsxbd %xmm0, %zmm0
; KNL-NEXT: vpslld $31, %zmm0, %zmm0
@ -3296,34 +3266,22 @@ define void @store_64i1(<64 x i1>* %a, <64 x i1> %v) {
; AVX512DQ-LABEL: store_64i1:
; AVX512DQ: ## BB#0:
; AVX512DQ-NEXT: pushq %rbp
; AVX512DQ-NEXT: Lcfi9:
; AVX512DQ-NEXT: .cfi_def_cfa_offset 16
; AVX512DQ-NEXT: pushq %r15
; AVX512DQ-NEXT: Lcfi10:
; AVX512DQ-NEXT: .cfi_def_cfa_offset 24
; AVX512DQ-NEXT: pushq %r14
; AVX512DQ-NEXT: Lcfi11:
; AVX512DQ-NEXT: .cfi_def_cfa_offset 32
; AVX512DQ-NEXT: pushq %r13
; AVX512DQ-NEXT: Lcfi12:
; AVX512DQ-NEXT: .cfi_def_cfa_offset 40
; AVX512DQ-NEXT: pushq %r12
; AVX512DQ-NEXT: Lcfi13:
; AVX512DQ-NEXT: .cfi_def_cfa_offset 48
; AVX512DQ-NEXT: pushq %rbx
; AVX512DQ-NEXT: Lcfi14:
; AVX512DQ-NEXT: .cfi_def_cfa_offset 56
; AVX512DQ-NEXT: Lcfi15:
; AVX512DQ-NEXT: .cfi_offset %rbx, -56
; AVX512DQ-NEXT: Lcfi16:
; AVX512DQ-NEXT: .cfi_offset %r12, -48
; AVX512DQ-NEXT: Lcfi17:
; AVX512DQ-NEXT: .cfi_offset %r13, -40
; AVX512DQ-NEXT: Lcfi18:
; AVX512DQ-NEXT: .cfi_offset %r14, -32
; AVX512DQ-NEXT: Lcfi19:
; AVX512DQ-NEXT: .cfi_offset %r15, -24
; AVX512DQ-NEXT: Lcfi20:
; AVX512DQ-NEXT: .cfi_offset %rbp, -16
; AVX512DQ-NEXT: vpmovsxbd %xmm0, %zmm0
; AVX512DQ-NEXT: vpslld $31, %zmm0, %zmm0

5
llvm/test/CodeGen/X86/avx512-mask-spills.ll
View File

@ -6,7 +6,6 @@ define <4 x i1> @test_4i1(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: test_4i1:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: vpcmpnleud %xmm1, %xmm0, %k0
; CHECK-NEXT: vpcmpgtd %xmm1, %xmm0, %k1
@ -29,7 +28,6 @@ define <8 x i1> @test_8i1(<8 x i32> %a, <8 x i32> %b) {
; CHECK-LABEL: test_8i1:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: Lcfi1:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: vpcmpnleud %ymm1, %ymm0, %k0
; CHECK-NEXT: vpcmpgtd %ymm1, %ymm0, %k1
@ -53,7 +51,6 @@ define <16 x i1> @test_16i1(<16 x i32> %a, <16 x i32> %b) {
; CHECK-LABEL: test_16i1:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: Lcfi2:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: vpcmpnleud %zmm1, %zmm0, %k0
; CHECK-NEXT: vpcmpgtd %zmm1, %zmm0, %k1
@ -76,7 +73,6 @@ define <32 x i1> @test_32i1(<32 x i16> %a, <32 x i16> %b) {
; CHECK-LABEL: test_32i1:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: Lcfi3:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: vpcmpnleuw %zmm1, %zmm0, %k0
; CHECK-NEXT: vpcmpgtw %zmm1, %zmm0, %k1
@ -99,7 +95,6 @@ define <64 x i1> @test_64i1(<64 x i8> %a, <64 x i8> %b) {
; CHECK-LABEL: test_64i1:
; CHECK: ## BB#0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: Lcfi4:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: vpcmpnleub %zmm1, %zmm0, %k0
; CHECK-NEXT: vpcmpgtb %zmm1, %zmm0, %k1

1
llvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll
View File

@ -18,7 +18,6 @@ define void @test_xmm(i32 %shift, i32 %mulp, <2 x i64> %a,i8* %arraydecay,i8* %f
; CHECK-LABEL: test_xmm:
; CHECK: ## BB#0:
; CHECK-NEXT: subq $56, %rsp
; CHECK-NEXT: Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 64
; CHECK-NEXT: movl $2, %esi
; CHECK-NEXT: movl $8, %eax

2
llvm/test/CodeGen/X86/avx512-schedule.ll
View File

@ -7176,7 +7176,6 @@ define <16 x float> @broadcast_ss_spill(float %x) {
; CHECK-LABEL: broadcast_ss_spill:
; CHECK: # BB#0:
; CHECK-NEXT: subq $24, %rsp # sched: [1:0.25]
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: vaddss %xmm0, %xmm0, %xmm0 # sched: [4:0.33]
; CHECK-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill sched: [1:1.00]
@ -7198,7 +7197,6 @@ define <8 x double> @broadcast_sd_spill(double %x) {
; CHECK-LABEL: broadcast_sd_spill:
; CHECK: # BB#0:
; CHECK-NEXT: subq $24, %rsp # sched: [1:0.25]
; CHECK-NEXT: .Lcfi1:
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: vaddsd %xmm0, %xmm0, %xmm0 # sched: [4:0.33]
; CHECK-NEXT: vmovapd %xmm0, (%rsp) # 16-byte Spill sched: [1:1.00]

3
llvm/test/CodeGen/X86/avx512-select.ll
View File

@ -106,12 +106,9 @@ define <16 x double> @select04(<16 x double> %a, <16 x double> %b) {
; X86-LABEL: select04:
; X86: # BB#0:
; X86-NEXT: pushl %ebp
; X86-NEXT: .Lcfi0:
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .Lcfi1:
; X86-NEXT: .cfi_offset %ebp, -8
; X86-NEXT: movl %esp, %ebp
; X86-NEXT: .Lcfi2:
; X86-NEXT: .cfi_def_cfa_register %ebp
; X86-NEXT: andl $-64, %esp
; X86-NEXT: subl $64, %esp

2
llvm/test/CodeGen/X86/avx512-vbroadcast.ll
View File

@ -407,7 +407,6 @@ define <16 x float> @broadcast_ss_spill(float %x) {
; ALL-LABEL: broadcast_ss_spill:
; ALL: # BB#0:
; ALL-NEXT: subq $24, %rsp
; ALL-NEXT: .Lcfi0:
; ALL-NEXT: .cfi_def_cfa_offset 32
; ALL-NEXT: vaddss %xmm0, %xmm0, %xmm0
; ALL-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
@ -427,7 +426,6 @@ define <8 x double> @broadcast_sd_spill(double %x) {
; ALL-LABEL: broadcast_sd_spill:
; ALL: # BB#0:
; ALL-NEXT: subq $24, %rsp
; ALL-NEXT: .Lcfi1:
; ALL-NEXT: .cfi_def_cfa_offset 32
; ALL-NEXT: vaddsd %xmm0, %xmm0, %xmm0
; ALL-NEXT: vmovapd %xmm0, (%rsp) # 16-byte Spill

4
llvm/test/CodeGen/X86/avx512bw-intrinsics-fast-isel.ll
View File

@ -8,9 +8,7 @@ define <8 x i64> @test_mm512_mask_set1_epi8(<8 x i64> %__O, i64 %__M, i8 signext
; X32-LABEL: test_mm512_mask_set1_epi8:
; X32: # BB#0: # %entry
; X32-NEXT: pushl %ebx
; X32-NEXT: .Lcfi0:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: .Lcfi1:
; X32-NEXT: .cfi_offset %ebx, -8
; X32-NEXT: vmovdqa64 %zmm0, %zmm3
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
@ -740,9 +738,7 @@ define <8 x i64> @test_mm512_maskz_set1_epi8(i64 %__M, i8 signext %__A) {
; X32-LABEL: test_mm512_maskz_set1_epi8:
; X32: # BB#0: # %entry
; X32-NEXT: pushl %ebx
; X32-NEXT: .Lcfi2:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: .Lcfi3:
; X32-NEXT: .cfi_offset %ebx, -8
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl %eax, %ecx

16
llvm/test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll
View File

@ -349,7 +349,6 @@ define i64 @test_pcmpeq_b(<64 x i8> %a, <64 x i8> %b) {
; AVX512F-32-LABEL: test_pcmpeq_b:
; AVX512F-32: # BB#0:
; AVX512F-32-NEXT: subl $12, %esp
; AVX512F-32-NEXT: .Lcfi0:
; AVX512F-32-NEXT: .cfi_def_cfa_offset 16
; AVX512F-32-NEXT: vpcmpeqb %zmm1, %zmm0, %k0
; AVX512F-32-NEXT: kmovq %k0, (%esp)
@ -374,7 +373,6 @@ define i64 @test_mask_pcmpeq_b(<64 x i8> %a, <64 x i8> %b, i64 %mask) {
; AVX512F-32-LABEL: test_mask_pcmpeq_b:
; AVX512F-32: # BB#0:
; AVX512F-32-NEXT: subl $12, %esp
; AVX512F-32-NEXT: .Lcfi1:
; AVX512F-32-NEXT: .cfi_def_cfa_offset 16
; AVX512F-32-NEXT: kmovq {{[0-9]+}}(%esp), %k1
; AVX512F-32-NEXT: vpcmpeqb %zmm1, %zmm0, %k0 {%k1}
@ -441,7 +439,6 @@ define i64 @test_pcmpgt_b(<64 x i8> %a, <64 x i8> %b) {
; AVX512F-32-LABEL: test_pcmpgt_b:
; AVX512F-32: # BB#0:
; AVX512F-32-NEXT: subl $12, %esp
; AVX512F-32-NEXT: .Lcfi2:
; AVX512F-32-NEXT: .cfi_def_cfa_offset 16
; AVX512F-32-NEXT: vpcmpgtb %zmm1, %zmm0, %k0
; AVX512F-32-NEXT: kmovq %k0, (%esp)
@ -466,7 +463,6 @@ define i64 @test_mask_pcmpgt_b(<64 x i8> %a, <64 x i8> %b, i64 %mask) {
; AVX512F-32-LABEL: test_mask_pcmpgt_b:
; AVX512F-32: # BB#0:
; AVX512F-32-NEXT: subl $12, %esp
; AVX512F-32-NEXT: .Lcfi3:
; AVX512F-32-NEXT: .cfi_def_cfa_offset 16
; AVX512F-32-NEXT: kmovq {{[0-9]+}}(%esp), %k1
; AVX512F-32-NEXT: vpcmpgtb %zmm1, %zmm0, %k0 {%k1}
@ -1676,7 +1672,6 @@ define i64 @test_cmp_b_512(<64 x i8> %a0, <64 x i8> %a1) {
; AVX512F-32-LABEL: test_cmp_b_512:
; AVX512F-32: # BB#0:
; AVX512F-32-NEXT: subl $60, %esp
; AVX512F-32-NEXT: .Lcfi4:
; AVX512F-32-NEXT: .cfi_def_cfa_offset 64
; AVX512F-32-NEXT: vpcmpeqb %zmm1, %zmm0, %k0
; AVX512F-32-NEXT: kmovq %k0, {{[0-9]+}}(%esp)
@ -1758,17 +1753,12 @@ define i64 @test_mask_cmp_b_512(<64 x i8> %a0, <64 x i8> %a1, i64 %mask) {
; AVX512F-32-LABEL: test_mask_cmp_b_512:
; AVX512F-32: # BB#0:
; AVX512F-32-NEXT: pushl %ebx
; AVX512F-32-NEXT: .Lcfi5:
; AVX512F-32-NEXT: .cfi_def_cfa_offset 8
; AVX512F-32-NEXT: pushl %esi
; AVX512F-32-NEXT: .Lcfi6:
; AVX512F-32-NEXT: .cfi_def_cfa_offset 12
; AVX512F-32-NEXT: subl $60, %esp
; AVX512F-32-NEXT: .Lcfi7:
; AVX512F-32-NEXT: .cfi_def_cfa_offset 72
; AVX512F-32-NEXT: .Lcfi8:
; AVX512F-32-NEXT: .cfi_offset %esi, -12
; AVX512F-32-NEXT: .Lcfi9:
; AVX512F-32-NEXT: .cfi_offset %ebx, -8
; AVX512F-32-NEXT: vmovdqa64 %zmm1, %zmm6
; AVX512F-32-NEXT: vmovdqa64 %zmm0, %zmm5
@ -2566,7 +2556,6 @@ define i64 @test_ucmp_b_512(<64 x i8> %a0, <64 x i8> %a1) {
; AVX512F-32-LABEL: test_ucmp_b_512:
; AVX512F-32: # BB#0:
; AVX512F-32-NEXT: subl $60, %esp
; AVX512F-32-NEXT: .Lcfi10:
; AVX512F-32-NEXT: .cfi_def_cfa_offset 64
; AVX512F-32-NEXT: vpcmpeqb %zmm1, %zmm0, %k0
; AVX512F-32-NEXT: kmovq %k0, {{[0-9]+}}(%esp)
@ -2648,17 +2637,12 @@ define i64 @test_mask_x86_avx512_ucmp_b_512(<64 x i8> %a0, <64 x i8> %a1, i64 %m
; AVX512F-32-LABEL: test_mask_x86_avx512_ucmp_b_512:
; AVX512F-32: # BB#0:
; AVX512F-32-NEXT: pushl %ebx
; AVX512F-32-NEXT: .Lcfi11:
; AVX512F-32-NEXT: .cfi_def_cfa_offset 8
; AVX512F-32-NEXT: pushl %esi
; AVX512F-32-NEXT: .Lcfi12:
; AVX512F-32-NEXT: .cfi_def_cfa_offset 12
; AVX512F-32-NEXT: subl $60, %esp
; AVX512F-32-NEXT: .Lcfi13:
; AVX512F-32-NEXT: .cfi_def_cfa_offset 72
; AVX512F-32-NEXT: .Lcfi14:
; AVX512F-32-NEXT: .cfi_offset %esi, -12
; AVX512F-32-NEXT: .Lcfi15:
; AVX512F-32-NEXT: .cfi_offset %ebx, -8
; AVX512F-32-NEXT: vmovdqa64 %zmm1, %zmm6
; AVX512F-32-NEXT: vmovdqa64 %zmm0, %zmm5

4
llvm/test/CodeGen/X86/avx512bw-intrinsics.ll
View File

@ -1491,7 +1491,6 @@ define i64@test_int_x86_avx512_kunpck_qd(i64 %x0, i64 %x1) {
; AVX512F-32-LABEL: test_int_x86_avx512_kunpck_qd:
; AVX512F-32: # BB#0:
; AVX512F-32-NEXT: subl $12, %esp
; AVX512F-32-NEXT: .Lcfi0:
; AVX512F-32-NEXT: .cfi_def_cfa_offset 16
; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k0
; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k1
@ -1517,7 +1516,6 @@ define i64@test_int_x86_avx512_cvtb2mask_512(<64 x i8> %x0) {
; AVX512F-32-LABEL: test_int_x86_avx512_cvtb2mask_512:
; AVX512F-32: # BB#0:
; AVX512F-32-NEXT: subl $12, %esp
; AVX512F-32-NEXT: .Lcfi1:
; AVX512F-32-NEXT: .cfi_def_cfa_offset 16
; AVX512F-32-NEXT: vpmovb2m %zmm0, %k0
; AVX512F-32-NEXT: kmovq %k0, (%esp)
@ -1701,7 +1699,6 @@ define i64@test_int_x86_avx512_ptestm_b_512(<64 x i8> %x0, <64 x i8> %x1, i64 %x
; AVX512F-32-LABEL: test_int_x86_avx512_ptestm_b_512:
; AVX512F-32: # BB#0:
; AVX512F-32-NEXT: subl $20, %esp
; AVX512F-32-NEXT: .Lcfi2:
; AVX512F-32-NEXT: .cfi_def_cfa_offset 24
; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k0
; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k1
@ -1766,7 +1763,6 @@ define i64@test_int_x86_avx512_ptestnm_b_512(<64 x i8> %x0, <64 x i8> %x1, i64 %
; AVX512F-32-LABEL: test_int_x86_avx512_ptestnm_b_512:
; AVX512F-32: # BB#0:
; AVX512F-32-NEXT: subl $20, %esp
; AVX512F-32-NEXT: .Lcfi3:
; AVX512F-32-NEXT: .cfi_def_cfa_offset 24
; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k0
; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k1

30
llvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
View File

@ -225,7 +225,6 @@ define <2 x i64> @test_mm_mask_broadcastd_epi32(<2 x i64> %a0, i8 %a1, <2 x i64>
; X32-LABEL: test_mm_mask_broadcastd_epi32:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi0:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -258,7 +257,6 @@ define <2 x i64> @test_mm_maskz_broadcastd_epi32(i8 %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_maskz_broadcastd_epi32:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi1:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -363,7 +361,6 @@ define <2 x i64> @test_mm_mask_broadcastq_epi64(<2 x i64> %a0, i8 %a1, <2 x i64>
; X32-LABEL: test_mm_mask_broadcastq_epi64:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi2:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $3, %al
@ -393,7 +390,6 @@ define <2 x i64> @test_mm_maskz_broadcastq_epi64(i8 %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_maskz_broadcastq_epi64:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi3:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $3, %al
@ -437,7 +433,6 @@ define <4 x i64> @test_mm256_mask_broadcastq_epi64(<4 x i64> %a0, i8 %a1, <2 x i
; X32-LABEL: test_mm256_mask_broadcastq_epi64:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi4:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -467,7 +462,6 @@ define <4 x i64> @test_mm256_maskz_broadcastq_epi64(i8 %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm256_maskz_broadcastq_epi64:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi5:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -511,7 +505,6 @@ define <2 x double> @test_mm_mask_broadcastsd_pd(<2 x double> %a0, i8 %a1, <2 x
; X32-LABEL: test_mm_mask_broadcastsd_pd:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi6:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $3, %al
@ -541,7 +534,6 @@ define <2 x double> @test_mm_maskz_broadcastsd_pd(i8 %a0, <2 x double> %a1) {
; X32-LABEL: test_mm_maskz_broadcastsd_pd:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi7:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $3, %al
@ -585,7 +577,6 @@ define <4 x double> @test_mm256_mask_broadcastsd_pd(<4 x double> %a0, i8 %a1, <2
; X32-LABEL: test_mm256_mask_broadcastsd_pd:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi8:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -615,7 +606,6 @@ define <4 x double> @test_mm256_maskz_broadcastsd_pd(i8 %a0, <2 x double> %a1) {
; X32-LABEL: test_mm256_maskz_broadcastsd_pd:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi9:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -659,7 +649,6 @@ define <4 x float> @test_mm_mask_broadcastss_ps(<4 x float> %a0, i8 %a1, <4 x fl
; X32-LABEL: test_mm_mask_broadcastss_ps:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi10:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -689,7 +678,6 @@ define <4 x float> @test_mm_maskz_broadcastss_ps(i8 %a0, <4 x float> %a1) {
; X32-LABEL: test_mm_maskz_broadcastss_ps:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi11:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -785,7 +773,6 @@ define <2 x double> @test_mm_mask_movddup_pd(<2 x double> %a0, i8 %a1, <2 x doub
; X32-LABEL: test_mm_mask_movddup_pd:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi12:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $3, %al
@ -815,7 +802,6 @@ define <2 x double> @test_mm_maskz_movddup_pd(i8 %a0, <2 x double> %a1) {
; X32-LABEL: test_mm_maskz_movddup_pd:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi13:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $3, %al
@ -859,7 +845,6 @@ define <4 x double> @test_mm256_mask_movddup_pd(<4 x double> %a0, i8 %a1, <4 x d
; X32-LABEL: test_mm256_mask_movddup_pd:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi14:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -889,7 +874,6 @@ define <4 x double> @test_mm256_maskz_movddup_pd(i8 %a0, <4 x double> %a1) {
; X32-LABEL: test_mm256_maskz_movddup_pd:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi15:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -933,7 +917,6 @@ define <4 x float> @test_mm_mask_movehdup_ps(<4 x float> %a0, i8 %a1, <4 x float
; X32-LABEL: test_mm_mask_movehdup_ps:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi16:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -963,7 +946,6 @@ define <4 x float> @test_mm_maskz_movehdup_ps(i8 %a0, <4 x float> %a1) {
; X32-LABEL: test_mm_maskz_movehdup_ps:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi17:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -1059,7 +1041,6 @@ define <4 x float> @test_mm_mask_moveldup_ps(<4 x float> %a0, i8 %a1, <4 x float
; X32-LABEL: test_mm_mask_moveldup_ps:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi18:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -1089,7 +1070,6 @@ define <4 x float> @test_mm_maskz_moveldup_ps(i8 %a0, <4 x float> %a1) {
; X32-LABEL: test_mm_maskz_moveldup_ps:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi19:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -1185,7 +1165,6 @@ define <4 x i64> @test_mm256_mask_permutex_epi64(<4 x i64> %a0, i8 %a1, <4 x i64
; X32-LABEL: test_mm256_mask_permutex_epi64:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi20:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -1215,7 +1194,6 @@ define <4 x i64> @test_mm256_maskz_permutex_epi64(i8 %a0, <4 x i64> %a1) {
; X32-LABEL: test_mm256_maskz_permutex_epi64:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi21:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -1259,7 +1237,6 @@ define <4 x double> @test_mm256_mask_permutex_pd(<4 x double> %a0, i8 %a1, <4 x
; X32-LABEL: test_mm256_mask_permutex_pd:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi22:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -1289,7 +1266,6 @@ define <4 x double> @test_mm256_maskz_permutex_pd(i8 %a0, <4 x double> %a1) {
; X32-LABEL: test_mm256_maskz_permutex_pd:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi23:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -1333,7 +1309,6 @@ define <2 x double> @test_mm_mask_shuffle_pd(<2 x double> %a0, i8 %a1, <2 x doub
; X32-LABEL: test_mm_mask_shuffle_pd:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi24:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $3, %al
@ -1363,7 +1338,6 @@ define <2 x double> @test_mm_maskz_shuffle_pd(i8 %a0, <2 x double> %a1, <2 x dou
; X32-LABEL: test_mm_maskz_shuffle_pd:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi25:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $3, %al
@ -1407,7 +1381,6 @@ define <4 x double> @test_mm256_mask_shuffle_pd(<4 x double> %a0, i8 %a1, <4 x d
; X32-LABEL: test_mm256_mask_shuffle_pd:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi26:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -1437,7 +1410,6 @@ define <4 x double> @test_mm256_maskz_shuffle_pd(i8 %a0, <4 x double> %a1, <4 x
; X32-LABEL: test_mm256_maskz_shuffle_pd:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi27:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -1481,7 +1453,6 @@ define <4 x float> @test_mm_mask_shuffle_ps(<4 x float> %a0, i8 %a1, <4 x float>
; X32-LABEL: test_mm_mask_shuffle_ps:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi28:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al
@ -1511,7 +1482,6 @@ define <4 x float> @test_mm_maskz_shuffle_ps(i8 %a0, <4 x float> %a1, <4 x float
; X32-LABEL: test_mm_maskz_shuffle_ps:
; X32: # BB#0:
; X32-NEXT: pushl %eax
; X32-NEXT: .Lcfi29:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $15, %al

3
llvm/test/CodeGen/X86/avx512vl-vbroadcast.ll
View File

@ -6,7 +6,6 @@ define <8 x float> @_256_broadcast_ss_spill(float %x) {
; CHECK-LABEL: _256_broadcast_ss_spill:
; CHECK: # BB#0:
; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: vaddss %xmm0, %xmm0, %xmm0
; CHECK-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
@ -25,7 +24,6 @@ define <4 x float> @_128_broadcast_ss_spill(float %x) {
; CHECK-LABEL: _128_broadcast_ss_spill:
; CHECK: # BB#0:
; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .Lcfi1:
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: vaddss %xmm0, %xmm0, %xmm0
; CHECK-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
@ -45,7 +43,6 @@ define <4 x double> @_256_broadcast_sd_spill(double %x) {
; CHECK-LABEL: _256_broadcast_sd_spill:
; CHECK: # BB#0:
; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .Lcfi2:
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: vaddsd %xmm0, %xmm0, %xmm0
; CHECK-NEXT: vmovapd %xmm0, (%rsp) # 16-byte Spill

2084
llvm/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll
View File

File diff suppressed because it is too large Load Diff

12
llvm/test/CodeGen/X86/bitcast-and-setcc-512.ll
View File

@ -312,12 +312,9 @@ define i32 @v32i16(<32 x i16> %a, <32 x i16> %b, <32 x i16> %c, <32 x i16> %d) {
; AVX512F-LABEL: v32i16:
; AVX512F: # BB#0:
; AVX512F-NEXT: pushq %rbp
; AVX512F-NEXT: .Lcfi0:
; AVX512F-NEXT: .cfi_def_cfa_offset 16
; AVX512F-NEXT: .Lcfi1:
; AVX512F-NEXT: .cfi_offset %rbp, -16
; AVX512F-NEXT: movq %rsp, %rbp
; AVX512F-NEXT: .Lcfi2:
; AVX512F-NEXT: .cfi_def_cfa_register %rbp
; AVX512F-NEXT: andq $-32, %rsp
; AVX512F-NEXT: subq $32, %rsp
@ -1050,12 +1047,9 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8> %b, <64 x i8> %c, <64 x i8> %d) {
; AVX1-LABEL: v64i8:
; AVX1: # BB#0:
; AVX1-NEXT: pushq %rbp
; AVX1-NEXT: .Lcfi0:
; AVX1-NEXT: .cfi_def_cfa_offset 16
; AVX1-NEXT: .Lcfi1:
; AVX1-NEXT: .cfi_offset %rbp, -16
; AVX1-NEXT: movq %rsp, %rbp
; AVX1-NEXT: .Lcfi2:
; AVX1-NEXT: .cfi_def_cfa_register %rbp
; AVX1-NEXT: andq $-32, %rsp
; AVX1-NEXT: subq $64, %rsp
@ -1287,12 +1281,9 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8> %b, <64 x i8> %c, <64 x i8> %d) {
; AVX2-LABEL: v64i8:
; AVX2: # BB#0:
; AVX2-NEXT: pushq %rbp
; AVX2-NEXT: .Lcfi0:
; AVX2-NEXT: .cfi_def_cfa_offset 16
; AVX2-NEXT: .Lcfi1:
; AVX2-NEXT: .cfi_offset %rbp, -16
; AVX2-NEXT: movq %rsp, %rbp
; AVX2-NEXT: .Lcfi2:
; AVX2-NEXT: .cfi_def_cfa_register %rbp
; AVX2-NEXT: andq $-32, %rsp
; AVX2-NEXT: subq $64, %rsp
@ -1508,12 +1499,9 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8> %b, <64 x i8> %c, <64 x i8> %d) {
; AVX512F-LABEL: v64i8:
; AVX512F: # BB#0:
; AVX512F-NEXT: pushq %rbp
; AVX512F-NEXT: .Lcfi3:
; AVX512F-NEXT: .cfi_def_cfa_offset 16
; AVX512F-NEXT: .Lcfi4:
; AVX512F-NEXT: .cfi_offset %rbp, -16
; AVX512F-NEXT: movq %rsp, %rbp
; AVX512F-NEXT: .Lcfi5:
; AVX512F-NEXT: .cfi_def_cfa_register %rbp
; AVX512F-NEXT: andq $-32, %rsp
; AVX512F-NEXT: subq $64, %rsp

12
llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
View File

@ -238,34 +238,22 @@ define <16 x i8> @ext_i16_16i8(i16 %a0) {
; AVX512-LABEL: ext_i16_16i8:
; AVX512: # BB#0:
; AVX512-NEXT: pushq %rbp
; AVX512-NEXT: .Lcfi0:
; AVX512-NEXT: .cfi_def_cfa_offset 16
; AVX512-NEXT: pushq %r15
; AVX512-NEXT: .Lcfi1:
; AVX512-NEXT: .cfi_def_cfa_offset 24
; AVX512-NEXT: pushq %r14
; AVX512-NEXT: .Lcfi2:
; AVX512-NEXT: .cfi_def_cfa_offset 32
; AVX512-NEXT: pushq %r13
; AVX512-NEXT: .Lcfi3:
; AVX512-NEXT: .cfi_def_cfa_offset 40
; AVX512-NEXT: pushq %r12
; AVX512-NEXT: .Lcfi4:
; AVX512-NEXT: .cfi_def_cfa_offset 48
; AVX512-NEXT: pushq %rbx
; AVX512-NEXT: .Lcfi5:
; AVX512-NEXT: .cfi_def_cfa_offset 56
; AVX512-NEXT: .Lcfi6:
; AVX512-NEXT: .cfi_offset %rbx, -56
; AVX512-NEXT: .Lcfi7:
; AVX512-NEXT: .cfi_offset %r12, -48
; AVX512-NEXT: .Lcfi8:
; AVX512-NEXT: .cfi_offset %r13, -40
; AVX512-NEXT: .Lcfi9:
; AVX512-NEXT: .cfi_offset %r14, -32
; AVX512-NEXT: .Lcfi10:
; AVX512-NEXT: .cfi_offset %r15, -24
; AVX512-NEXT: .Lcfi11:
; AVX512-NEXT: .cfi_offset %rbp, -16
; AVX512-NEXT: kmovd %edi, %k0
; AVX512-NEXT: kshiftlw $14, %k0, %k1

12
llvm/test/CodeGen/X86/bitcast-setcc-512.ll
View File

@ -52,12 +52,9 @@ define i32 @v32i16(<32 x i16> %a, <32 x i16> %b) {
; AVX512F-LABEL: v32i16:
; AVX512F: # BB#0:
; AVX512F-NEXT: pushq %rbp
; AVX512F-NEXT: .Lcfi0:
; AVX512F-NEXT: .cfi_def_cfa_offset 16
; AVX512F-NEXT: .Lcfi1:
; AVX512F-NEXT: .cfi_offset %rbp, -16
; AVX512F-NEXT: movq %rsp, %rbp
; AVX512F-NEXT: .Lcfi2:
; AVX512F-NEXT: .cfi_def_cfa_register %rbp
; AVX512F-NEXT: andq $-32, %rsp
; AVX512F-NEXT: subq $32, %rsp
@ -560,12 +557,9 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8> %b) {
; AVX1-LABEL: v64i8:
; AVX1: # BB#0:
; AVX1-NEXT: pushq %rbp
; AVX1-NEXT: .Lcfi0:
; AVX1-NEXT: .cfi_def_cfa_offset 16
; AVX1-NEXT: .Lcfi1:
; AVX1-NEXT: .cfi_offset %rbp, -16
; AVX1-NEXT: movq %rsp, %rbp
; AVX1-NEXT: .Lcfi2:
; AVX1-NEXT: .cfi_def_cfa_register %rbp
; AVX1-NEXT: andq $-32, %rsp
; AVX1-NEXT: subq $64, %rsp
@ -781,12 +775,9 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8> %b) {
; AVX2-LABEL: v64i8:
; AVX2: # BB#0:
; AVX2-NEXT: pushq %rbp
; AVX2-NEXT: .Lcfi0:
; AVX2-NEXT: .cfi_def_cfa_offset 16
; AVX2-NEXT: .Lcfi1:
; AVX2-NEXT: .cfi_offset %rbp, -16
; AVX2-NEXT: movq %rsp, %rbp
; AVX2-NEXT: .Lcfi2:
; AVX2-NEXT: .cfi_def_cfa_register %rbp
; AVX2-NEXT: andq $-32, %rsp
; AVX2-NEXT: subq $64, %rsp
@ -998,12 +989,9 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8> %b) {
; AVX512F-LABEL: v64i8:
; AVX512F: # BB#0:
; AVX512F-NEXT: pushq %rbp
; AVX512F-NEXT: .Lcfi3:
; AVX512F-NEXT: .cfi_def_cfa_offset 16
; AVX512F-NEXT: .Lcfi4:
; AVX512F-NEXT: .cfi_offset %rbp, -16
; AVX512F-NEXT: movq %rsp, %rbp
; AVX512F-NEXT: .Lcfi5:
; AVX512F-NEXT: .cfi_def_cfa_register %rbp
; AVX512F-NEXT: andq $-32, %rsp
; AVX512F-NEXT: subq $64, %rsp

6
llvm/test/CodeGen/X86/bool-vector.ll
View File

@ -79,9 +79,7 @@ define i32 @PR15215_good(<4 x i32> %input) {
; X32-LABEL: PR15215_good:
; X32: # BB#0: # %entry
; X32-NEXT: pushl %esi
; X32-NEXT: .Lcfi0:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: .Lcfi1:
; X32-NEXT: .cfi_offset %esi, -8
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: andl $1, %eax
@ -100,9 +98,7 @@ define i32 @PR15215_good(<4 x i32> %input) {
; X32-SSE2-LABEL: PR15215_good:
; X32-SSE2: # BB#0: # %entry
; X32-SSE2-NEXT: pushl %esi
; X32-SSE2-NEXT: .Lcfi0:
; X32-SSE2-NEXT: .cfi_def_cfa_offset 8
; X32-SSE2-NEXT: .Lcfi1:
; X32-SSE2-NEXT: .cfi_offset %esi, -8
; X32-SSE2-NEXT: movd %xmm0, %eax
; X32-SSE2-NEXT: andl $1, %eax
@ -124,9 +120,7 @@ define i32 @PR15215_good(<4 x i32> %input) {
; X32-AVX2-LABEL: PR15215_good:
; X32-AVX2: # BB#0: # %entry
; X32-AVX2-NEXT: pushl %esi
; X32-AVX2-NEXT: .Lcfi0:
; X32-AVX2-NEXT: .cfi_def_cfa_offset 8
; X32-AVX2-NEXT: .Lcfi1:
; X32-AVX2-NEXT: .cfi_offset %esi, -8
; X32-AVX2-NEXT: vmovd %xmm0, %eax
; X32-AVX2-NEXT: andl $1, %eax

1
llvm/test/CodeGen/X86/cmp.ll
View File

@ -238,7 +238,6 @@ define i32 @test12() ssp uwtable {
; CHECK-LABEL: test12:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: pushq %rax # encoding: [0x50]
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: callq test12b # encoding: [0xe8,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 1, value: test12b-4, kind: FK_PCRel_4

1
llvm/test/CodeGen/X86/deopt-intrinsic-cconv.ll
View File

@ -12,7 +12,6 @@ define i64 @caller_1() {
; CHECK-NEXT: {{.+cfi.+}}
; CHECK-NEXT: ##{{.+}}
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: {{Lcfi[0-9]+}}:
; CHECK-NEXT: {{.+cfi.+}}
; CHECK-NEXT: movl $1140457472, (%rsp) ## imm = 0x43FA0000
; CHECK-NEXT: movl $42, %eax

2
llvm/test/CodeGen/X86/deopt-intrinsic.ll
View File

@ -13,7 +13,6 @@ define i32 @caller_0() {
; CHECK-NEXT: {{.+cfi.+}}
; CHECK-NEXT: ##{{.+}}
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: {{Lcfi[0-9]+}}:
; CHECK-NEXT: {{.+cfi.+}}
; CHECK-NEXT: callq ___llvm_deoptimize
; CHECK-NEXT: {{Ltmp[0-9]+}}:
@ -27,7 +26,6 @@ define i8 @caller_1() {
; CHECK-NEXT: {{.+cfi.+}}
; CHECK-NEXT: ##{{.+}}
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: {{Lcfi[0-9]+}}:
; CHECK-NEXT: {{.+cfi.+}}
; CHECK-NEXT: movss {{[a-zA-Z0-9_]+}}(%rip), %xmm0 ## xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: movl $42, %edi

4
llvm/test/CodeGen/X86/empty-functions.ll
View File

@ -18,9 +18,7 @@ entry:
; CHECK-FP-NEXT: .cfi_startproc
; CHECK-FP-NEXT: :
; CHECK-FP-NEXT: pushq %rbp
; CHECK-FP-NEXT: :
; CHECK-FP-NEXT: .cfi_def_cfa_offset 16
; CHECK-FP-NEXT: :
; CHECK-FP-NEXT: .cfi_offset %rbp, -16
; CHECK-FP-NEXT: movq %rsp, %rbp
; CHECK-FP-NEXT: .cfi_endproc
@ -38,9 +36,7 @@ entry:
; LINUX-FP-NEXT: .cfi_startproc
; LINUX-FP-NEXT: {{^}}#
; LINUX-FP-NEXT: pushq %rbp
; LINUX-FP-NEXT: {{^}}.L{{.*}}:{{$}}
; LINUX-FP-NEXT: .cfi_def_cfa_offset 16
; LINUX-FP-NEXT: {{^}}.L{{.*}}:{{$}}
; LINUX-FP-NEXT: .cfi_offset %rbp, -16
; LINUX-FP-NEXT: movq %rsp, %rbp
; LINUX-FP-NEXT:{{^}}.L{{.*}}:{{$}}

14
llvm/test/CodeGen/X86/fast-isel-store.ll
View File

@ -368,7 +368,6 @@ define <4 x double> @test_store_4xf64(<4 x double>* nocapture %addr, <4 x double
; SSE64-LABEL: test_store_4xf64:
; SSE64: # BB#0:
; SSE64-NEXT: subl $12, %esp
; SSE64-NEXT: .Lcfi0:
; SSE64-NEXT: .cfi_def_cfa_offset 16
; SSE64-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE64-NEXT: addpd {{[0-9]+}}(%esp), %xmm1
@ -407,7 +406,6 @@ define <4 x double> @test_store_4xf64_aligned(<4 x double>* nocapture %addr, <4
; SSE64-LABEL: test_store_4xf64_aligned:
; SSE64: # BB#0:
; SSE64-NEXT: subl $12, %esp
; SSE64-NEXT: .Lcfi1:
; SSE64-NEXT: .cfi_def_cfa_offset 16
; SSE64-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE64-NEXT: addpd {{[0-9]+}}(%esp), %xmm1
@ -446,7 +444,6 @@ define <16 x i32> @test_store_16xi32(<16 x i32>* nocapture %addr, <16 x i32> %va
; SSE64-LABEL: test_store_16xi32:
; SSE64: # BB#0:
; SSE64-NEXT: subl $12, %esp
; SSE64-NEXT: .Lcfi2:
; SSE64-NEXT: .cfi_def_cfa_offset 16
; SSE64-NEXT: movaps {{[0-9]+}}(%esp), %xmm3
; SSE64-NEXT: movl {{[0-9]+}}(%esp), %eax
@ -496,7 +493,6 @@ define <16 x i32> @test_store_16xi32_aligned(<16 x i32>* nocapture %addr, <16 x
; SSE64-LABEL: test_store_16xi32_aligned:
; SSE64: # BB#0:
; SSE64-NEXT: subl $12, %esp
; SSE64-NEXT: .Lcfi3:
; SSE64-NEXT: .cfi_def_cfa_offset 16
; SSE64-NEXT: movaps {{[0-9]+}}(%esp), %xmm3
; SSE64-NEXT: movl {{[0-9]+}}(%esp), %eax
@ -546,7 +542,6 @@ define <16 x float> @test_store_16xf32(<16 x float>* nocapture %addr, <16 x floa
; SSE64-LABEL: test_store_16xf32:
; SSE64: # BB#0:
; SSE64-NEXT: subl $12, %esp
; SSE64-NEXT: .Lcfi4:
; SSE64-NEXT: .cfi_def_cfa_offset 16
; SSE64-NEXT: movaps {{[0-9]+}}(%esp), %xmm3
; SSE64-NEXT: movl {{[0-9]+}}(%esp), %eax
@ -596,7 +591,6 @@ define <16 x float> @test_store_16xf32_aligned(<16 x float>* nocapture %addr, <1
; SSE64-LABEL: test_store_16xf32_aligned:
; SSE64: # BB#0:
; SSE64-NEXT: subl $12, %esp
; SSE64-NEXT: .Lcfi5:
; SSE64-NEXT: .cfi_def_cfa_offset 16
; SSE64-NEXT: movaps {{[0-9]+}}(%esp), %xmm3
; SSE64-NEXT: movl {{[0-9]+}}(%esp), %eax
@ -650,7 +644,6 @@ define <8 x double> @test_store_8xf64(<8 x double>* nocapture %addr, <8 x double
; SSE64-LABEL: test_store_8xf64:
; SSE64: # BB#0:
; SSE64-NEXT: subl $12, %esp
; SSE64-NEXT: .Lcfi6:
; SSE64-NEXT: .cfi_def_cfa_offset 16
; SSE64-NEXT: movapd {{[0-9]+}}(%esp), %xmm3
; SSE64-NEXT: movl {{[0-9]+}}(%esp), %eax
@ -676,12 +669,9 @@ define <8 x double> @test_store_8xf64(<8 x double>* nocapture %addr, <8 x double
; AVXONLY64-LABEL: test_store_8xf64:
; AVXONLY64: # BB#0:
; AVXONLY64-NEXT: pushl %ebp
; AVXONLY64-NEXT: .Lcfi0:
; AVXONLY64-NEXT: .cfi_def_cfa_offset 8
; AVXONLY64-NEXT: .Lcfi1:
; AVXONLY64-NEXT: .cfi_offset %ebp, -8
; AVXONLY64-NEXT: movl %esp, %ebp
; AVXONLY64-NEXT: .Lcfi2:
; AVXONLY64-NEXT: .cfi_def_cfa_register %ebp
; AVXONLY64-NEXT: andl $-32, %esp
; AVXONLY64-NEXT: subl $32, %esp
@ -727,7 +717,6 @@ define <8 x double> @test_store_8xf64_aligned(<8 x double>* nocapture %addr, <8
; SSE64-LABEL: test_store_8xf64_aligned:
; SSE64: # BB#0:
; SSE64-NEXT: subl $12, %esp
; SSE64-NEXT: .Lcfi7:
; SSE64-NEXT: .cfi_def_cfa_offset 16
; SSE64-NEXT: movapd {{[0-9]+}}(%esp), %xmm3
; SSE64-NEXT: movl {{[0-9]+}}(%esp), %eax
@ -753,12 +742,9 @@ define <8 x double> @test_store_8xf64_aligned(<8 x double>* nocapture %addr, <8
; AVXONLY64-LABEL: test_store_8xf64_aligned:
; AVXONLY64: # BB#0:
; AVXONLY64-NEXT: pushl %ebp
; AVXONLY64-NEXT: .Lcfi3:
; AVXONLY64-NEXT: .cfi_def_cfa_offset 8
; AVXONLY64-NEXT: .Lcfi4:
; AVXONLY64-NEXT: .cfi_offset %ebp, -8
; AVXONLY64-NEXT: movl %esp, %ebp
; AVXONLY64-NEXT: .Lcfi5:
; AVXONLY64-NEXT: .cfi_def_cfa_register %ebp
; AVXONLY64-NEXT: andl $-32, %esp
; AVXONLY64-NEXT: subl $32, %esp

24
llvm/test/CodeGen/X86/haddsub-2.ll
View File

@ -624,34 +624,22 @@ define <16 x i16> @avx2_vphadd_w_test(<16 x i16> %a, <16 x i16> %b) {
; SSE3-LABEL: avx2_vphadd_w_test:
; SSE3: # BB#0:
; SSE3-NEXT: pushq %rbp
; SSE3-NEXT: .Lcfi0:
; SSE3-NEXT: .cfi_def_cfa_offset 16
; SSE3-NEXT: pushq %r15
; SSE3-NEXT: .Lcfi1:
; SSE3-NEXT: .cfi_def_cfa_offset 24
; SSE3-NEXT: pushq %r14
; SSE3-NEXT: .Lcfi2:
; SSE3-NEXT: .cfi_def_cfa_offset 32
; SSE3-NEXT: pushq %r13
; SSE3-NEXT: .Lcfi3:
; SSE3-NEXT: .cfi_def_cfa_offset 40
; SSE3-NEXT: pushq %r12
; SSE3-NEXT: .Lcfi4:
; SSE3-NEXT: .cfi_def_cfa_offset 48
; SSE3-NEXT: pushq %rbx
; SSE3-NEXT: .Lcfi5:
; SSE3-NEXT: .cfi_def_cfa_offset 56
; SSE3-NEXT: .Lcfi6:
; SSE3-NEXT: .cfi_offset %rbx, -56
; SSE3-NEXT: .Lcfi7:
; SSE3-NEXT: .cfi_offset %r12, -48
; SSE3-NEXT: .Lcfi8:
; SSE3-NEXT: .cfi_offset %r13, -40
; SSE3-NEXT: .Lcfi9:
; SSE3-NEXT: .cfi_offset %r14, -32
; SSE3-NEXT: .Lcfi10:
; SSE3-NEXT: .cfi_offset %r15, -24
; SSE3-NEXT: .Lcfi11:
; SSE3-NEXT: .cfi_offset %rbp, -16
; SSE3-NEXT: movd %xmm0, %eax
; SSE3-NEXT: pextrw $1, %xmm0, %ecx
@ -1263,34 +1251,22 @@ define <16 x i16> @avx2_hadd_w(<16 x i16> %a, <16 x i16> %b) {
; SSE3-LABEL: avx2_hadd_w:
; SSE3: # BB#0:
; SSE3-NEXT: pushq %rbp
; SSE3-NEXT: .Lcfi12:
; SSE3-NEXT: .cfi_def_cfa_offset 16
; SSE3-NEXT: pushq %r15
; SSE3-NEXT: .Lcfi13:
; SSE3-NEXT: .cfi_def_cfa_offset 24
; SSE3-NEXT: pushq %r14
; SSE3-NEXT: .Lcfi14:
; SSE3-NEXT: .cfi_def_cfa_offset 32
; SSE3-NEXT: pushq %r13
; SSE3-NEXT: .Lcfi15:
; SSE3-NEXT: .cfi_def_cfa_offset 40
; SSE3-NEXT: pushq %r12
; SSE3-NEXT: .Lcfi16:
; SSE3-NEXT: .cfi_def_cfa_offset 48
; SSE3-NEXT: pushq %rbx
; SSE3-NEXT: .Lcfi17:
; SSE3-NEXT: .cfi_def_cfa_offset 56
; SSE3-NEXT: .Lcfi18:
; SSE3-NEXT: .cfi_offset %rbx, -56
; SSE3-NEXT: .Lcfi19:
; SSE3-NEXT: .cfi_offset %r12, -48
; SSE3-NEXT: .Lcfi20:
; SSE3-NEXT: .cfi_offset %r13, -40
; SSE3-NEXT: .Lcfi21:
; SSE3-NEXT: .cfi_offset %r14, -32
; SSE3-NEXT: .Lcfi22:
; SSE3-NEXT: .cfi_offset %r15, -24
; SSE3-NEXT: .Lcfi23:
; SSE3-NEXT: .cfi_offset %rbp, -16
; SSE3-NEXT: movd %xmm0, %eax
; SSE3-NEXT: pextrw $1, %xmm0, %r10d

2
llvm/test/CodeGen/X86/illegal-bitfield-loadstore.ll
View File

@ -67,9 +67,7 @@ define void @i24_insert_bit(i24* %a, i1 zeroext %bit) {
; X86-LABEL: i24_insert_bit:
; X86: # BB#0:
; X86-NEXT: pushl %esi
; X86-NEXT: .Lcfi0:
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .Lcfi1:
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edx

6
llvm/test/CodeGen/X86/imul.ll
View File

@ -294,9 +294,7 @@ define i64 @test5(i64 %a) {
; X86-LABEL: test5:
; X86: # BB#0: # %entry
; X86-NEXT: pushl %esi
; X86-NEXT: .Lcfi0:
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .Lcfi1:
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@ -351,9 +349,7 @@ define i64 @test7(i64 %a) {
; X86-LABEL: test7:
; X86: # BB#0: # %entry
; X86-NEXT: pushl %esi
; X86-NEXT: .Lcfi2:
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .Lcfi3:
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@ -382,9 +378,7 @@ define i64 @testOverflow(i64 %a) {
; X86-LABEL: testOverflow:
; X86: # BB#0: # %entry
; X86-NEXT: pushl %esi
; X86-NEXT: .Lcfi4:
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .Lcfi5:
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $-1, %edx

3
llvm/test/CodeGen/X86/inline-asm-fpstack.ll
View File

@ -156,7 +156,6 @@ define void @testPR4459(x86_fp80 %a) {
; CHECK-LABEL: testPR4459:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: subl $28, %esp
; CHECK-NEXT: Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
; CHECK-NEXT: fstpt (%esp)
@ -185,7 +184,6 @@ define void @testPR4484(x86_fp80 %a) {
; CHECK-LABEL: testPR4484:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: subl $28, %esp
; CHECK-NEXT: Lcfi1:
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
; CHECK-NEXT: fstpt {{[0-9]+}}(%esp) ## 10-byte Folded Spill
@ -454,7 +452,6 @@ define void @test_live_st(i32 %a1) {
; CHECK-LABEL: test_live_st:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: subl $12, %esp
; CHECK-NEXT: Lcfi2:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: fldt (%eax)
; CHECK-NEXT: cmpl $1, {{[0-9]+}}(%esp)

2
llvm/test/CodeGen/X86/lea-opt-cse1.ll
View File

@ -19,9 +19,7 @@ define void @test_func(%struct.SA* nocapture %ctx, i32 %n) local_unnamed_addr {
; X86-LABEL: test_func:
; X86: # BB#0: # %entry
; X86-NEXT: pushl %esi
; X86-NEXT: .Lcfi0:
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .Lcfi1:
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl (%eax), %ecx

4
llvm/test/CodeGen/X86/lea-opt-cse2.ll
View File

@ -25,14 +25,10 @@ define void @foo(%struct.SA* nocapture %ctx, i32 %n) local_unnamed_addr #0 {
; X86-LABEL: foo:
; X86: # BB#0: # %entry
; X86-NEXT: pushl %edi
; X86-NEXT: .Lcfi0:
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: pushl %esi
; X86-NEXT: .Lcfi1:
; X86-NEXT: .cfi_def_cfa_offset 12
; X86-NEXT: .Lcfi2:
; X86-NEXT: .cfi_offset %esi, -12
; X86-NEXT: .Lcfi3:
; X86-NEXT: .cfi_offset %edi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax

4
llvm/test/CodeGen/X86/lea-opt-cse3.ll
View File

@ -77,9 +77,7 @@ define i32 @foo1_mult_basic_blocks(i32 %a, i32 %b) local_unnamed_addr #0 {
; X86-LABEL: foo1_mult_basic_blocks:
; X86: # BB#0: # %entry
; X86-NEXT: pushl %esi
; X86-NEXT: .Lcfi0:
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .Lcfi1:
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
@ -131,9 +129,7 @@ define i32 @foo1_mult_basic_blocks_illegal_scale(i32 %a, i32 %b) local_unnamed_a
; X86-LABEL: foo1_mult_basic_blocks_illegal_scale:
; X86: # BB#0: # %entry
; X86-NEXT: pushl %esi
; X86-NEXT: .Lcfi2:
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .Lcfi3:
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi

6
llvm/test/CodeGen/X86/lea-opt-cse4.ll
View File

@ -22,9 +22,7 @@ define void @foo(%struct.SA* nocapture %ctx, i32 %n) local_unnamed_addr #0 {
; X86-LABEL: foo:
; X86: # BB#0: # %entry
; X86-NEXT: pushl %esi
; X86-NEXT: .Lcfi0:
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .Lcfi1:
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl 16(%eax), %ecx
@ -85,14 +83,10 @@ define void @foo_loop(%struct.SA* nocapture %ctx, i32 %n) local_unnamed_addr #0
; X86-LABEL: foo_loop:
; X86: # BB#0: # %entry
; X86-NEXT: pushl %edi
; X86-NEXT: .Lcfi2:
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: pushl %esi
; X86-NEXT: .Lcfi3:
; X86-NEXT: .cfi_def_cfa_offset 12
; X86-NEXT: .Lcfi4:
; X86-NEXT: .cfi_offset %esi, -12
; X86-NEXT: .Lcfi5:
; X86-NEXT: .cfi_offset %edi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax

11
llvm/test/CodeGen/X86/legalize-shift-64.ll
View File

@ -76,24 +76,16 @@ define <2 x i64> @test5(<2 x i64> %A, <2 x i64> %B) {
; CHECK-LABEL: test5:
; CHECK: # BB#0:
; CHECK-NEXT: pushl %ebp
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: .Lcfi1:
; CHECK-NEXT: .cfi_def_cfa_offset 12
; CHECK-NEXT: pushl %edi
; CHECK-NEXT: .Lcfi2:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: .Lcfi3:
; CHECK-NEXT: .cfi_def_cfa_offset 20
; CHECK-NEXT: .Lcfi4:
; CHECK-NEXT: .cfi_offset %esi, -20
; CHECK-NEXT: .Lcfi5:
; CHECK-NEXT: .cfi_offset %edi, -16
; CHECK-NEXT: .Lcfi6:
; CHECK-NEXT: .cfi_offset %ebx, -12
; CHECK-NEXT: .Lcfi7:
; CHECK-NEXT: .cfi_offset %ebp, -8
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
@ -138,12 +130,9 @@ define i32 @test6() {
; CHECK-LABEL: test6:
; CHECK: # BB#0:
; CHECK-NEXT: pushl %ebp
; CHECK-NEXT: .Lcfi8:
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: .Lcfi9:
; CHECK-NEXT: .cfi_offset %ebp, -8
; CHECK-NEXT: movl %esp, %ebp
; CHECK-NEXT: .Lcfi10:
; CHECK-NEXT: .cfi_def_cfa_register %ebp
; CHECK-NEXT: andl $-8, %esp
; CHECK-NEXT: subl $16, %esp

1
llvm/test/CodeGen/X86/live-out-reg-info.ll
View File

@ -10,7 +10,6 @@ define void @foo(i32 %a) {
; CHECK-LABEL: foo:
; CHECK: # BB#0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: shrl $23, %edi
; CHECK-NEXT: btl $8, %edi

4
llvm/test/CodeGen/X86/load-combine.ll
View File

@ -360,9 +360,7 @@ define i32 @load_i32_by_i8_bswap_uses(i32* %arg) {
; CHECK-LABEL: load_i32_by_i8_bswap_uses:
; CHECK: # BB#0:
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: .Lcfi1:
; CHECK-NEXT: .cfi_offset %esi, -8
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movzbl (%eax), %ecx
@ -482,9 +480,7 @@ define i32 @load_i32_by_i8_bswap_store_in_between(i32* %arg, i32* %arg1) {
; CHECK-LABEL: load_i32_by_i8_bswap_store_in_between:
; CHECK: # BB#0:
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: .Lcfi2:
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: .Lcfi3:
; CHECK-NEXT: .cfi_offset %esi, -8
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx

30
llvm/test/CodeGen/X86/masked_gather_scatter.ll
View File

@ -1685,12 +1685,9 @@ define <16 x i64> @test_gather_16i64(<16 x i64*> %ptrs, <16 x i1> %mask, <16 x i
; KNL_32-LABEL: test_gather_16i64:
; KNL_32: # BB#0:
; KNL_32-NEXT: pushl %ebp
; KNL_32-NEXT: .Lcfi0:
; KNL_32-NEXT: .cfi_def_cfa_offset 8
; KNL_32-NEXT: .Lcfi1:
; KNL_32-NEXT: .cfi_offset %ebp, -8
; KNL_32-NEXT: movl %esp, %ebp
; KNL_32-NEXT: .Lcfi2:
; KNL_32-NEXT: .cfi_def_cfa_register %ebp
; KNL_32-NEXT: andl $-64, %esp
; KNL_32-NEXT: subl $64, %esp
@ -1722,12 +1719,9 @@ define <16 x i64> @test_gather_16i64(<16 x i64*> %ptrs, <16 x i1> %mask, <16 x i
; SKX_32-LABEL: test_gather_16i64:
; SKX_32: # BB#0:
; SKX_32-NEXT: pushl %ebp
; SKX_32-NEXT: .Lcfi1:
; SKX_32-NEXT: .cfi_def_cfa_offset 8
; SKX_32-NEXT: .Lcfi2:
; SKX_32-NEXT: .cfi_offset %ebp, -8
; SKX_32-NEXT: movl %esp, %ebp
; SKX_32-NEXT: .Lcfi3:
; SKX_32-NEXT: .cfi_def_cfa_register %ebp
; SKX_32-NEXT: andl $-64, %esp
; SKX_32-NEXT: subl $64, %esp
@ -1808,12 +1802,9 @@ define <16 x double> @test_gather_16f64(<16 x double*> %ptrs, <16 x i1> %mask, <
; KNL_32-LABEL: test_gather_16f64:
; KNL_32: # BB#0:
; KNL_32-NEXT: pushl %ebp
; KNL_32-NEXT: .Lcfi3:
; KNL_32-NEXT: .cfi_def_cfa_offset 8
; KNL_32-NEXT: .Lcfi4:
; KNL_32-NEXT: .cfi_offset %ebp, -8
; KNL_32-NEXT: movl %esp, %ebp
; KNL_32-NEXT: .Lcfi5:
; KNL_32-NEXT: .cfi_def_cfa_register %ebp
; KNL_32-NEXT: andl $-64, %esp
; KNL_32-NEXT: subl $64, %esp
@ -1845,12 +1836,9 @@ define <16 x double> @test_gather_16f64(<16 x double*> %ptrs, <16 x i1> %mask, <
; SKX_32-LABEL: test_gather_16f64:
; SKX_32: # BB#0:
; SKX_32-NEXT: pushl %ebp
; SKX_32-NEXT: .Lcfi4:
; SKX_32-NEXT: .cfi_def_cfa_offset 8
; SKX_32-NEXT: .Lcfi5:
; SKX_32-NEXT: .cfi_offset %ebp, -8
; SKX_32-NEXT: movl %esp, %ebp
; SKX_32-NEXT: .Lcfi6:
; SKX_32-NEXT: .cfi_def_cfa_register %ebp
; SKX_32-NEXT: andl $-64, %esp
; SKX_32-NEXT: subl $64, %esp
@ -1930,12 +1918,9 @@ define void @test_scatter_16i64(<16 x i64*> %ptrs, <16 x i1> %mask, <16 x i64> %
; KNL_32-LABEL: test_scatter_16i64:
; KNL_32: # BB#0:
; KNL_32-NEXT: pushl %ebp
; KNL_32-NEXT: .Lcfi6:
; KNL_32-NEXT: .cfi_def_cfa_offset 8
; KNL_32-NEXT: .Lcfi7:
; KNL_32-NEXT: .cfi_offset %ebp, -8
; KNL_32-NEXT: movl %esp, %ebp
; KNL_32-NEXT: .Lcfi8:
; KNL_32-NEXT: .cfi_def_cfa_register %ebp
; KNL_32-NEXT: andl $-64, %esp
; KNL_32-NEXT: subl $64, %esp
@ -1966,12 +1951,9 @@ define void @test_scatter_16i64(<16 x i64*> %ptrs, <16 x i1> %mask, <16 x i64> %
; SKX_32-LABEL: test_scatter_16i64:
; SKX_32: # BB#0:
; SKX_32-NEXT: pushl %ebp
; SKX_32-NEXT: .Lcfi7:
; SKX_32-NEXT: .cfi_def_cfa_offset 8
; SKX_32-NEXT: .Lcfi8:
; SKX_32-NEXT: .cfi_offset %ebp, -8
; SKX_32-NEXT: movl %esp, %ebp
; SKX_32-NEXT: .Lcfi9:
; SKX_32-NEXT: .cfi_def_cfa_register %ebp
; SKX_32-NEXT: andl $-64, %esp
; SKX_32-NEXT: subl $64, %esp
@ -2052,12 +2034,9 @@ define void @test_scatter_16f64(<16 x double*> %ptrs, <16 x i1> %mask, <16 x dou
; KNL_32-LABEL: test_scatter_16f64:
; KNL_32: # BB#0:
; KNL_32-NEXT: pushl %ebp
; KNL_32-NEXT: .Lcfi9:
; KNL_32-NEXT: .cfi_def_cfa_offset 8
; KNL_32-NEXT: .Lcfi10:
; KNL_32-NEXT: .cfi_offset %ebp, -8
; KNL_32-NEXT: movl %esp, %ebp
; KNL_32-NEXT: .Lcfi11:
; KNL_32-NEXT: .cfi_def_cfa_register %ebp
; KNL_32-NEXT: andl $-64, %esp
; KNL_32-NEXT: subl $64, %esp
@ -2088,12 +2067,9 @@ define void @test_scatter_16f64(<16 x double*> %ptrs, <16 x i1> %mask, <16 x dou
; SKX_32-LABEL: test_scatter_16f64:
; SKX_32: # BB#0:
; SKX_32-NEXT: pushl %ebp
; SKX_32-NEXT: .Lcfi10:
; SKX_32-NEXT: .cfi_def_cfa_offset 8
; SKX_32-NEXT: .Lcfi11:
; SKX_32-NEXT: .cfi_offset %ebp, -8
; SKX_32-NEXT: movl %esp, %ebp
; SKX_32-NEXT: .Lcfi12:
; SKX_32-NEXT: .cfi_def_cfa_register %ebp
; SKX_32-NEXT: andl $-64, %esp
; SKX_32-NEXT: subl $64, %esp
@ -2132,12 +2108,9 @@ define <4 x i64> @test_pr28312(<4 x i64*> %p1, <4 x i1> %k, <4 x i1> %k2,<4 x i6
; KNL_32-LABEL: test_pr28312:
; KNL_32: # BB#0:
; KNL_32-NEXT: pushl %ebp
; KNL_32-NEXT: .Lcfi12:
; KNL_32-NEXT: .cfi_def_cfa_offset 8
; KNL_32-NEXT: .Lcfi13:
; KNL_32-NEXT: .cfi_offset %ebp, -8
; KNL_32-NEXT: movl %esp, %ebp
; KNL_32-NEXT: .Lcfi14:
; KNL_32-NEXT: .cfi_def_cfa_register %ebp
; KNL_32-NEXT: andl $-32, %esp
; KNL_32-NEXT: subl $32, %esp
@ -2168,12 +2141,9 @@ define <4 x i64> @test_pr28312(<4 x i64*> %p1, <4 x i1> %k, <4 x i1> %k2,<4 x i6
; SKX_32-LABEL: test_pr28312:
; SKX_32: # BB#0:
; SKX_32-NEXT: pushl %ebp
; SKX_32-NEXT: .Lcfi13:
; SKX_32-NEXT: .cfi_def_cfa_offset 8
; SKX_32-NEXT: .Lcfi14:
; SKX_32-NEXT: .cfi_offset %ebp, -8
; SKX_32-NEXT: movl %esp, %ebp
; SKX_32-NEXT: .Lcfi15:
; SKX_32-NEXT: .cfi_def_cfa_register %ebp
; SKX_32-NEXT: andl $-32, %esp
; SKX_32-NEXT: subl $32, %esp

1
llvm/test/CodeGen/X86/memset-nonzero.ll
View File

@ -143,7 +143,6 @@ define void @memset_256_nonzero_bytes(i8* %x) {
; SSE-LABEL: memset_256_nonzero_bytes:
; SSE: # BB#0:
; SSE-NEXT: pushq %rax
; SSE-NEXT: .Lcfi0:
; SSE-NEXT: .cfi_def_cfa_offset 16
; SSE-NEXT: movl $42, %esi
; SSE-NEXT: movl $256, %edx # imm = 0x100

38
llvm/test/CodeGen/X86/merge-consecutive-loads-128.ll
View File

@ -56,14 +56,10 @@ define <2 x i64> @merge_2i64_i64_12(i64* %ptr) nounwind uwtable noinline ssp {
; X32-SSE1-LABEL: merge_2i64_i64_12:
; X32-SSE1: # BB#0:
; X32-SSE1-NEXT: pushl %edi
; X32-SSE1-NEXT: .Lcfi0:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 8
; X32-SSE1-NEXT: pushl %esi
; X32-SSE1-NEXT: .Lcfi1:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 12
; X32-SSE1-NEXT: .Lcfi2:
; X32-SSE1-NEXT: .cfi_offset %esi, -12
; X32-SSE1-NEXT: .Lcfi3:
; X32-SSE1-NEXT: .cfi_offset %edi, -8
; X32-SSE1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-SSE1-NEXT: movl {{[0-9]+}}(%esp), %ecx
@ -377,9 +373,7 @@ define <4 x i32> @merge_4i32_i32_23u5(i32* %ptr) nounwind uwtable noinline ssp {
; X32-SSE1-LABEL: merge_4i32_i32_23u5:
; X32-SSE1: # BB#0:
; X32-SSE1-NEXT: pushl %esi
; X32-SSE1-NEXT: .Lcfi4:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 8
; X32-SSE1-NEXT: .Lcfi5:
; X32-SSE1-NEXT: .cfi_offset %esi, -8
; X32-SSE1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-SSE1-NEXT: movl {{[0-9]+}}(%esp), %ecx
@ -425,14 +419,10 @@ define <4 x i32> @merge_4i32_i32_23u5_inc2(i32* %ptr) nounwind uwtable noinline
; X32-SSE1-LABEL: merge_4i32_i32_23u5_inc2:
; X32-SSE1: # BB#0:
; X32-SSE1-NEXT: pushl %edi
; X32-SSE1-NEXT: .Lcfi6:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 8
; X32-SSE1-NEXT: pushl %esi
; X32-SSE1-NEXT: .Lcfi7:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 12
; X32-SSE1-NEXT: .Lcfi8:
; X32-SSE1-NEXT: .cfi_offset %esi, -12
; X32-SSE1-NEXT: .Lcfi9:
; X32-SSE1-NEXT: .cfi_offset %edi, -8
; X32-SSE1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-SSE1-NEXT: movl {{[0-9]+}}(%esp), %ecx
@ -484,14 +474,10 @@ define <4 x i32> @merge_4i32_i32_23u5_inc3(i32* %ptr) nounwind uwtable noinline
; X32-SSE1-LABEL: merge_4i32_i32_23u5_inc3:
; X32-SSE1: # BB#0:
; X32-SSE1-NEXT: pushl %edi
; X32-SSE1-NEXT: .Lcfi10:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 8
; X32-SSE1-NEXT: pushl %esi
; X32-SSE1-NEXT: .Lcfi11:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 12
; X32-SSE1-NEXT: .Lcfi12:
; X32-SSE1-NEXT: .cfi_offset %esi, -12
; X32-SSE1-NEXT: .Lcfi13:
; X32-SSE1-NEXT: .cfi_offset %edi, -8
; X32-SSE1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-SSE1-NEXT: movl {{[0-9]+}}(%esp), %ecx
@ -647,14 +633,10 @@ define <4 x i32> @merge_4i32_i32_45zz_inc4(i32* %ptr) nounwind uwtable noinline
; X32-SSE1-LABEL: merge_4i32_i32_45zz_inc4:
; X32-SSE1: # BB#0:
; X32-SSE1-NEXT: pushl %edi
; X32-SSE1-NEXT: .Lcfi14:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 8
; X32-SSE1-NEXT: pushl %esi
; X32-SSE1-NEXT: .Lcfi15:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 12
; X32-SSE1-NEXT: .Lcfi16:
; X32-SSE1-NEXT: .cfi_offset %esi, -12
; X32-SSE1-NEXT: .Lcfi17:
; X32-SSE1-NEXT: .cfi_offset %edi, -8
; X32-SSE1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-SSE1-NEXT: movl {{[0-9]+}}(%esp), %ecx
@ -703,14 +685,10 @@ define <4 x i32> @merge_4i32_i32_45zz_inc5(i32* %ptr) nounwind uwtable noinline
; X32-SSE1-LABEL: merge_4i32_i32_45zz_inc5:
; X32-SSE1: # BB#0:
; X32-SSE1-NEXT: pushl %edi
; X32-SSE1-NEXT: .Lcfi18:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 8
; X32-SSE1-NEXT: pushl %esi
; X32-SSE1-NEXT: .Lcfi19:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 12
; X32-SSE1-NEXT: .Lcfi20:
; X32-SSE1-NEXT: .cfi_offset %esi, -12
; X32-SSE1-NEXT: .Lcfi21:
; X32-SSE1-NEXT: .cfi_offset %edi, -8
; X32-SSE1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-SSE1-NEXT: movl {{[0-9]+}}(%esp), %ecx
@ -757,14 +735,10 @@ define <8 x i16> @merge_8i16_i16_23u567u9(i16* %ptr) nounwind uwtable noinline s
; X32-SSE1-LABEL: merge_8i16_i16_23u567u9:
; X32-SSE1: # BB#0:
; X32-SSE1-NEXT: pushl %edi
; X32-SSE1-NEXT: .Lcfi22:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 8
; X32-SSE1-NEXT: pushl %esi
; X32-SSE1-NEXT: .Lcfi23:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 12
; X32-SSE1-NEXT: .Lcfi24:
; X32-SSE1-NEXT: .cfi_offset %esi, -12
; X32-SSE1-NEXT: .Lcfi25:
; X32-SSE1-NEXT: .cfi_offset %edi, -8
; X32-SSE1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-SSE1-NEXT: movl {{[0-9]+}}(%esp), %ecx
@ -897,24 +871,16 @@ define <16 x i8> @merge_16i8_i8_01u3456789ABCDuF(i8* %ptr) nounwind uwtable noin
; X32-SSE1-LABEL: merge_16i8_i8_01u3456789ABCDuF:
; X32-SSE1: # BB#0:
; X32-SSE1-NEXT: pushl %ebp
; X32-SSE1-NEXT: .Lcfi26:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 8
; X32-SSE1-NEXT: pushl %ebx
; X32-SSE1-NEXT: .Lcfi27:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 12
; X32-SSE1-NEXT: pushl %edi
; X32-SSE1-NEXT: .Lcfi28:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 16
; X32-SSE1-NEXT: pushl %esi
; X32-SSE1-NEXT: .Lcfi29:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 20
; X32-SSE1-NEXT: .Lcfi30:
; X32-SSE1-NEXT: .cfi_offset %esi, -20
; X32-SSE1-NEXT: .Lcfi31:
; X32-SSE1-NEXT: .cfi_offset %edi, -16
; X32-SSE1-NEXT: .Lcfi32:
; X32-SSE1-NEXT: .cfi_offset %ebx, -12
; X32-SSE1-NEXT: .Lcfi33:
; X32-SSE1-NEXT: .cfi_offset %ebp, -8
; X32-SSE1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-SSE1-NEXT: movl {{[0-9]+}}(%esp), %ecx
@ -1147,14 +1113,10 @@ define <2 x i64> @merge_2i64_i64_12_volatile(i64* %ptr) nounwind uwtable noinlin
; X32-SSE1-LABEL: merge_2i64_i64_12_volatile:
; X32-SSE1: # BB#0:
; X32-SSE1-NEXT: pushl %edi
; X32-SSE1-NEXT: .Lcfi34:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 8
; X32-SSE1-NEXT: pushl %esi
; X32-SSE1-NEXT: .Lcfi35:
; X32-SSE1-NEXT: .cfi_def_cfa_offset 12
; X32-SSE1-NEXT: .Lcfi36:
; X32-SSE1-NEXT: .cfi_offset %esi, -12
; X32-SSE1-NEXT: .Lcfi37:
; X32-SSE1-NEXT: .cfi_offset %edi, -8
; X32-SSE1-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-SSE1-NEXT: movl {{[0-9]+}}(%esp), %ecx

2
llvm/test/CodeGen/X86/movpc32-check.ll
View File

@ -33,9 +33,7 @@ attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-
!12 = !DILocation(line: 5, column: 1, scope: !4)
; CHECK: calll .L0$pb
; CHECK-NEXT: .Lcfi3:
; CHECK-NEXT: .cfi_adjust_cfa_offset 4
; CHECK-NEXT: .L0$pb:
; CHECK-NEXT: popl
; CHECK-NEXT: .Lcfi4:
; CHECK-NEXT: .cfi_adjust_cfa_offset -4

113
llvm/test/CodeGen/X86/mul-constant-result.ll
View File

@ -10,9 +10,7 @@ define i32 @mult(i32, i32) local_unnamed_addr #0 {
; X86-LABEL: mult:
; X86: # BB#0:
; X86-NEXT: pushl %esi
; X86-NEXT: .Lcfi0:
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .Lcfi1:
; X86-NEXT: .cfi_offset %esi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: cmpl $1, %edx
@ -528,431 +526,329 @@ define i32 @foo() local_unnamed_addr #0 {
; X86-LABEL: foo:
; X86: # BB#0:
; X86-NEXT: pushl %ebx
; X86-NEXT: .Lcfi2:
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: pushl %edi
; X86-NEXT: .Lcfi3:
; X86-NEXT: .cfi_def_cfa_offset 12
; X86-NEXT: pushl %esi
; X86-NEXT: .Lcfi4:
; X86-NEXT: .cfi_def_cfa_offset 16
; X86-NEXT: .Lcfi5:
; X86-NEXT: .cfi_offset %esi, -16
; X86-NEXT: .Lcfi6:
; X86-NEXT: .cfi_offset %edi, -12
; X86-NEXT: .Lcfi7:
; X86-NEXT: .cfi_offset %ebx, -8
; X86-NEXT: pushl $0
; X86-NEXT: .Lcfi8:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $1
; X86-NEXT: .Lcfi9:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi10:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %esi
; X86-NEXT: xorl $1, %esi
; X86-NEXT: pushl $1
; X86-NEXT: .Lcfi11:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $2
; X86-NEXT: .Lcfi12:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi13:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %edi
; X86-NEXT: xorl $2, %edi
; X86-NEXT: pushl $1
; X86-NEXT: .Lcfi14:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $3
; X86-NEXT: .Lcfi15:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi16:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: xorl $3, %ebx
; X86-NEXT: orl %edi, %ebx
; X86-NEXT: pushl $2
; X86-NEXT: .Lcfi17:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $4
; X86-NEXT: .Lcfi18:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi19:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %edi
; X86-NEXT: xorl $4, %edi
; X86-NEXT: orl %ebx, %edi
; X86-NEXT: pushl $2
; X86-NEXT: .Lcfi20:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $5
; X86-NEXT: .Lcfi21:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi22:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: xorl $5, %ebx
; X86-NEXT: orl %edi, %ebx
; X86-NEXT: pushl $3
; X86-NEXT: .Lcfi23:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $6
; X86-NEXT: .Lcfi24:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi25:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %edi
; X86-NEXT: xorl $6, %edi
; X86-NEXT: orl %ebx, %edi
; X86-NEXT: pushl $3
; X86-NEXT: .Lcfi26:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $7
; X86-NEXT: .Lcfi27:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi28:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: xorl $7, %ebx
; X86-NEXT: orl %edi, %ebx
; X86-NEXT: pushl $4
; X86-NEXT: .Lcfi29:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $8
; X86-NEXT: .Lcfi30:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi31:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %edi
; X86-NEXT: xorl $8, %edi
; X86-NEXT: orl %ebx, %edi
; X86-NEXT: pushl $4
; X86-NEXT: .Lcfi32:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $9
; X86-NEXT: .Lcfi33:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi34:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: xorl $9, %ebx
; X86-NEXT: orl %edi, %ebx
; X86-NEXT: pushl $5
; X86-NEXT: .Lcfi35:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $10
; X86-NEXT: .Lcfi36:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi37:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %edi
; X86-NEXT: xorl $10, %edi
; X86-NEXT: orl %ebx, %edi
; X86-NEXT: pushl $5
; X86-NEXT: .Lcfi38:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $11
; X86-NEXT: .Lcfi39:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi40:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: xorl $11, %ebx
; X86-NEXT: orl %edi, %ebx
; X86-NEXT: pushl $6
; X86-NEXT: .Lcfi41:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $12
; X86-NEXT: .Lcfi42:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi43:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %edi
; X86-NEXT: xorl $12, %edi
; X86-NEXT: orl %ebx, %edi
; X86-NEXT: pushl $6
; X86-NEXT: .Lcfi44:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $13
; X86-NEXT: .Lcfi45:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi46:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: xorl $13, %ebx
; X86-NEXT: orl %edi, %ebx
; X86-NEXT: pushl $7
; X86-NEXT: .Lcfi47:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $14
; X86-NEXT: .Lcfi48:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi49:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %edi
; X86-NEXT: xorl $14, %edi
; X86-NEXT: orl %ebx, %edi
; X86-NEXT: pushl $7
; X86-NEXT: .Lcfi50:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $15
; X86-NEXT: .Lcfi51:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi52:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: xorl $15, %ebx
; X86-NEXT: orl %edi, %ebx
; X86-NEXT: pushl $8
; X86-NEXT: .Lcfi53:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $16
; X86-NEXT: .Lcfi54:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi55:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %edi
; X86-NEXT: xorl $16, %edi
; X86-NEXT: orl %ebx, %edi
; X86-NEXT: pushl $8
; X86-NEXT: .Lcfi56:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $17
; X86-NEXT: .Lcfi57:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi58:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: xorl $17, %ebx
; X86-NEXT: orl %edi, %ebx
; X86-NEXT: pushl $9
; X86-NEXT: .Lcfi59:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $18
; X86-NEXT: .Lcfi60:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi61:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %edi
; X86-NEXT: xorl $18, %edi
; X86-NEXT: orl %ebx, %edi
; X86-NEXT: pushl $9
; X86-NEXT: .Lcfi62:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $19
; X86-NEXT: .Lcfi63:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi64:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: xorl $19, %ebx
; X86-NEXT: orl %edi, %ebx
; X86-NEXT: pushl $10
; X86-NEXT: .Lcfi65:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $20
; X86-NEXT: .Lcfi66:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi67:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %edi
; X86-NEXT: xorl $20, %edi
; X86-NEXT: orl %ebx, %edi
; X86-NEXT: pushl $10
; X86-NEXT: .Lcfi68:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $21
; X86-NEXT: .Lcfi69:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi70:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: xorl $21, %ebx
; X86-NEXT: orl %edi, %ebx
; X86-NEXT: pushl $11
; X86-NEXT: .Lcfi71:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $22
; X86-NEXT: .Lcfi72:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi73:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %edi
; X86-NEXT: xorl $22, %edi
; X86-NEXT: orl %ebx, %edi
; X86-NEXT: pushl $11
; X86-NEXT: .Lcfi74:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $23
; X86-NEXT: .Lcfi75:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi76:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: xorl $23, %ebx
; X86-NEXT: orl %edi, %ebx
; X86-NEXT: pushl $12
; X86-NEXT: .Lcfi77:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $24
; X86-NEXT: .Lcfi78:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi79:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %edi
; X86-NEXT: xorl $24, %edi
; X86-NEXT: orl %ebx, %edi
; X86-NEXT: pushl $12
; X86-NEXT: .Lcfi80:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $25
; X86-NEXT: .Lcfi81:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi82:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: xorl $25, %ebx
; X86-NEXT: orl %edi, %ebx
; X86-NEXT: pushl $13
; X86-NEXT: .Lcfi83:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $26
; X86-NEXT: .Lcfi84:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi85:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %edi
; X86-NEXT: xorl $26, %edi
; X86-NEXT: orl %ebx, %edi
; X86-NEXT: pushl $13
; X86-NEXT: .Lcfi86:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $27
; X86-NEXT: .Lcfi87:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi88:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: xorl $27, %ebx
; X86-NEXT: orl %edi, %ebx
; X86-NEXT: pushl $14
; X86-NEXT: .Lcfi89:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $28
; X86-NEXT: .Lcfi90:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi91:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %edi
; X86-NEXT: xorl $28, %edi
; X86-NEXT: orl %ebx, %edi
; X86-NEXT: pushl $14
; X86-NEXT: .Lcfi92:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $29
; X86-NEXT: .Lcfi93:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi94:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: xorl $29, %ebx
; X86-NEXT: orl %edi, %ebx
; X86-NEXT: pushl $15
; X86-NEXT: .Lcfi95:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $30
; X86-NEXT: .Lcfi96:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi97:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %edi
; X86-NEXT: xorl $30, %edi
; X86-NEXT: orl %ebx, %edi
; X86-NEXT: pushl $15
; X86-NEXT: .Lcfi98:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $31
; X86-NEXT: .Lcfi99:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi100:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: movl %eax, %ebx
; X86-NEXT: xorl $31, %ebx
; X86-NEXT: orl %edi, %ebx
; X86-NEXT: orl %esi, %ebx
; X86-NEXT: pushl $16
; X86-NEXT: .Lcfi101:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $32
; X86-NEXT: .Lcfi102:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll mult
; X86-NEXT: addl $8, %esp
; X86-NEXT: .Lcfi103:
; X86-NEXT: .cfi_adjust_cfa_offset -8
; X86-NEXT: xorl $32, %eax
; X86-NEXT: xorl %ecx, %ecx
@ -968,27 +864,18 @@ define i32 @foo() local_unnamed_addr #0 {
; X64-HSW-LABEL: foo:
; X64-HSW: # BB#0:
; X64-HSW-NEXT: pushq %rbp
; X64-HSW-NEXT: .Lcfi0:
; X64-HSW-NEXT: .cfi_def_cfa_offset 16
; X64-HSW-NEXT: pushq %r15
; X64-HSW-NEXT: .Lcfi1:
; X64-HSW-NEXT: .cfi_def_cfa_offset 24
; X64-HSW-NEXT: pushq %r14
; X64-HSW-NEXT: .Lcfi2:
; X64-HSW-NEXT: .cfi_def_cfa_offset 32
; X64-HSW-NEXT: pushq %rbx
; X64-HSW-NEXT: .Lcfi3:
; X64-HSW-NEXT: .cfi_def_cfa_offset 40
; X64-HSW-NEXT: pushq %rax
; X64-HSW-NEXT: .Lcfi4:
; X64-HSW-NEXT: .cfi_def_cfa_offset 48
; X64-HSW-NEXT: .Lcfi5:
; X64-HSW-NEXT: .cfi_offset %rbx, -40
; X64-HSW-NEXT: .Lcfi6:
; X64-HSW-NEXT: .cfi_offset %r14, -32
; X64-HSW-NEXT: .Lcfi7:
; X64-HSW-NEXT: .cfi_offset %r15, -24
; X64-HSW-NEXT: .Lcfi8:
; X64-HSW-NEXT: .cfi_offset %rbp, -16
; X64-HSW-NEXT: movl $1, %edi
; X64-HSW-NEXT: xorl %esi, %esi

12
llvm/test/CodeGen/X86/mul-i256.ll
View File

@ -8,23 +8,17 @@ define void @test(i256* %a, i256* %b, i256* %out) #0 {
; X32-LABEL: test:
; X32: # BB#0: # %entry
; X32-NEXT: pushl %ebp
; X32-NEXT: .Lcfi0:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: .Lcfi1:
; X32-NEXT: .cfi_offset %ebp, -8
; X32-NEXT: movl %esp, %ebp
; X32-NEXT: .Lcfi2:
; X32-NEXT: .cfi_def_cfa_register %ebp
; X32-NEXT: pushl %ebx
; X32-NEXT: pushl %edi
; X32-NEXT: pushl %esi
; X32-NEXT: andl $-8, %esp
; X32-NEXT: subl $168, %esp
; X32-NEXT: .Lcfi3:
; X32-NEXT: .cfi_offset %esi, -20
; X32-NEXT: .Lcfi4:
; X32-NEXT: .cfi_offset %edi, -16
; X32-NEXT: .Lcfi5:
; X32-NEXT: .cfi_offset %ebx, -12
; X32-NEXT: movl 8(%ebp), %eax
; X32-NEXT: movl 16(%eax), %ecx
@ -198,19 +192,13 @@ define void @test(i256* %a, i256* %b, i256* %out) #0 {
; X64-LABEL: test:
; X64: # BB#0: # %entry
; X64-NEXT: pushq %r15
; X64-NEXT: .Lcfi0:
; X64-NEXT: .cfi_def_cfa_offset 16
; X64-NEXT: pushq %r14
; X64-NEXT: .Lcfi1:
; X64-NEXT: .cfi_def_cfa_offset 24
; X64-NEXT: pushq %rbx
; X64-NEXT: .Lcfi2:
; X64-NEXT: .cfi_def_cfa_offset 32
; X64-NEXT: .Lcfi3:
; X64-NEXT: .cfi_offset %rbx, -32
; X64-NEXT: .Lcfi4:
; X64-NEXT: .cfi_offset %r14, -24
; X64-NEXT: .Lcfi5:
; X64-NEXT: .cfi_offset %r15, -16
; X64-NEXT: movq %rdx, %r9
; X64-NEXT: movq (%rdi), %r11

6
llvm/test/CodeGen/X86/patchpoint-webkit_jscc.ll
View File

@ -7,7 +7,6 @@
define void @jscall_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
entry:
; CHECK-LABEL: jscall_patchpoint_codegen:
; CHECK: Lcfi
; CHECK: movq %r{{.+}}, (%rsp)
; CHECK: movq %r{{.+}}, %rax
; CHECK: Ltmp
@ -16,7 +15,6 @@ entry:
; CHECK: movq %rax, (%rsp)
; CHECK: callq
; FAST-LABEL: jscall_patchpoint_codegen:
; FAST: Lcfi
; FAST: movq %r{{.+}}, (%rsp)
; FAST: movq %r{{.+}}, %rax
; FAST: Ltmp
@ -35,7 +33,6 @@ entry:
define i64 @jscall_patchpoint_codegen2(i64 %callee) {
entry:
; CHECK-LABEL: jscall_patchpoint_codegen2:
; CHECK: Lcfi
; CHECK: movq $6, 24(%rsp)
; CHECK-NEXT: movl $4, 16(%rsp)
; CHECK-NEXT: movq $2, (%rsp)
@ -43,7 +40,6 @@ entry:
; CHECK-NEXT: movabsq $-559038736, %r11
; CHECK-NEXT: callq *%r11
; FAST-LABEL: jscall_patchpoint_codegen2:
; FAST: Lcfi
; FAST: movq $2, (%rsp)
; FAST-NEXT: movl $4, 16(%rsp)
; FAST-NEXT: movq $6, 24(%rsp)
@ -59,7 +55,6 @@ entry:
define i64 @jscall_patchpoint_codegen3(i64 %callee) {
entry:
; CHECK-LABEL: jscall_patchpoint_codegen3:
; CHECK: Lcfi
; CHECK: movq $10, 48(%rsp)
; CHECK-NEXT: movl $8, 36(%rsp)
; CHECK-NEXT: movq $6, 24(%rsp)
@ -69,7 +64,6 @@ entry:
; CHECK-NEXT: movabsq $-559038736, %r11
; CHECK-NEXT: callq *%r11
; FAST-LABEL: jscall_patchpoint_codegen3:
; FAST: Lcfi
; FAST: movq $2, (%rsp)
; FAST-NEXT: movl $4, 16(%rsp)
; FAST-NEXT: movq $6, 24(%rsp)

1
llvm/test/CodeGen/X86/pr21792.ll
View File

@ -10,7 +10,6 @@ define void @func(<4 x float> %vx) {
; CHECK-LABEL: func:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: pand {{.*}}(%rip), %xmm0
; CHECK-NEXT: pextrq $1, %xmm0, %rdx

1
llvm/test/CodeGen/X86/pr2656.ll
View File

@ -53,7 +53,6 @@ define double @PR22371(double %x) {
; CHECK-LABEL: PR22371:
; CHECK: ## BB#0:
; CHECK-NEXT: subl $12, %esp
; CHECK-NEXT: Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: andps LCPI1_0, %xmm0

4
llvm/test/CodeGen/X86/pr29061.ll
View File

@ -8,9 +8,7 @@ define void @t1(i8 signext %c) {
; CHECK-LABEL: t1:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: pushl %edi
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: .Lcfi1:
; CHECK-NEXT: .cfi_offset %edi, -8
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %edi
; CHECK-NEXT: # kill: %DI<def> %DI<kill> %EDI<kill>
@ -27,9 +25,7 @@ define void @t2(i8 signext %c) {
; CHECK-LABEL: t2:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: .Lcfi2:
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: .Lcfi3:
; CHECK-NEXT: .cfi_offset %esi, -8
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %esi
; CHECK-NEXT: # kill: %SI<def> %SI<kill> %ESI<kill>

1
llvm/test/CodeGen/X86/pr29112.ll
View File

@ -9,7 +9,6 @@ define <4 x float> @bar(<4 x float>* %a1p, <4 x float>* %a2p, <4 x float> %a3, <
; CHECK-LABEL: bar:
; CHECK: # BB#0:
; CHECK-NEXT: subq $88, %rsp
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 96
; CHECK-NEXT: vmovaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
; CHECK-NEXT: vextractf128 $1, %ymm3, %xmm1

3
llvm/test/CodeGen/X86/pr30430.ll
View File

@ -5,12 +5,9 @@ define <16 x float> @makefloat(float %f1, float %f2, float %f3, float %f4, float
; CHECK-LABEL: makefloat:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: pushq %rbp
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .Lcfi1:
; CHECK-NEXT: .cfi_offset %rbp, -16
; CHECK-NEXT: movq %rsp, %rbp
; CHECK-NEXT: .Lcfi2:
; CHECK-NEXT: .cfi_def_cfa_register %rbp
; CHECK-NEXT: andq $-64, %rsp
; CHECK-NEXT: subq $256, %rsp # imm = 0x100

3
llvm/test/CodeGen/X86/pr32241.ll
View File

@ -5,12 +5,9 @@ define i32 @_Z3foov() {
; CHECK-LABEL: _Z3foov:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: subl $24, %esp
; CHECK-NEXT: .Lcfi1:
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .Lcfi2:
; CHECK-NEXT: .cfi_offset %esi, -8
; CHECK-NEXT: movb $1, %al
; CHECK-NEXT: movw $10959, {{[0-9]+}}(%esp) # imm = 0x2ACF

1
llvm/test/CodeGen/X86/pr32256.ll
View File

@ -8,7 +8,6 @@ define void @_Z1av() {
; CHECK-LABEL: _Z1av:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: subl $2, %esp
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 6
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: movb %al, %cl

6
llvm/test/CodeGen/X86/pr32282.ll
View File

@ -13,7 +13,6 @@ define void @foo() {
; X86-LABEL: foo:
; X86: # BB#0:
; X86-NEXT: pushl %eax
; X86-NEXT: .Lcfi0:
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: movl d, %eax
; X86-NEXT: movl d+4, %ecx
@ -31,20 +30,15 @@ define void @foo() {
; X86-NEXT: addl $7, %edx
; X86-NEXT: adcxl %eax, %ecx
; X86-NEXT: pushl %ecx
; X86-NEXT: .Lcfi1:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl %edx
; X86-NEXT: .Lcfi2:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $0
; X86-NEXT: .Lcfi3:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: pushl $0
; X86-NEXT: .Lcfi4:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: calll __divdi3
; X86-NEXT: addl $16, %esp
; X86-NEXT: .Lcfi5:
; X86-NEXT: .cfi_adjust_cfa_offset -16
; X86-NEXT: orl %eax, %edx
; X86-NEXT: setne {{[0-9]+}}(%esp)

8
llvm/test/CodeGen/X86/pr32329.ll
View File

@ -18,24 +18,16 @@ define void @foo() local_unnamed_addr {
; X86-LABEL: foo:
; X86: # BB#0: # %entry
; X86-NEXT: pushl %ebp
; X86-NEXT: .Lcfi0:
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: pushl %ebx
; X86-NEXT: .Lcfi1:
; X86-NEXT: .cfi_def_cfa_offset 12
; X86-NEXT: pushl %edi
; X86-NEXT: .Lcfi2:
; X86-NEXT: .cfi_def_cfa_offset 16
; X86-NEXT: pushl %esi
; X86-NEXT: .Lcfi3:
; X86-NEXT: .cfi_def_cfa_offset 20
; X86-NEXT: .Lcfi4:
; X86-NEXT: .cfi_offset %esi, -20
; X86-NEXT: .Lcfi5:
; X86-NEXT: .cfi_offset %edi, -16
; X86-NEXT: .Lcfi6:
; X86-NEXT: .cfi_offset %ebx, -12
; X86-NEXT: .Lcfi7:
; X86-NEXT: .cfi_offset %ebp, -8
; X86-NEXT: movl obj, %edx
; X86-NEXT: movsbl var_27, %eax

9
llvm/test/CodeGen/X86/pr32345.ll
View File

@ -37,23 +37,17 @@ define void @foo() {
; 6860-LABEL: foo:
; 6860: # BB#0: # %bb
; 6860-NEXT: pushl %ebp
; 6860-NEXT: .Lcfi0:
; 6860-NEXT: .cfi_def_cfa_offset 8
; 6860-NEXT: .Lcfi1:
; 6860-NEXT: .cfi_offset %ebp, -8
; 6860-NEXT: movl %esp, %ebp
; 6860-NEXT: .Lcfi2:
; 6860-NEXT: .cfi_def_cfa_register %ebp
; 6860-NEXT: pushl %ebx
; 6860-NEXT: pushl %edi
; 6860-NEXT: pushl %esi
; 6860-NEXT: andl $-8, %esp
; 6860-NEXT: subl $32, %esp
; 6860-NEXT: .Lcfi3:
; 6860-NEXT: .cfi_offset %esi, -20
; 6860-NEXT: .Lcfi4:
; 6860-NEXT: .cfi_offset %edi, -16
; 6860-NEXT: .Lcfi5:
; 6860-NEXT: .cfi_offset %ebx, -12
; 6860-NEXT: # implicit-def: %EAX
; 6860-NEXT: movw var_22, %cx
@ -109,12 +103,9 @@ define void @foo() {
; 686-LABEL: foo:
; 686: # BB#0: # %bb
; 686-NEXT: pushl %ebp
; 686-NEXT: .Lcfi0:
; 686-NEXT: .cfi_def_cfa_offset 8
; 686-NEXT: .Lcfi1:
; 686-NEXT: .cfi_offset %ebp, -8
; 686-NEXT: movl %esp, %ebp
; 686-NEXT: .Lcfi2:
; 686-NEXT: .cfi_def_cfa_register %ebp
; 686-NEXT: andl $-8, %esp
; 686-NEXT: subl $8, %esp

3
llvm/test/CodeGen/X86/pr32451.ll
View File

@ -10,12 +10,9 @@ define i8** @japi1_convert_690(i8**, i8***, i32) {
; CHECK-LABEL: japi1_convert_690:
; CHECK: # BB#0: # %top
; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: subl $16, %esp
; CHECK-NEXT: .Lcfi1:
; CHECK-NEXT: .cfi_def_cfa_offset 24
; CHECK-NEXT: .Lcfi2:
; CHECK-NEXT: .cfi_offset %ebx, -8
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill

12
llvm/test/CodeGen/X86/pr34080.ll
View File

@ -10,12 +10,9 @@ define void @_Z1fe(x86_fp80 %z) local_unnamed_addr #0 {
; SSE2-LABEL: _Z1fe:
; SSE2: ## BB#0: ## %entry
; SSE2-NEXT: pushq %rbp
; SSE2-NEXT: Lcfi0:
; SSE2-NEXT: .cfi_def_cfa_offset 16
; SSE2-NEXT: Lcfi1:
; SSE2-NEXT: .cfi_offset %rbp, -16
; SSE2-NEXT: movq %rsp, %rbp
; SSE2-NEXT: Lcfi2:
; SSE2-NEXT: .cfi_def_cfa_register %rbp
; SSE2-NEXT: fldt 16(%rbp)
; SSE2-NEXT: fnstcw -4(%rbp)
@ -52,12 +49,9 @@ define void @_Z1fe(x86_fp80 %z) local_unnamed_addr #0 {
; SSE2-BROKEN-LABEL: _Z1fe:
; SSE2-BROKEN: ## BB#0: ## %entry
; SSE2-BROKEN-NEXT: pushq %rbp
; SSE2-BROKEN-NEXT: Lcfi0:
; SSE2-BROKEN-NEXT: .cfi_def_cfa_offset 16
; SSE2-BROKEN-NEXT: Lcfi1:
; SSE2-BROKEN-NEXT: .cfi_offset %rbp, -16
; SSE2-BROKEN-NEXT: movq %rsp, %rbp
; SSE2-BROKEN-NEXT: Lcfi2:
; SSE2-BROKEN-NEXT: .cfi_def_cfa_register %rbp
; SSE2-BROKEN-NEXT: fnstcw -4(%rbp)
; SSE2-BROKEN-NEXT: fldt 16(%rbp)
@ -94,12 +88,9 @@ define void @_Z1fe(x86_fp80 %z) local_unnamed_addr #0 {
; SSE3-LABEL: _Z1fe:
; SSE3: ## BB#0: ## %entry
; SSE3-NEXT: pushq %rbp
; SSE3-NEXT: Lcfi0:
; SSE3-NEXT: .cfi_def_cfa_offset 16
; SSE3-NEXT: Lcfi1:
; SSE3-NEXT: .cfi_offset %rbp, -16
; SSE3-NEXT: movq %rsp, %rbp
; SSE3-NEXT: Lcfi2:
; SSE3-NEXT: .cfi_def_cfa_register %rbp
; SSE3-NEXT: fldt 16(%rbp)
; SSE3-NEXT: fld %st(0)
@ -126,12 +117,9 @@ define void @_Z1fe(x86_fp80 %z) local_unnamed_addr #0 {
; AVX-LABEL: _Z1fe:
; AVX: ## BB#0: ## %entry
; AVX-NEXT: pushq %rbp
; AVX-NEXT: Lcfi0:
; AVX-NEXT: .cfi_def_cfa_offset 16
; AVX-NEXT: Lcfi1:
; AVX-NEXT: .cfi_offset %rbp, -16
; AVX-NEXT: movq %rsp, %rbp
; AVX-NEXT: Lcfi2:
; AVX-NEXT: .cfi_def_cfa_register %rbp
; AVX-NEXT: fldt 16(%rbp)
; AVX-NEXT: fld %st(0)

3
llvm/test/CodeGen/X86/pr34088.ll
View File

@ -11,12 +11,9 @@ define i32 @pr34088() local_unnamed_addr {
; CHECK-LABEL: pr34088:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: pushl %ebp
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: .Lcfi1:
; CHECK-NEXT: .cfi_offset %ebp, -8
; CHECK-NEXT: movl %esp, %ebp
; CHECK-NEXT: .Lcfi2:
; CHECK-NEXT: .cfi_def_cfa_register %ebp
; CHECK-NEXT: andl $-16, %esp
; CHECK-NEXT: subl $32, %esp

3
llvm/test/CodeGen/X86/pr9743.ll
View File

@ -6,12 +6,9 @@ define void @f() {
; CHECK: .cfi_startproc
; CHECK-NEXT: pushq
; CHECK-NEXT: :
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: :
; CHECK-NEXT: .cfi_offset %rbp, -16
; CHECK-NEXT: movq %rsp, %rbp
; CHECK-NEXT: :
; CHECK-NEXT: .cfi_def_cfa_register %rbp
; CHECK-NEXT: popq %rbp
; CHECK-NEXT: ret

12
llvm/test/CodeGen/X86/push-cfi.ll
View File

@ -13,16 +13,12 @@ declare void @empty()
; CHECK-LABEL: test1_nofp:
; LINUX: .cfi_escape 0x2e, 0x10
; LINUX-NEXT: pushl $4
; LINUX-NEXT: Lcfi{{[0-9]+}}:
; LINUX-NEXT: .cfi_adjust_cfa_offset 4
; LINUX-NEXT: pushl $3
; LINUX-NEXT: Lcfi{{[0-9]+}}:
; LINUX-NEXT: .cfi_adjust_cfa_offset 4
; LINUX-NEXT: pushl $2
; LINUX-NEXT: Lcfi{{[0-9]+}}:
; LINUX-NEXT: .cfi_adjust_cfa_offset 4
; LINUX-NEXT: pushl $1
; LINUX-NEXT: Lcfi{{[0-9]+}}:
; LINUX-NEXT: .cfi_adjust_cfa_offset 4
; LINUX-NEXT: call
; LINUX-NEXT: addl $16, %esp
@ -70,16 +66,12 @@ cleanup:
; CHECK-LABEL: test2_nofp:
; LINUX-NOT: .cfi_escape
; LINUX: pushl $4
; LINUX-NEXT: Lcfi{{[0-9]+}}:
; LINUX-NEXT: .cfi_adjust_cfa_offset 4
; LINUX-NEXT: pushl $3
; LINUX-NEXT: Lcfi{{[0-9]+}}:
; LINUX-NEXT: .cfi_adjust_cfa_offset 4
; LINUX-NEXT: pushl $2
; LINUX-NEXT: Lcfi{{[0-9]+}}:
; LINUX-NEXT: .cfi_adjust_cfa_offset 4
; LINUX-NEXT: pushl $1
; LINUX-NEXT: Lcfi{{[0-9]+}}:
; LINUX-NEXT: .cfi_adjust_cfa_offset 4
; LINUX-NEXT: call
; LINUX-NEXT: addl $28, %esp
@ -185,16 +177,12 @@ cleanup:
; CHECK-LABEL: test5_nofp:
; LINUX: .cfi_escape 0x2e, 0x10
; LINUX-NEXT: pushl $4
; LINUX-NEXT: Lcfi{{[0-9]+}}:
; LINUX-NEXT: .cfi_adjust_cfa_offset 4
; LINUX-NEXT: pushl $3
; LINUX-NEXT: Lcfi{{[0-9]+}}:
; LINUX-NEXT: .cfi_adjust_cfa_offset 4
; LINUX-NEXT: pushl $2
; LINUX-NEXT: Lcfi{{[0-9]+}}:
; LINUX-NEXT: .cfi_adjust_cfa_offset 4
; LINUX-NEXT: pushl $1
; LINUX-NEXT: Lcfi{{[0-9]+}}:
; LINUX-NEXT: .cfi_adjust_cfa_offset 4
; LINUX-NEXT: call
; LINUX-NEXT: addl $16, %esp

2
llvm/test/CodeGen/X86/recip-pic.ll
View File

@ -5,11 +5,9 @@ define fastcc float @foo(float %x) unnamed_addr #0 {
; CHECK-LABEL: foo:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: calll .L0$pb
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_adjust_cfa_offset 4
; CHECK-NEXT: .L0$pb:
; CHECK-NEXT: popl %eax
; CHECK-NEXT: .Lcfi1:
; CHECK-NEXT: .cfi_adjust_cfa_offset -4
; CHECK-NEXT: .Ltmp0:
; CHECK-NEXT: addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp0-.L0$pb), %eax

1
llvm/test/CodeGen/X86/rtm.ll
View File

@ -70,7 +70,6 @@ define void @f2(i32 %x) nounwind uwtable {
; X64-LABEL: f2:
; X64: # BB#0: # %entry
; X64-NEXT: pushq %rax
; X64-NEXT: .Lcfi0:
; X64-NEXT: .cfi_def_cfa_offset 16
; X64-NEXT: movl %edi, {{[0-9]+}}(%rsp)
; X64-NEXT: xabort $1

6
llvm/test/CodeGen/X86/select-mmx.ll
View File

@ -26,12 +26,9 @@ define i64 @test47(i64 %arg) {
; I32-LABEL: test47:
; I32: # BB#0:
; I32-NEXT: pushl %ebp
; I32-NEXT: .Lcfi0:
; I32-NEXT: .cfi_def_cfa_offset 8
; I32-NEXT: .Lcfi1:
; I32-NEXT: .cfi_offset %ebp, -8
; I32-NEXT: movl %esp, %ebp
; I32-NEXT: .Lcfi2:
; I32-NEXT: .cfi_def_cfa_register %ebp
; I32-NEXT: andl $-8, %esp
; I32-NEXT: subl $16, %esp
@ -81,12 +78,9 @@ define i64 @test49(i64 %arg, i64 %x, i64 %y) {
; I32-LABEL: test49:
; I32: # BB#0:
; I32-NEXT: pushl %ebp
; I32-NEXT: .Lcfi3:
; I32-NEXT: .cfi_def_cfa_offset 8
; I32-NEXT: .Lcfi4:
; I32-NEXT: .cfi_offset %ebp, -8
; I32-NEXT: movl %esp, %ebp
; I32-NEXT: .Lcfi5:
; I32-NEXT: .cfi_def_cfa_register %ebp
; I32-NEXT: andl $-8, %esp
; I32-NEXT: subl $8, %esp

2
llvm/test/CodeGen/X86/setcc-lowering.ll
View File

@ -67,9 +67,7 @@ define void @pr26232(i64 %a, <16 x i1> %b) {
; KNL-32-LABEL: pr26232:
; KNL-32: # BB#0: # %for_loop599.preheader
; KNL-32-NEXT: pushl %esi
; KNL-32-NEXT: .Lcfi0:
; KNL-32-NEXT: .cfi_def_cfa_offset 8
; KNL-32-NEXT: .Lcfi1:
; KNL-32-NEXT: .cfi_offset %esi, -8
; KNL-32-NEXT: vpmovsxbd %xmm0, %zmm0
; KNL-32-NEXT: vpslld $31, %zmm0, %zmm0

6
llvm/test/CodeGen/X86/sincos.ll
View File

@ -13,7 +13,6 @@ define float @test1(float %X) {
; CHECK-LABEL: test1:
; CHECK: ## BB#0:
; CHECK-NEXT: subl $12, %esp
; CHECK-NEXT: Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: flds {{[0-9]+}}(%esp)
; CHECK-NEXT: fstps (%esp)
@ -28,7 +27,6 @@ define double @test2(double %X) {
; CHECK-LABEL: test2:
; CHECK: ## BB#0:
; CHECK-NEXT: subl $12, %esp
; CHECK-NEXT: Lcfi1:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
; CHECK-NEXT: fstpl (%esp)
@ -43,7 +41,6 @@ define x86_fp80 @test3(x86_fp80 %X) {
; CHECK-LABEL: test3:
; CHECK: ## BB#0:
; CHECK-NEXT: subl $28, %esp
; CHECK-NEXT: Lcfi2:
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
; CHECK-NEXT: fstpt (%esp)
@ -65,7 +62,6 @@ define float @test4(float %X) {
; CHECK-LABEL: test4:
; CHECK: ## BB#0:
; CHECK-NEXT: subl $12, %esp
; CHECK-NEXT: Lcfi3:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: flds {{[0-9]+}}(%esp)
; CHECK-NEXT: fstps (%esp)
@ -80,7 +76,6 @@ define double @test5(double %X) {
; CHECK-LABEL: test5:
; CHECK: ## BB#0:
; CHECK-NEXT: subl $12, %esp
; CHECK-NEXT: Lcfi4:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
; CHECK-NEXT: fstpl (%esp)
@ -95,7 +90,6 @@ define x86_fp80 @test6(x86_fp80 %X) {
; CHECK-LABEL: test6:
; CHECK: ## BB#0:
; CHECK-NEXT: subl $28, %esp
; CHECK-NEXT: Lcfi5:
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
; CHECK-NEXT: fstpt (%esp)

12
llvm/test/CodeGen/X86/statepoint-live-in.ll
View File

@ -10,7 +10,6 @@ define void @test1(i32 %a) gc "statepoint-example" {
; CHECK-LABEL: test1:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: callq _bar
; CHECK-NEXT: Ltmp0:
@ -26,17 +25,12 @@ define void @test2(i32 %a, i32 %b) gc "statepoint-example" {
; CHECK-LABEL: test2:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: pushq %rbp
; CHECK-NEXT: Lcfi1:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: Lcfi2:
; CHECK-NEXT: .cfi_def_cfa_offset 24
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: Lcfi3:
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: Lcfi4:
; CHECK-NEXT: .cfi_offset %rbx, -24
; CHECK-NEXT: Lcfi5:
; CHECK-NEXT: .cfi_offset %rbp, -16
; CHECK-NEXT: movl %esi, %ebx
; CHECK-NEXT: movl %edi, %ebp
@ -60,7 +54,6 @@ define void @test3(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %
; CHECK-LABEL: test3:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: Lcfi6:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: callq _bar
; CHECK-NEXT: Ltmp3:
@ -80,7 +73,6 @@ define void @test4(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %
; CHECK-LABEL: test4:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: Lcfi7:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: callq _bar
; CHECK-NEXT: Ltmp4:
@ -99,7 +91,6 @@ define i32 addrspace(1)* @test5(i32 %a, i32 addrspace(1)* %p) gc "statepoint-ex
; CHECK-LABEL: test5:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: Lcfi8:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movq %rsi, (%rsp)
; CHECK-NEXT: callq _bar
@ -118,12 +109,9 @@ define void @test6(i32 %a) gc "statepoint-example" {
; CHECK-LABEL: test6:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: Lcfi9:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: subq $16, %rsp
; CHECK-NEXT: Lcfi10:
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: Lcfi11:
; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movl %edi, %ebx
; CHECK-NEXT: movl %ebx, {{[0-9]+}}(%rsp)

4
llvm/test/CodeGen/X86/tls-pie.ll
View File

@ -52,11 +52,9 @@ define i32 @f3() {
; X86-LABEL: f3:
; X86: # BB#0: # %entry
; X86-NEXT: calll .L2$pb
; X86-NEXT: .Lcfi0:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: .L2$pb:
; X86-NEXT: popl %eax
; X86-NEXT: .Lcfi1:
; X86-NEXT: .cfi_adjust_cfa_offset -4
; X86-NEXT: .Ltmp0:
; X86-NEXT: addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp0-.L2$pb), %eax
@ -84,11 +82,9 @@ define i32* @f4() {
; X86-LABEL: f4:
; X86: # BB#0: # %entry
; X86-NEXT: calll .L3$pb
; X86-NEXT: .Lcfi2:
; X86-NEXT: .cfi_adjust_cfa_offset 4
; X86-NEXT: .L3$pb:
; X86-NEXT: popl %ecx
; X86-NEXT: .Lcfi3:
; X86-NEXT: .cfi_adjust_cfa_offset -4
; X86-NEXT: .Ltmp1:
; X86-NEXT: addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp1-.L3$pb), %ecx

4
llvm/test/CodeGen/X86/tls-shrink-wrapping.ll
View File

@ -39,16 +39,12 @@ if.end: ; preds = %if.then, %entry
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: # BB#0: # %entry
; CHECK-NEXT: pushq %rbp
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .Lcfi1:
; CHECK-NEXT: .cfi_offset %rbp, -16
; CHECK-NEXT: movq %rsp, %rbp
; CHECK-NEXT: .Lcfi2:
; CHECK-NEXT: .cfi_def_cfa_register %rbp
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .Lcfi3:
; CHECK-NEXT: .cfi_offset %rbx, -24
; CHECK-NEXT: data16
; CHECK-NEXT: leaq i@TLSGD(%rip), %rdi

25
llvm/test/CodeGen/X86/vector-sext.ll
View File

@ -3252,34 +3252,22 @@ define <16 x i16> @load_sext_16i1_to_16i16(<16 x i1> *%ptr) {
; AVX1-LABEL: load_sext_16i1_to_16i16:
; AVX1: # BB#0: # %entry
; AVX1-NEXT: pushq %rbp
; AVX1-NEXT: .Lcfi0:
; AVX1-NEXT: .cfi_def_cfa_offset 16
; AVX1-NEXT: pushq %r15
; AVX1-NEXT: .Lcfi1:
; AVX1-NEXT: .cfi_def_cfa_offset 24
; AVX1-NEXT: pushq %r14
; AVX1-NEXT: .Lcfi2:
; AVX1-NEXT: .cfi_def_cfa_offset 32
; AVX1-NEXT: pushq %r13
; AVX1-NEXT: .Lcfi3:
; AVX1-NEXT: .cfi_def_cfa_offset 40
; AVX1-NEXT: pushq %r12
; AVX1-NEXT: .Lcfi4:
; AVX1-NEXT: .cfi_def_cfa_offset 48
; AVX1-NEXT: pushq %rbx
; AVX1-NEXT: .Lcfi5:
; AVX1-NEXT: .cfi_def_cfa_offset 56
; AVX1-NEXT: .Lcfi6:
; AVX1-NEXT: .cfi_offset %rbx, -56
; AVX1-NEXT: .Lcfi7:
; AVX1-NEXT: .cfi_offset %r12, -48
; AVX1-NEXT: .Lcfi8:
; AVX1-NEXT: .cfi_offset %r13, -40
; AVX1-NEXT: .Lcfi9:
; AVX1-NEXT: .cfi_offset %r14, -32
; AVX1-NEXT: .Lcfi10:
; AVX1-NEXT: .cfi_offset %r15, -24
; AVX1-NEXT: .Lcfi11:
; AVX1-NEXT: .cfi_offset %rbp, -16
; AVX1-NEXT: movswq (%rdi), %rax
; AVX1-NEXT: movq %rax, %rcx
@ -3355,34 +3343,22 @@ define <16 x i16> @load_sext_16i1_to_16i16(<16 x i1> *%ptr) {
; AVX2-LABEL: load_sext_16i1_to_16i16:
; AVX2: # BB#0: # %entry
; AVX2-NEXT: pushq %rbp
; AVX2-NEXT: .Lcfi0:
; AVX2-NEXT: .cfi_def_cfa_offset 16
; AVX2-NEXT: pushq %r15
; AVX2-NEXT: .Lcfi1:
; AVX2-NEXT: .cfi_def_cfa_offset 24
; AVX2-NEXT: pushq %r14
; AVX2-NEXT: .Lcfi2:
; AVX2-NEXT: .cfi_def_cfa_offset 32
; AVX2-NEXT: pushq %r13
; AVX2-NEXT: .Lcfi3:
; AVX2-NEXT: .cfi_def_cfa_offset 40
; AVX2-NEXT: pushq %r12
; AVX2-NEXT: .Lcfi4:
; AVX2-NEXT: .cfi_def_cfa_offset 48
; AVX2-NEXT: pushq %rbx
; AVX2-NEXT: .Lcfi5:
; AVX2-NEXT: .cfi_def_cfa_offset 56
; AVX2-NEXT: .Lcfi6:
; AVX2-NEXT: .cfi_offset %rbx, -56
; AVX2-NEXT: .Lcfi7:
; AVX2-NEXT: .cfi_offset %r12, -48
; AVX2-NEXT: .Lcfi8:
; AVX2-NEXT: .cfi_offset %r13, -40
; AVX2-NEXT: .Lcfi9:
; AVX2-NEXT: .cfi_offset %r14, -32
; AVX2-NEXT: .Lcfi10:
; AVX2-NEXT: .cfi_offset %r15, -24
; AVX2-NEXT: .Lcfi11:
; AVX2-NEXT: .cfi_offset %rbp, -16
; AVX2-NEXT: movswq (%rdi), %rax
; AVX2-NEXT: movq %rax, %rcx
@ -4844,7 +4820,6 @@ define i32 @sext_2i8_to_i32(<16 x i8> %A) nounwind uwtable readnone ssp {
; X32-SSE41-LABEL: sext_2i8_to_i32:
; X32-SSE41: # BB#0: # %entry
; X32-SSE41-NEXT: pushl %eax
; X32-SSE41-NEXT: .Lcfi0:
; X32-SSE41-NEXT: .cfi_def_cfa_offset 8
; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm0
; X32-SSE41-NEXT: movd %xmm0, %eax

6
llvm/test/CodeGen/X86/vector-shuffle-avx512.ll
View File

@ -608,12 +608,9 @@ define <64 x i8> @test_mm512_mask_blend_epi8(<64 x i8> %A, <64 x i8> %W){
; KNL32-LABEL: test_mm512_mask_blend_epi8:
; KNL32: # BB#0: # %entry
; KNL32-NEXT: pushl %ebp
; KNL32-NEXT: .Lcfi0:
; KNL32-NEXT: .cfi_def_cfa_offset 8
; KNL32-NEXT: .Lcfi1:
; KNL32-NEXT: .cfi_offset %ebp, -8
; KNL32-NEXT: movl %esp, %ebp
; KNL32-NEXT: .Lcfi2:
; KNL32-NEXT: .cfi_def_cfa_register %ebp
; KNL32-NEXT: andl $-32, %esp
; KNL32-NEXT: subl $32, %esp
@ -652,12 +649,9 @@ define <32 x i16> @test_mm512_mask_blend_epi16(<32 x i16> %A, <32 x i16> %W){
; KNL32-LABEL: test_mm512_mask_blend_epi16:
; KNL32: # BB#0: # %entry
; KNL32-NEXT: pushl %ebp
; KNL32-NEXT: .Lcfi3:
; KNL32-NEXT: .cfi_def_cfa_offset 8
; KNL32-NEXT: .Lcfi4:
; KNL32-NEXT: .cfi_offset %ebp, -8
; KNL32-NEXT: movl %esp, %ebp
; KNL32-NEXT: .Lcfi5:
; KNL32-NEXT: .cfi_def_cfa_register %ebp
; KNL32-NEXT: andl $-32, %esp
; KNL32-NEXT: subl $32, %esp

3
llvm/test/CodeGen/X86/vector-shuffle-mmx.ll
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@ -32,12 +32,9 @@ define void @test1() {
; X32-LABEL: test1:
; X32: ## BB#0: ## %entry
; X32-NEXT: pushl %edi
; X32-NEXT: Lcfi0:
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: subl $16, %esp
; X32-NEXT: Lcfi1:
; X32-NEXT: .cfi_def_cfa_offset 24
; X32-NEXT: Lcfi2:
; X32-NEXT: .cfi_offset %edi, -8
; X32-NEXT: xorps %xmm0, %xmm0
; X32-NEXT: movlps %xmm0, (%esp)

6
llvm/test/CodeGen/X86/vector-shuffle-v1.ll
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@ -604,12 +604,9 @@ define i64 @shuf64i1_zero(i64 %a) {
; AVX512F-LABEL: shuf64i1_zero:
; AVX512F: # BB#0:
; AVX512F-NEXT: pushq %rbp
; AVX512F-NEXT: .Lcfi0:
; AVX512F-NEXT: .cfi_def_cfa_offset 16
; AVX512F-NEXT: .Lcfi1:
; AVX512F-NEXT: .cfi_offset %rbp, -16
; AVX512F-NEXT: movq %rsp, %rbp
; AVX512F-NEXT: .Lcfi2:
; AVX512F-NEXT: .cfi_def_cfa_register %rbp
; AVX512F-NEXT: andq $-32, %rsp
; AVX512F-NEXT: subq $96, %rsp
@ -639,12 +636,9 @@ define i64 @shuf64i1_zero(i64 %a) {
; AVX512VL-LABEL: shuf64i1_zero:
; AVX512VL: # BB#0:
; AVX512VL-NEXT: pushq %rbp
; AVX512VL-NEXT: .Lcfi0:
; AVX512VL-NEXT: .cfi_def_cfa_offset 16
; AVX512VL-NEXT: .Lcfi1:
; AVX512VL-NEXT: .cfi_offset %rbp, -16
; AVX512VL-NEXT: movq %rsp, %rbp
; AVX512VL-NEXT: .Lcfi2:
; AVX512VL-NEXT: .cfi_def_cfa_register %rbp
; AVX512VL-NEXT: andq $-32, %rsp
; AVX512VL-NEXT: subq $96, %rsp

6
llvm/test/CodeGen/X86/wide-fma-contraction.ll
View File

@ -8,12 +8,9 @@ define <16 x float> @fmafunc(<16 x float> %a, <16 x float> %b, <16 x float> %c)
; CHECK-LABEL: fmafunc:
; CHECK: ## BB#0:
; CHECK-NEXT: pushl %ebp
; CHECK-NEXT: Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: Lcfi1:
; CHECK-NEXT: .cfi_offset %ebp, -8
; CHECK-NEXT: movl %esp, %ebp
; CHECK-NEXT: Lcfi2:
; CHECK-NEXT: .cfi_def_cfa_register %ebp
; CHECK-NEXT: andl $-32, %esp
; CHECK-NEXT: subl $32, %esp
@ -26,12 +23,9 @@ define <16 x float> @fmafunc(<16 x float> %a, <16 x float> %b, <16 x float> %c)
; CHECK-NOFMA-LABEL: fmafunc:
; CHECK-NOFMA: ## BB#0:
; CHECK-NOFMA-NEXT: pushl %ebp
; CHECK-NOFMA-NEXT: Lcfi0:
; CHECK-NOFMA-NEXT: .cfi_def_cfa_offset 8
; CHECK-NOFMA-NEXT: Lcfi1:
; CHECK-NOFMA-NEXT: .cfi_offset %ebp, -8
; CHECK-NOFMA-NEXT: movl %esp, %ebp
; CHECK-NOFMA-NEXT: Lcfi2:
; CHECK-NOFMA-NEXT: .cfi_def_cfa_register %ebp
; CHECK-NOFMA-NEXT: andl $-32, %esp
; CHECK-NOFMA-NEXT: subl $32, %esp

2
llvm/test/CodeGen/X86/wide-integer-cmp.ll
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@ -91,9 +91,7 @@ define i32 @test_wide(i128 %a, i128 %b) {
; CHECK-LABEL: test_wide:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: .Lcfi1:
; CHECK-NEXT: .cfi_offset %esi, -8
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx

2
llvm/test/CodeGen/X86/win32-pic-jumptable.ll
View File

@ -1,11 +1,9 @@
; RUN: llc < %s -relocation-model=pic | FileCheck %s
; CHECK: calll L0$pb
; CHECK-NEXT: Lcfi{{[0-9]+}}:
; CHECK-NEXT: .cfi_adjust_cfa_offset 4
; CHECK-NEXT: L0$pb:
; CHECK-NEXT: popl %eax
; CHECK-NEXT: Lcfi{{[0-9]+}}:
; CHECK-NEXT: .cfi_adjust_cfa_offset -4
; CHECK-NEXT: addl LJTI0_0(,%ecx,4), %eax
; CHECK-NEXT: jmpl *%eax

1
llvm/test/CodeGen/X86/x86-interleaved-access.ll
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@ -1689,7 +1689,6 @@ define void @interleaved_store_vf64_i8_stride4(<64 x i8> %a, <64 x i8> %b, <64 x
; AVX1-LABEL: interleaved_store_vf64_i8_stride4:
; AVX1: # BB#0:
; AVX1-NEXT: subq $24, %rsp
; AVX1-NEXT: .Lcfi0:
; AVX1-NEXT: .cfi_def_cfa_offset 32
; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm8 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
; AVX1-NEXT: vmovdqa %xmm8, -{{[0-9]+}}(%rsp) # 16-byte Spill

3
llvm/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll
View File

@ -11,12 +11,9 @@ define x86_64_sysvcc i32 @bar(i32 %a0, i32 %a1, float %b0) #0 {
; CHECK-LABEL: bar:
; CHECK: # BB#0:
; CHECK-NEXT: pushq %rdx
; CHECK-NEXT: .Lcfi0:
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp) # 16-byte Spill
; CHECK-NEXT: .Lcfi1:
; CHECK-NEXT: .cfi_offset %rdx, -16
; CHECK-NEXT: .Lcfi2:
; CHECK-NEXT: .cfi_offset %xmm1, -32
; CHECK-NEXT: #APP
; CHECK-NEXT: #NO_APP

22
llvm/test/CodeGen/XCore/epilogue_prologue.ll
View File

@ -62,18 +62,13 @@ entry:
; FP + large frame: spill FP+SR = entsp 2 + 100000
; CHECKFP-LABEL: f4:
; CHECKFP: entsp 65535
; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
; CHECKFP-NEXT: .cfi_def_cfa_offset 262140
; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
; CHECKFP-NEXT: .cfi_offset 15, 0
; CHECKFP-NEXT: extsp 34467
; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
; CHECKFP-NEXT: .cfi_def_cfa_offset 400008
; CHECKFP-NEXT: stw r10, sp[1]
; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
; CHECKFP-NEXT: .cfi_offset 10, -400004
; CHECKFP-NEXT: ldaw r10, sp[0]
; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
; CHECKFP-NEXT: .cfi_def_cfa_register 10
; CHECKFP-NEXT: set sp, r10
; CHECKFP-NEXT: ldw r10, sp[1]
@ -83,12 +78,9 @@ entry:
; !FP + large frame: spill SR+SR = entsp 2 + 100000
; CHECK-LABEL: f4:
; CHECK: entsp 65535
; CHECK-NEXT: .Lcfi{{[0-9]+}}
; CHECK-NEXT: .cfi_def_cfa_offset 262140
; CHECK-NEXT: .Lcfi{{[0-9]+}}
; CHECK-NEXT: .cfi_offset 15, 0
; CHECK-NEXT: extsp 34467
; CHECK-NEXT: .Lcfi{{[0-9]+}}
; CHECK-NEXT: .cfi_def_cfa_offset 400008
; CHECK-NEXT: ldaw sp, sp[65535]
; CHECK-NEXT: retsp 34467
@ -109,28 +101,20 @@ entry:
; CHECKFP-NEXT: .text
; CHECKFP-LABEL: f6:
; CHECKFP: entsp 65535
; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
; CHECKFP-NEXT: .cfi_def_cfa_offset 262140
; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
; CHECKFP-NEXT: .cfi_offset 15, 0
; CHECKFP-NEXT: extsp 65535
; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
; CHECKFP-NEXT: .cfi_def_cfa_offset 524280
; CHECKFP-NEXT: extsp 65535
; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
; CHECKFP-NEXT: .cfi_def_cfa_offset 786420
; CHECKFP-NEXT: extsp 3398
; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
; CHECKFP-NEXT: .cfi_def_cfa_offset 800012
; CHECKFP-NEXT: stw r10, sp[1]
; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
; CHECKFP-NEXT: .cfi_offset 10, -800008
; CHECKFP-NEXT: ldaw r10, sp[0]
; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
; CHECKFP-NEXT: .cfi_def_cfa_register 10
; CHECKFP-NEXT: ldw r1, cp[.LCPI[[CNST0]]]
; CHECKFP-NEXT: stw [[REG:r[4-9]+]], r10[r1]
; CHECKFP-NEXT: .Lcfi{{[0-9]+}}
; CHECKFP-NEXT: .cfi_offset 4, -4
; CHECKFP-NEXT: mov [[REG]], r0
; CHECKFP-NEXT: extsp 1
@ -162,23 +146,17 @@ entry:
; CHECK-NEXT: .text
; CHECK-LABEL: f6:
; CHECK: entsp 65535
; CHECK-NEXT: .Lcfi{{[0-9]+}}
; CHECK-NEXT: .cfi_def_cfa_offset 262140
; CHECK-NEXT: .Lcfi{{[0-9]+}}
; CHECK-NEXT: .cfi_offset 15, 0
; CHECK-NEXT: extsp 65535
; CHECK-NEXT: .Lcfi{{[0-9]+}}
; CHECK-NEXT: .cfi_def_cfa_offset 524280
; CHECK-NEXT: extsp 65535
; CHECK-NEXT: .Lcfi{{[0-9]+}}
; CHECK-NEXT: .cfi_def_cfa_offset 786420
; CHECK-NEXT: extsp 3399
; CHECK-NEXT: .Lcfi{{[0-9]+}}
; CHECK-NEXT: .cfi_def_cfa_offset 800016
; CHECK-NEXT: ldaw r1, sp[0]
; CHECK-NEXT: ldw r2, cp[.LCPI[[CNST0]]]
; CHECK-NEXT: stw [[REG:r[4-9]+]], r1[r2]
; CHECK-NEXT: .Lcfi{{[0-9]+}}
; CHECK-NEXT: .cfi_offset 4, -4
; CHECK-NEXT: mov [[REG]], r0
; CHECK-NEXT: ldaw r0, sp[3]

6
llvm/test/MC/AsmParser/seh-unfinished-frame.s Normal file
View File

@ -0,0 +1,6 @@
// RUN: not llvm-mc -filetype=asm -triple x86_64-windows %s -o %t 2>%t.out
// RUN: FileCheck -input-file=%t.out %s
foo:
.seh_proc foo
// CHECK: Unfinished frame

3
llvm/test/tools/llvm-dwarfdump/X86/brief.s
View File

@ -40,12 +40,9 @@ Lfunc_begin0:
.cfi_startproc
## BB#0: ## %entry
pushq %rbp
Lcfi0:
.cfi_def_cfa_offset 16
Lcfi1:
.cfi_offset %rbp, -16
movq %rsp, %rbp
Lcfi2:
.cfi_def_cfa_register %rbp
xorl %eax, %eax
Ltmp0:

3
llvm/test/tools/llvm-dwarfdump/X86/verify_debug_info.s
View File

@ -28,12 +28,9 @@ Lfunc_begin0:
.cfi_startproc
## BB#0: ## %entry
pushq %rbp
Lcfi0:
.cfi_def_cfa_offset 16
Lcfi1:
.cfi_offset %rbp, -16
movq %rsp, %rbp
Lcfi2:
.cfi_def_cfa_register %rbp
xorl %eax, %eax
movl $0, -4(%rbp)

3
llvm/test/tools/llvm-dwarfdump/X86/verify_die_ranges.s
View File

@ -16,12 +16,9 @@ Lfunc_begin0:
.cfi_startproc
## BB#0: ## %entry
pushq %rbp
Lcfi0:
.cfi_def_cfa_offset 16
Lcfi1:
.cfi_offset %rbp, -16
movq %rsp, %rbp
Lcfi2:
.cfi_def_cfa_register %rbp
Ltmp0:
.loc 1 1 17 prologue_end ## basic.c:1:17