forked from OSchip/llvm-project
parent
665c26ab40
commit
aacc4c3b4c
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@ -2423,19 +2423,19 @@ def CVTTSD2SIrm: I<0x2C, MRMSrcMem, (ops R32:$dst, f64mem:$src),
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def CVTSS2SDrr: I<0x5A, MRMSrcReg, (ops FR64:$dst, FR32:$src),
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"cvtss2sd {$src, $dst|$dst, $src}",
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[(set FR64:$dst, (fextend FR32:$src))]>,
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Requires<[HasSSE2]>, XD;
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Requires<[HasSSE2]>, XS;
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def CVTSS2SDrm: I<0x5A, MRMSrcMem, (ops FR64:$dst, f32mem:$src),
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"cvtss2sd {$src, $dst|$dst, $src}",
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[(set FR64:$dst, (fextend (loadf32 addr:$src)))]>,
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Requires<[HasSSE2]>, XD;
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Requires<[HasSSE2]>, XS;
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def CVTSD2SSrr: I<0x5A, MRMSrcReg, (ops FR32:$dst, FR64:$src),
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"cvtsd2ss {$src, $dst|$dst, $src}",
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[(set FR32:$dst, (fround FR64:$src))]>,
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Requires<[HasSSE2]>, XS;
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Requires<[HasSSE2]>, XD;
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def CVTSD2SSrm: I<0x5A, MRMSrcMem, (ops FR32:$dst, f64mem:$src),
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"cvtsd2ss {$src, $dst|$dst, $src}",
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[(set FR32:$dst, (fround (loadf64 addr:$src)))]>,
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Requires<[HasSSE2]>, XS;
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Requires<[HasSSE2]>, XD;
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def CVTSI2SSrr: I<0x2A, MRMSrcReg, (ops FR32:$dst, R32:$src),
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"cvtsi2ss {$src, $dst|$dst, $src}",
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[(set FR32:$dst, (sint_to_fp R32:$src))]>,
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