forked from OSchip/llvm-project
parent
71cf5ab0d3
commit
aaa55a88b6
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@ -163,7 +163,7 @@ class ARMFastISel : public FastISel {
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bool SelectBinaryOp(const Instruction *I, unsigned ISDOpcode);
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bool SelectIToFP(const Instruction *I, bool isZExt);
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bool SelectFPToI(const Instruction *I, bool isZExt);
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bool SelectSDiv(const Instruction *I);
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bool SelectDiv(const Instruction *I, bool isSigned);
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bool SelectSRem(const Instruction *I);
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bool SelectCall(const Instruction *I, const char *IntrMemName);
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bool SelectIntrinsicCall(const IntrinsicInst &I);
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@ -1671,7 +1671,7 @@ bool ARMFastISel::SelectSelect(const Instruction *I) {
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return true;
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}
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bool ARMFastISel::SelectSDiv(const Instruction *I) {
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bool ARMFastISel::SelectDiv(const Instruction *I, bool isSigned) {
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MVT VT;
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Type *Ty = I->getType();
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if (!isTypeLegal(Ty, VT))
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@ -1685,15 +1685,15 @@ bool ARMFastISel::SelectSDiv(const Instruction *I) {
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// Otherwise emit a libcall.
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RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
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if (VT == MVT::i8)
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LC = RTLIB::SDIV_I8;
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LC = isSigned ? RTLIB::SDIV_I8 : RTLIB::UDIV_I8;
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else if (VT == MVT::i16)
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LC = RTLIB::SDIV_I16;
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LC = isSigned ? RTLIB::SDIV_I16 : RTLIB::UDIV_I16;
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else if (VT == MVT::i32)
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LC = RTLIB::SDIV_I32;
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LC = isSigned ? RTLIB::SDIV_I32 : RTLIB::UDIV_I32;
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else if (VT == MVT::i64)
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LC = RTLIB::SDIV_I64;
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LC = isSigned ? RTLIB::SDIV_I64 : RTLIB::UDIV_I64;
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else if (VT == MVT::i128)
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LC = RTLIB::SDIV_I128;
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LC = isSigned ? RTLIB::SDIV_I128 : RTLIB::UDIV_I128;
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assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported SDIV!");
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return ARMEmitLibcall(I, LC);
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@ -2463,7 +2463,9 @@ bool ARMFastISel::TargetSelectInstruction(const Instruction *I) {
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case Instruction::FMul:
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return SelectBinaryOp(I, ISD::FMUL);
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case Instruction::SDiv:
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return SelectSDiv(I);
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return SelectDiv(I, /*isSigned*/ true);
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case Instruction::UDiv:
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return SelectDiv(I, /*isSigned*/ false);
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case Instruction::SRem:
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return SelectSRem(I);
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case Instruction::Call:
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