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[InstCombine] fix demanded-bits propagation for zext/trunc 

I was comparing the demanded-bits implementations between InstCombine
and TargetLowering as part of investigating questions in D42088 and
noticed that this was wrong in IR. We were losing all of the prior
known bits when we got back to the 'zext'.

llvm-svn: 322662
This commit is contained in:
Sanjay Patel 2018-01-17 14:39:28 +00:00
parent 10d95c53af
commit aa766efd09
2 changed files with 2 additions and 4 deletions
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2
llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
View File

@ -333,7 +333,7 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
KnownBits InputKnown(SrcBitWidth);
if (SimplifyDemandedBits(I, 0, InputDemandedMask, InputKnown, Depth + 1))
return I;
Known = Known.zextOrTrunc(BitWidth);
Known = InputKnown.zextOrTrunc(BitWidth);
// Any top bits are known to be zero.
if (BitWidth > SrcBitWidth)
Known.Zero.setBitsFrom(SrcBitWidth);

4
llvm/test/Transforms/InstCombine/and.ll
View File

@ -376,9 +376,7 @@ define i32 @and_zext_demanded(i16 %x, i32 %y) {
; CHECK-LABEL: @and_zext_demanded(
; CHECK-NEXT: [[S:%.*]] = lshr i16 %x, 8
; CHECK-NEXT: [[Z:%.*]] = zext i16 [[S]] to i32
; CHECK-NEXT: [[O:%.*]] = or i32 %y, 255
; CHECK-NEXT: [[A:%.*]] = and i32 [[O]], [[Z]]
; CHECK-NEXT: ret i32 [[A]]
; CHECK-NEXT: ret i32 [[Z]]
;
%s = lshr i16 %x, 8
%z = zext i16 %s to i32