forked from OSchip/llvm-project
* Specify that FP arith options have 3 operands
* Correctly load FP constants from the constant pool, should be refactored llvm-svn: 14799
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@ -1615,16 +1615,16 @@ void ISel::emitBinaryFPOperation(MachineBasicBlock *BB,
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{ PPC32::FADD, PPC32::FSUB, PPC32::FMUL, PPC32::FDIV }, // Double
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};
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unsigned Op1Reg = getReg(Op1C);
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unsigned Opcode = OpcodeTab[Ty != Type::FloatTy][OperatorClass];
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unsigned Op1Reg = getReg(Op1C, BB, IP);
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unsigned Op0r = getReg(Op0, BB, IP);
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BuildMI(*BB, IP, Opcode, DestReg).addReg(Op0r).addReg(Op1Reg);
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BuildMI(*BB, IP, Opcode, 2, DestReg).addReg(Op0r).addReg(Op1Reg);
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return;
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}
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// Special case: R1 = op <const fp>, R2
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if (ConstantFP *CFP = dyn_cast<ConstantFP>(Op0))
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if (CFP->isExactlyValue(-0.0) && OperatorClass == 1) {
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if (ConstantFP *Op0C = dyn_cast<ConstantFP>(Op0))
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if (Op0C->isExactlyValue(-0.0) && OperatorClass == 1) {
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// -0.0 - X === -X
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unsigned op1Reg = getReg(Op1, BB, IP);
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BuildMI(*BB, IP, PPC32::FNEG, 1, DestReg).addReg(op1Reg);
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@ -1634,22 +1634,19 @@ void ISel::emitBinaryFPOperation(MachineBasicBlock *BB,
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// Create a constant pool entry for this constant.
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MachineConstantPool *CP = F->getConstantPool();
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unsigned CPI = CP->getConstantPoolIndex(CFP);
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const Type *Ty = CFP->getType();
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unsigned CPI = CP->getConstantPoolIndex(Op0C);
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const Type *Ty = Op0C->getType();
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assert(Ty == Type::FloatTy || Ty == Type::DoubleTy && "Unknown FP type!");
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static const unsigned OpcodeTab[][4] = {
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{ PPC32::FADDS, PPC32::FSUBS, PPC32::FMULS, PPC32::FDIVS }, // Float
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{ PPC32::FADD, PPC32::FSUB, PPC32::FMUL, PPC32::FDIV }, // Double
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};
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assert(Ty == Type::FloatTy || Ty == Type::DoubleTy && "Unknown FP type!");
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unsigned TempReg = makeAnotherReg(Ty);
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unsigned LoadOpcode = (Ty == Type::FloatTy) ? PPC32::LFS : PPC32::LFD;
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addConstantPoolReference(BuildMI(*BB, IP, LoadOpcode, 2, TempReg), CPI);
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unsigned Opcode = OpcodeTab[Ty != Type::FloatTy][OperatorClass];
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unsigned Op1r = getReg(Op1, BB, IP);
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BuildMI(*BB, IP, Opcode, DestReg).addReg(TempReg).addReg(Op1r);
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unsigned Op0Reg = getReg(Op0C, BB, IP);
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unsigned Op1Reg = getReg(Op1, BB, IP);
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BuildMI(*BB, IP, Opcode, 2, DestReg).addReg(Op0Reg).addReg(Op1Reg);
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return;
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}
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@ -1615,16 +1615,16 @@ void ISel::emitBinaryFPOperation(MachineBasicBlock *BB,
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{ PPC32::FADD, PPC32::FSUB, PPC32::FMUL, PPC32::FDIV }, // Double
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};
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unsigned Op1Reg = getReg(Op1C);
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unsigned Opcode = OpcodeTab[Ty != Type::FloatTy][OperatorClass];
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unsigned Op1Reg = getReg(Op1C, BB, IP);
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unsigned Op0r = getReg(Op0, BB, IP);
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BuildMI(*BB, IP, Opcode, DestReg).addReg(Op0r).addReg(Op1Reg);
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BuildMI(*BB, IP, Opcode, 2, DestReg).addReg(Op0r).addReg(Op1Reg);
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return;
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}
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// Special case: R1 = op <const fp>, R2
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if (ConstantFP *CFP = dyn_cast<ConstantFP>(Op0))
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if (CFP->isExactlyValue(-0.0) && OperatorClass == 1) {
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if (ConstantFP *Op0C = dyn_cast<ConstantFP>(Op0))
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if (Op0C->isExactlyValue(-0.0) && OperatorClass == 1) {
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// -0.0 - X === -X
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unsigned op1Reg = getReg(Op1, BB, IP);
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BuildMI(*BB, IP, PPC32::FNEG, 1, DestReg).addReg(op1Reg);
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@ -1634,22 +1634,19 @@ void ISel::emitBinaryFPOperation(MachineBasicBlock *BB,
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// Create a constant pool entry for this constant.
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MachineConstantPool *CP = F->getConstantPool();
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unsigned CPI = CP->getConstantPoolIndex(CFP);
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const Type *Ty = CFP->getType();
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unsigned CPI = CP->getConstantPoolIndex(Op0C);
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const Type *Ty = Op0C->getType();
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assert(Ty == Type::FloatTy || Ty == Type::DoubleTy && "Unknown FP type!");
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static const unsigned OpcodeTab[][4] = {
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{ PPC32::FADDS, PPC32::FSUBS, PPC32::FMULS, PPC32::FDIVS }, // Float
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{ PPC32::FADD, PPC32::FSUB, PPC32::FMUL, PPC32::FDIV }, // Double
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};
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assert(Ty == Type::FloatTy || Ty == Type::DoubleTy && "Unknown FP type!");
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unsigned TempReg = makeAnotherReg(Ty);
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unsigned LoadOpcode = (Ty == Type::FloatTy) ? PPC32::LFS : PPC32::LFD;
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addConstantPoolReference(BuildMI(*BB, IP, LoadOpcode, 2, TempReg), CPI);
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unsigned Opcode = OpcodeTab[Ty != Type::FloatTy][OperatorClass];
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unsigned Op1r = getReg(Op1, BB, IP);
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BuildMI(*BB, IP, Opcode, DestReg).addReg(TempReg).addReg(Op1r);
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unsigned Op0Reg = getReg(Op0C, BB, IP);
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unsigned Op1Reg = getReg(Op1, BB, IP);
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BuildMI(*BB, IP, Opcode, 2, DestReg).addReg(Op0Reg).addReg(Op1Reg);
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return;
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}
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