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[SystemZ] Prevent Merging Bitcast with non-normal loads 

Fixes PR32505.

Reviewers: uweigand, jonpa

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31609

llvm-svn: 299552
This commit is contained in:
Nirav Dave 2017-04-05 15:42:48 +00:00
parent dfeea506c0
commit aa65a2beb8
2 changed files with 23 additions and 2 deletions
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5
llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
View File

@ -2792,8 +2792,9 @@ SDValue SystemZTargetLowering::lowerBITCAST(SDValue Op,
// but we need this case for bitcasts that are created during lowering
// and which are then lowered themselves.
if (auto *LoadN = dyn_cast<LoadSDNode>(In))
return DAG.getLoad(ResVT, DL, LoadN->getChain(), LoadN->getBasePtr(),
LoadN->getMemOperand());
if (ISD::isNormalLoad(LoadN))
return DAG.getLoad(ResVT, DL, LoadN->getChain(), LoadN->getBasePtr(),
LoadN->getMemOperand());
if (InVT == MVT::i32 && ResVT == MVT::f32) {
SDValue In64;

20
llvm/test/CodeGen/SystemZ/pr32505.ll Normal file
View File

@ -0,0 +1,20 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mcpu=zEC12 -o - %s | FileCheck %s
target triple = "s390x-ibm-linux"
define <2 x float> @pr32505(<2 x i8> * %a) {
; CHECK-LABEL: pr32505:
; CHECK: # BB#0:
; CHECK-NEXT: lbh %r0, 0(%r2)
; CHECK-NEXT: ldgr %f0, %r0
; CHECK-NEXT: lbh %r0, 1(%r2)
; CHECK-NEXT: ldgr %f2, %r0
; CHECK-NEXT: # kill: %F0S<def> %F0S<kill> %F0D<kill>
; CHECK-NEXT: # kill: %F2S<def> %F2S<kill> %F2D<kill>
; CHECK-NEXT: br %r14
%L17 = load <2 x i8>, <2 x i8>* %a
%Se21 = sext <2 x i8> %L17 to <2 x i32>
%BC = bitcast <2 x i32> %Se21 to <2 x float>
ret <2 x float> %BC
}