forked from OSchip/llvm-project
[RISCV][NFC] Add tests that capture current encodings for DWARF EH
Items which are known to be wrong/different vs GCC are marked as TODO and will be address in follow-up patches. llvm-svn: 366326
This commit is contained in:
Alex Bradbury
parent
aefcf5100a
commit
aa55124eca
|
|
@ -0,0 +1,68 @@
|
|||
; RUN: llc -march=riscv32 --code-model=small < %s \
|
||||
; RUN: | FileCheck --check-prefixes=CHECK,SMALL %s
|
||||
; RUN: llc -march=riscv32 --code-model=medium < %s \
|
||||
; RUN: | FileCheck --check-prefixes=CHECK,MED %s
|
||||
; RUN: llc -march=riscv32 --code-model=small -relocation-model=pic < %s \
|
||||
; RUN: | FileCheck --check-prefixes=CHECK,PIC %s
|
||||
; RUN: llc -march=riscv32 --code-model=medium -relocation-model=pic < %s \
|
||||
; RUN: | FileCheck --check-prefixes=CHECK,PIC %s
|
||||
; RUN: llc -march=riscv64 --code-model=small < %s \
|
||||
; RUN: | FileCheck --check-prefixes=CHECK,SMALL %s
|
||||
; RUN: llc -march=riscv64 --code-model=medium < %s \
|
||||
; RUN: | FileCheck --check-prefixes=CHECK,MED %s
|
||||
; RUN: llc -march=riscv64 --code-model=small -relocation-model=pic < %s \
|
||||
; RUN: | FileCheck --check-prefixes=CHECK,PIC %s
|
||||
; RUN: llc -march=riscv64 --code-model=medium -relocation-model=pic < %s \
|
||||
; RUN: | FileCheck --check-prefixes=CHECK,PIC %s
|
||||
|
||||
declare void @throw_exception()
|
||||
|
||||
declare i32 @__gxx_personality_v0(...)
|
||||
|
||||
declare i8* @__cxa_begin_catch(i8*)
|
||||
|
||||
declare void @__cxa_end_catch()
|
||||
|
||||
; CHECK-LABEL: test1:
|
||||
; CHECK: .cfi_startproc
|
||||
; TODO: Personality encoding should be DW_EH_PE_indirect | DW_EH_PE_pcrel |
|
||||
; DW_EH_PE_sdata4
|
||||
; CHECK-NEXT: .cfi_personality 0, __gxx_personality_v0
|
||||
; TODO: LSDA encoding should be DW_EH_PE_pcrel | DW_EH_PE_sdata4
|
||||
; CHECK-NEXT: .cfi_lsda 0, .Lexception0
|
||||
|
||||
define void @test1() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
|
||||
entry:
|
||||
invoke void @throw_exception() to label %try.cont unwind label %lpad
|
||||
|
||||
lpad:
|
||||
%0 = landingpad { i8*, i32 }
|
||||
catch i8* null
|
||||
%1 = extractvalue { i8*, i32 } %0, 0
|
||||
%2 = tail call i8* @__cxa_begin_catch(i8* %1)
|
||||
tail call void @__cxa_end_catch()
|
||||
br label %try.cont
|
||||
|
||||
try.cont:
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: GCC_except_table0:
|
||||
; CHECK-NEXT: .Lexception0:
|
||||
; CHECK-NEXT: .byte 255 # @LPStart Encoding = omit
|
||||
; TODO: TTypeEncoding encoding should be DW_EH_PE_indirect | DW_EH_PE_pcrel |
|
||||
; DW_EH_PE_sdata4
|
||||
; CHECK-NEXT: .byte 0 # @TType Encoding = absptr
|
||||
; TODO: call site encoding should be DW_EH_PE_udata4
|
||||
; CHECK: .Lttbaseref0:
|
||||
; CHECK-NEXT: .byte 1 # Call site Encoding = uleb128
|
||||
; CHECK-NEXT: .uleb128 .Lcst_end0-.Lcst_begin0
|
||||
; CHECK-NEXT: cst_begin0:
|
||||
; CHECK-NEXT: .uleb128 .Ltmp0-.Lfunc_begin0 # >> Call Site 1 <<
|
||||
; CHECK-NEXT: .uleb128 .Ltmp1-.Ltmp0 # Call between .Ltmp0 and .Ltmp1
|
||||
; CHECK-NEXT: .uleb128 .Ltmp2-.Lfunc_begin0 # jumps to .Ltmp2
|
||||
; CHECK-NEXT: .byte 1 # On action: 1
|
||||
; CHECK-NEXT: .uleb128 .Ltmp1-.Lfunc_begin0 # >> Call Site 2 <<
|
||||
; CHECK-NEXT: .uleb128 .Lfunc_end0-.Ltmp1 # Call between .Ltmp1 and .Lfunc_end0
|
||||
; CHECK-NEXT: .byte 0 # has no landing pad
|
||||
; CHECK-NEXT: .byte 0 # On action: cleanup
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
# RUN: llvm-mc -filetype=obj -triple=riscv32 < %s | llvm-dwarfdump -eh-frame - \
|
||||
# RUN: | FileCheck --check-prefixes=CHECK,RV32 %s
|
||||
# RUN: llvm-mc -filetype=obj -triple=riscv64 < %s | llvm-dwarfdump -eh-frame - \
|
||||
# RUN: | FileCheck --check-prefixes=CHECK,RV64 %s
|
||||
|
||||
func:
|
||||
.cfi_startproc
|
||||
ret
|
||||
.cfi_endproc
|
||||
|
||||
# CHECK: 00000000 00000010 ffffffff CIE
|
||||
# CHECK: Version: 1
|
||||
# CHECK: Augmentation: "zR"
|
||||
# CHECK: Code alignment factor: 1
|
||||
|
||||
# TODO: gas uses -4 for the data alignment factor for both RV32 and RV64. They
|
||||
# do so on the basis that on RV64F, F registers may only be 4 bytes
|
||||
# (DWARF2_CIE_DATA_ALIGNMENT).
|
||||
|
||||
# RV32: Data alignment factor: -4
|
||||
# RV64: Data alignment factor: -8
|
||||
|
||||
# CHECK: Return address column: 1
|
||||
|
||||
# Check the pointer encoding for address pointers used in FDE. This is set by
|
||||
# FDECFIEncoding and should be DW_EH_PE_pcrel | DW_EH_PE_sdata4 (0x1b).
|
||||
|
||||
# CHECK: Augmentation data: 1B
|
||||
# CHECK: DW_CFA_def_cfa: reg2 +0
|
||||
#
|
||||
# CHECK: 00000014 00000010 00000018 FDE cie=00000018 pc=00000000...00000004
|
||||
# CHECK: DW_CFA_nop:
|
||||
# CHECK: DW_CFA_nop:
|
||||
# CHECK: DW_CFA_nop:
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+relax < %s \
|
||||
# RUN: | llvm-readobj -r | FileCheck -check-prefix=RELAX-RELOC %s
|
||||
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-relax < %s \
|
||||
# RUN: | llvm-readobj -r | FileCheck -check-prefix=NORELAX-RELOC %s
|
||||
|
||||
func:
|
||||
.cfi_startproc
|
||||
ret
|
||||
.cfi_endproc
|
||||
|
||||
# TODO: Should produce R_RISCV_32_PCREL for the FDE pc relocation. Many of the
|
||||
# ADD32/SUB32 relocations also can be safely resolved even with linker
|
||||
# relaxation enabled. This test is written to capture current behaviour, in
|
||||
# preparation for follow-on patches to fix it.
|
||||
|
||||
# RELAX-RELOC: Section (4) .rela.eh_frame {
|
||||
# RELAX-RELOC-NEXT: 0x0 R_RISCV_ADD32 - 0xFFFFFFFC
|
||||
# RELAX-RELOC-NEXT: 0x0 R_RISCV_SUB32 - 0x0
|
||||
# RELAX-RELOC-NEXT: 0x14 R_RISCV_ADD32 - 0x0
|
||||
# RELAX-RELOC-NEXT: 0x14 R_RISCV_SUB32 - 0x0
|
||||
# RELAX-RELOC-NEXT: 0x18 R_RISCV_ADD32 - 0x0
|
||||
# RELAX-RELOC-NEXT: 0x18 R_RISCV_SUB32 - 0x0
|
||||
# RELAX-RELOC-NEXT: 0x1C R_RISCV_ADD32 - 0x0
|
||||
# RELAX-RELOC-NEXT: 0x1C R_RISCV_SUB32 - 0x0
|
||||
# RELAX-RELOC-NEXT: 0x20 R_RISCV_ADD32 - 0x0
|
||||
# RELAX-RELOC-NEXT: 0x20 R_RISCV_SUB32 - 0x0
|
||||
# RELAX-RELOC-NEXT: }
|
||||
|
||||
# NORELAX-RELOC: Section (4) .rela.eh_frame {
|
||||
# NORELAX-RELOC-NEXT: 0x1C R_RISCV_32_PCREL - 0x0
|
||||
# NORELAX-RELOC-NEXT: }
|
||||
Loading…
Reference in New Issue