forked from OSchip/llvm-project
[X86][ABI] Do not return float/double from x87 registers when x87 is disabled
This is aligned with GCC's behavior. Also, alias `-mno-fp-ret-in-387` to `-mno-x87`, by which we can fix pr51498. Reviewed By: nickdesaulniers Differential Revision: https://reviews.llvm.org/D112143
This commit is contained in:
Phoebe Wang
parent
c723569512
commit
a9fba2be35
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@ -4184,6 +4184,7 @@ def mx87 : Flag<["-"], "mx87">, Group<m_x86_Features_Group>;
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def mno_x87 : Flag<["-"], "mno-x87">, Group<m_x86_Features_Group>;
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def m80387 : Flag<["-"], "m80387">, Alias<mx87>;
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def mno_80387 : Flag<["-"], "mno-80387">, Alias<mno_x87>;
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def mno_fp_ret_in_387 : Flag<["-"], "mno-fp-ret-in-387">, Alias<mno_x87>;
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def mmmx : Flag<["-"], "mmmx">, Group<m_x86_Features_Group>;
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def mno_mmx : Flag<["-"], "mno-mmx">, Group<m_x86_Features_Group>;
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def m3dnow : Flag<["-"], "m3dnow">, Group<m_x86_Features_Group>;
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@ -2,6 +2,7 @@
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// RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mno-x87 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=NO-X87 %s
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// RUN: %clang -target i386-unknown-linux-gnu -march=i386 -m80387 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=X87 %s
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// RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mno-80387 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=NO-X87 %s
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// RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mno-fp-ret-in-387 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=NO-X87 %s
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// X87: "-target-feature" "+x87"
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// NO-X87: "-target-feature" "-x87"
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@ -273,7 +273,10 @@ def RetCC_X86_32_C : CallingConv<[
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// conv.
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CCIfInReg<CCIfSubtarget<"hasSSE2()",
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CCIfType<[f32, f64], CCAssignToReg<[XMM0,XMM1,XMM2]>>>>,
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CCIfType<[f32,f64], CCAssignToReg<[FP0, FP1]>>,
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CCIfSubtarget<"hasX87()",
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CCIfType<[f32, f64], CCAssignToReg<[FP0, FP1]>>>,
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CCIfNotSubtarget<"hasX87()",
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CCIfType<[f32], CCAssignToReg<[EAX, EDX, ECX]>>>,
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CCIfType<[f16], CCAssignToReg<[XMM0,XMM1,XMM2]>>,
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CCDelegateTo<RetCC_X86Common>
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]>;
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@ -2371,6 +2371,11 @@ MVT X86TargetLowering::getRegisterTypeForCallingConv(LLVMContext &Context,
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if (VT == MVT::v3f16 && Subtarget.hasFP16())
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return MVT::v8f16;
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// We will use more GPRs for f64 and f80 on 32 bits when x87 is disabled.
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if ((VT == MVT::f64 || VT == MVT::f80) && !Subtarget.is64Bit() &&
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!Subtarget.hasX87())
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return MVT::i32;
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return TargetLowering::getRegisterTypeForCallingConv(Context, CC, VT);
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}
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@ -2394,6 +2399,15 @@ unsigned X86TargetLowering::getNumRegistersForCallingConv(LLVMContext &Context,
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if (VT == MVT::v3f16 && Subtarget.hasFP16())
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return 1;
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// We have to split f64 to 2 registers and f80 to 3 registers on 32 bits if
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// x87 is disabled.
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if (!Subtarget.is64Bit() && !Subtarget.hasX87()) {
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if (VT == MVT::f64)
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return 2;
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if (VT == MVT::f80)
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return 3;
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}
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return TargetLowering::getNumRegistersForCallingConv(Context, CC, VT);
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}
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@ -0,0 +1,193 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-- | FileCheck %s -check-prefix=X87
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; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s -check-prefixes=NOX87,NOSSE-NOX87
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; RUN: llc < %s -mtriple=i686-- -mattr=-x87,-sse2 | FileCheck %s -check-prefixes=NOX87,NOSSE-NOX87
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; RUN: llc < %s -mtriple=i686-- -mattr=-x87,+sse2 | FileCheck %s -check-prefixes=NOX87,SSE-NOX87
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define float @f1(float %a, float %b) nounwind {
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; X87-LABEL: f1:
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; X87: # %bb.0: # %entry
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; X87-NEXT: flds {{[0-9]+}}(%esp)
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; X87-NEXT: retl
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;
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; NOSSE-NOX87-LABEL: f1:
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; NOSSE-NOX87: # %bb.0: # %entry
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; NOSSE-NOX87-NEXT: movl {{[0-9]+}}(%esp), %eax
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; NOSSE-NOX87-NEXT: retl
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;
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; SSE-NOX87-LABEL: f1:
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; SSE-NOX87: # %bb.0: # %entry
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; SSE-NOX87-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; SSE-NOX87-NEXT: movd %xmm0, %eax
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; SSE-NOX87-NEXT: retl
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entry:
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ret float %b
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}
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define double @f2(double %a, double %b) nounwind {
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; X87-LABEL: f2:
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; X87: # %bb.0: # %entry
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; X87-NEXT: fldl {{[0-9]+}}(%esp)
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; X87-NEXT: retl
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;
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; NOX87-LABEL: f2:
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; NOX87: # %bb.0: # %entry
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; NOX87-NEXT: movl {{[0-9]+}}(%esp), %eax
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; NOX87-NEXT: movl {{[0-9]+}}(%esp), %edx
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; NOX87-NEXT: retl
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entry:
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ret double %b
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}
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define x86_fp80 @f3(x86_fp80 %a, x86_fp80 %b) nounwind {
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; X87-LABEL: f3:
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; X87: # %bb.0: # %entry
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; X87-NEXT: fldt {{[0-9]+}}(%esp)
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; X87-NEXT: retl
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;
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; NOX87-LABEL: f3:
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; NOX87: # %bb.0: # %entry
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; NOX87-NEXT: movl {{[0-9]+}}(%esp), %eax
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; NOX87-NEXT: movl {{[0-9]+}}(%esp), %edx
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; NOX87-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; NOX87-NEXT: retl
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entry:
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ret x86_fp80 %b
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}
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define float @f4(float %a, float %b) nounwind {
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; X87-LABEL: f4:
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; X87: # %bb.0: # %entry
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; X87-NEXT: flds {{[0-9]+}}(%esp)
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; X87-NEXT: fadds {{[0-9]+}}(%esp)
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; X87-NEXT: retl
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;
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; NOSSE-NOX87-LABEL: f4:
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; NOSSE-NOX87: # %bb.0: # %entry
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; NOSSE-NOX87-NEXT: pushl {{[0-9]+}}(%esp)
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; NOSSE-NOX87-NEXT: pushl {{[0-9]+}}(%esp)
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; NOSSE-NOX87-NEXT: calll __addsf3
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; NOSSE-NOX87-NEXT: addl $8, %esp
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; NOSSE-NOX87-NEXT: retl
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;
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; SSE-NOX87-LABEL: f4:
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; SSE-NOX87: # %bb.0: # %entry
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; SSE-NOX87-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; SSE-NOX87-NEXT: addss {{[0-9]+}}(%esp), %xmm0
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; SSE-NOX87-NEXT: movd %xmm0, %eax
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; SSE-NOX87-NEXT: retl
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entry:
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%0 = fadd float %a, %b
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ret float %0
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}
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define double @f5(double %a, double %b) nounwind {
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; X87-LABEL: f5:
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; X87: # %bb.0: # %entry
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; X87-NEXT: fldl {{[0-9]+}}(%esp)
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; X87-NEXT: faddl {{[0-9]+}}(%esp)
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; X87-NEXT: retl
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;
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; NOSSE-NOX87-LABEL: f5:
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; NOSSE-NOX87: # %bb.0: # %entry
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; NOSSE-NOX87-NEXT: pushl {{[0-9]+}}(%esp)
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; NOSSE-NOX87-NEXT: pushl {{[0-9]+}}(%esp)
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; NOSSE-NOX87-NEXT: pushl {{[0-9]+}}(%esp)
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; NOSSE-NOX87-NEXT: pushl {{[0-9]+}}(%esp)
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; NOSSE-NOX87-NEXT: calll __adddf3
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; NOSSE-NOX87-NEXT: addl $16, %esp
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; NOSSE-NOX87-NEXT: retl
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;
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; SSE-NOX87-LABEL: f5:
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; SSE-NOX87: # %bb.0: # %entry
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; SSE-NOX87-NEXT: pushl %ebp
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; SSE-NOX87-NEXT: movl %esp, %ebp
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; SSE-NOX87-NEXT: andl $-8, %esp
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; SSE-NOX87-NEXT: subl $8, %esp
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; SSE-NOX87-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; SSE-NOX87-NEXT: addsd 16(%ebp), %xmm0
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; SSE-NOX87-NEXT: movsd %xmm0, (%esp)
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; SSE-NOX87-NEXT: movl (%esp), %eax
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; SSE-NOX87-NEXT: movl {{[0-9]+}}(%esp), %edx
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; SSE-NOX87-NEXT: movl %ebp, %esp
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; SSE-NOX87-NEXT: popl %ebp
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; SSE-NOX87-NEXT: retl
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entry:
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%0 = fadd double %a, %b
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ret double %0
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}
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; FIXME: We should not generate x87 instructions when x87 is disabled.
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define x86_fp80 @f6(x86_fp80 %a, x86_fp80 %b) nounwind {
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; X87-LABEL: f6:
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; X87: # %bb.0: # %entry
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; X87-NEXT: fldt {{[0-9]+}}(%esp)
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; X87-NEXT: fldt {{[0-9]+}}(%esp)
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; X87-NEXT: faddp %st, %st(1)
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; X87-NEXT: retl
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;
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; NOX87-LABEL: f6:
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; NOX87: # %bb.0: # %entry
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; NOX87-NEXT: pushl %ebp
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; NOX87-NEXT: movl %esp, %ebp
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; NOX87-NEXT: andl $-8, %esp
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; NOX87-NEXT: subl $48, %esp
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; NOX87-NEXT: movl 20(%ebp), %eax
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; NOX87-NEXT: movl 24(%ebp), %ecx
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; NOX87-NEXT: movl %ecx, {{[0-9]+}}(%esp)
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; NOX87-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; NOX87-NEXT: movl 28(%ebp), %eax
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; NOX87-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; NOX87-NEXT: movl 8(%ebp), %eax
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; NOX87-NEXT: movl 12(%ebp), %ecx
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; NOX87-NEXT: movl %ecx, {{[0-9]+}}(%esp)
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; NOX87-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; NOX87-NEXT: movl 16(%ebp), %eax
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; NOX87-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; NOX87-NEXT: fldt {{[0-9]+}}(%esp)
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; NOX87-NEXT: fldt {{[0-9]+}}(%esp)
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; NOX87-NEXT: faddp %st, %st(1)
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; NOX87-NEXT: fstpt (%esp)
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; NOX87-NEXT: movl (%esp), %eax
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; NOX87-NEXT: movl {{[0-9]+}}(%esp), %edx
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; NOX87-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
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; NOX87-NEXT: movl %ebp, %esp
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; NOX87-NEXT: popl %ebp
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; NOX87-NEXT: retl
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entry:
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%0 = fadd x86_fp80 %a, %b
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ret x86_fp80 %0
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}
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define {float, float, float} @f7(float %a, float %b) nounwind {
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; X87-LABEL: f7:
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; X87: # %bb.0: # %entry
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; X87-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X87-NEXT: flds {{[0-9]+}}(%esp)
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; X87-NEXT: flds {{[0-9]+}}(%esp)
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; X87-NEXT: fstps 8(%eax)
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; X87-NEXT: fsts 4(%eax)
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; X87-NEXT: fstps (%eax)
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; X87-NEXT: retl $4
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;
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; NOSSE-NOX87-LABEL: f7:
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; NOSSE-NOX87: # %bb.0: # %entry
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; NOSSE-NOX87-NEXT: movl {{[0-9]+}}(%esp), %eax
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; NOSSE-NOX87-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; NOSSE-NOX87-NEXT: movl %eax, %edx
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; NOSSE-NOX87-NEXT: retl
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;
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; SSE-NOX87-LABEL: f7:
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; SSE-NOX87: # %bb.0: # %entry
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; SSE-NOX87-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; SSE-NOX87-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; SSE-NOX87-NEXT: movd %xmm0, %eax
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; SSE-NOX87-NEXT: movd %xmm0, %edx
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; SSE-NOX87-NEXT: movd %xmm1, %ecx
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; SSE-NOX87-NEXT: retl
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entry:
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%0 = insertvalue {float, float, float} undef, float %a, 0
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%1 = insertvalue {float, float, float} %0, float %a, 1
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%2 = insertvalue {float, float, float} %1, float %b, 2
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ret {float, float, float} %2
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}
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