The variable SAR's only take one operand too

llvm-svn: 22888
2005-08-19 00:31:37 +00:00 · 2005-08-19 00:31:37 +00:00 · a9d68f140e
parent 145695927a
commit a9d68f140e
1 changed files with 1 additions and 1 deletions
--- a/llvm/lib/Target/X86/X86ISelPattern.cpp
+++ b/llvm/lib/Target/X86/X86ISelPattern.cpp
@ -3283,7 +3283,7 @@ unsigned ISel::SelectExpr(SDOperand N) {
    case MVT::i32: Opc = X86::SAR32rCL; break;
    }
    BuildMI(BB, X86::MOV8rr, 1, X86::CL).addReg(Tmp2);
-    BuildMI(BB, Opc, 2, Result).addReg(Tmp1).addReg(Tmp2);
+    BuildMI(BB, Opc, 1, Result).addReg(Tmp1);
    return Result;

  case ISD::SETCC: