forked from OSchip/llvm-project
[SystemZ] Add comparisons of large immediates using high words
There are no corresponding patterns for small immediates because they would prevent the use of fused compare-and-branch instructions. llvm-svn: 191775
This commit is contained in:
Richard Sandiford
parent
42a694f44e
commit
a9ac0e0f75
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@ -966,6 +966,14 @@ SystemZInstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const {
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expandRIPseudo(MI, SystemZ::AFI, SystemZ::AIH, false);
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return true;
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case SystemZ::CFIMux:
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expandRIPseudo(MI, SystemZ::CFI, SystemZ::CIH, false);
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return true;
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case SystemZ::CLFIMux:
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expandRIPseudo(MI, SystemZ::CLFI, SystemZ::CLIH, false);
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return true;
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case SystemZ::RISBMux: {
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bool DestIsHigh = isHighReg(MI->getOperand(0).getReg());
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bool SrcIsHigh = isHighReg(MI->getOperand(2).getReg());
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@ -1076,8 +1076,13 @@ let Defs = [CC], CCValues = 0xE in {
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def CHI : CompareRI<"chi", 0xA7E, z_scmp, GR32, imm32sx16>;
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def CGHI : CompareRI<"cghi", 0xA7F, z_scmp, GR64, imm64sx16>;
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// Comparison with a signed 32-bit immediate.
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// Comparison with a signed 32-bit immediate. CFIMux expands to CFI or CIH,
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// depending on the choice of register.
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def CFIMux : CompareRIPseudo<z_scmp, GRX32, simm32>,
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Requires<[FeatureHighWord]>;
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def CFI : CompareRIL<"cfi", 0xC2D, z_scmp, GR32, simm32>;
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def CIH : CompareRIL<"cih", 0xCCD, z_scmp, GRH32, simm32>,
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Requires<[FeatureHighWord]>;
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def CGFI : CompareRIL<"cgfi", 0xC2C, z_scmp, GR64, imm64sx32>;
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// Comparison with memory.
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@ -1106,8 +1111,13 @@ let Defs = [CC], CCValues = 0xE, IsLogical = 1 in {
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def CLGFR : CompareRRE<"clgf", 0xB931, null_frag, GR64, GR32>;
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def CLGR : CompareRRE<"clg", 0xB921, z_ucmp, GR64, GR64>;
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// Comparison with a signed 32-bit immediate.
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// Comparison with an unsigned 32-bit immediate. CLFIMux expands to CLFI
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// or CLIH, depending on the choice of register.
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def CLFIMux : CompareRIPseudo<z_ucmp, GRX32, uimm32>,
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Requires<[FeatureHighWord]>;
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def CLFI : CompareRIL<"clfi", 0xC2F, z_ucmp, GR32, uimm32>;
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def CLIH : CompareRIL<"clih", 0xCCF, z_ucmp, GR32, uimm32>,
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Requires<[FeatureHighWord]>;
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def CLGFI : CompareRIL<"clgfi", 0xC2E, z_ucmp, GR64, imm64zx32>;
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// Comparison with memory.
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@ -669,3 +669,37 @@ define void @f30() {
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call void asm sideeffect "stepd $0", "r"(i32 %add3)
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ret void
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}
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; Test large immediate comparison involving high registers.
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define i32 @f31() {
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; CHECK-LABEL: f31:
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; CHECK: stepa [[REG1:%r[0-5]]]
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; CHECK: cih [[REG1]], 1000000000
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; CHECK: stepb [[REG2:%r[0-5]]]
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; CHECK: clih [[REG2]], 1000000000
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; CHECK: br %r14
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%res1 = call i32 asm "stepa $0", "=h"()
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%cmp1 = icmp sle i32 %res1, 1000000000
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%sel1 = select i1 %cmp1, i32 0, i32 1
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%res2 = call i32 asm "stepb $0, $1", "=h,r"(i32 %sel1)
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%cmp2 = icmp ule i32 %res2, 1000000000
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%sel2 = select i1 %cmp2, i32 0, i32 1
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ret i32 %sel2
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}
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; Test large immediate comparison involving low registers.
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define i32 @f32() {
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; CHECK-LABEL: f32:
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; CHECK: stepa [[REG1:%r[0-5]]]
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; CHECK: cfi [[REG1]], 1000000000
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; CHECK: stepb [[REG2:%r[0-5]]]
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; CHECK: clfi [[REG2]], 1000000000
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; CHECK: br %r14
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%res1 = call i32 asm "stepa $0", "=r"()
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%cmp1 = icmp sle i32 %res1, 1000000000
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%sel1 = select i1 %cmp1, i32 0, i32 1
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%res2 = call i32 asm "stepb $0, $1", "=r,r"(i32 %sel1)
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%cmp2 = icmp ule i32 %res2, 1000000000
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%sel2 = select i1 %cmp2, i32 0, i32 1
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ret i32 %sel2
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}
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@ -1351,6 +1351,24 @@
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# CHECK: chy %r15, 0
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0xe3 0xf0 0x00 0x00 0x00 0x79
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# CHECK: cih %r0, -2147483648
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0xcc 0x0d 0x80 0x00 0x00 0x00
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# CHECK: cih %r0, -1
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0xcc 0x0d 0xff 0xff 0xff 0xff
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# CHECK: cih %r0, 0
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0xcc 0x0d 0x00 0x00 0x00 0x00
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# CHECK: cih %r0, 1
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0xcc 0x0d 0x00 0x00 0x00 0x01
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# CHECK: cih %r0, 2147483647
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0xcc 0x0d 0x7f 0xff 0xff 0xff
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# CHECK: cih %r15, 0
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0xcc 0xfd 0x00 0x00 0x00 0x00
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# CHECK: clc 0(1), 0
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0xd5 0x00 0x00 0x00 0x00 0x00
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@ -1573,6 +1591,18 @@
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# CHECK: cli 4095(%r15), 42
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0x95 0x2a 0xff 0xff
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# CHECK: clih %r0, 0
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0xcc 0x0f 0x00 0x00 0x00 0x00
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# CHECK: clih %r0, 1
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0xcc 0x0f 0x00 0x00 0x00 0x01
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# CHECK: clih %r0, 4294967295
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0xcc 0x0f 0xff 0xff 0xff 0xff
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# CHECK: clih %r15, 0
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0xcc 0xff 0x00 0x00 0x00 0x00
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# CHECK: cliy -524288, 0
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0xeb 0x00 0x00 0x00 0x80 0x55
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@ -32,6 +32,22 @@
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aih %r0, (-1 << 31) - 1
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aih %r0, (1 << 31)
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#CHECK: error: invalid operand
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#CHECK: cih %r0, (-1 << 31) - 1
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#CHECK: error: invalid operand
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#CHECK: cih %r0, (1 << 31)
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cih %r0, (-1 << 31) - 1
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cih %r0, (1 << 31)
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#CHECK: error: invalid operand
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#CHECK: clih %r0, -1
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#CHECK: error: invalid operand
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#CHECK: clih %r0, (1 << 32)
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clih %r0, -1
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clih %r0, (1 << 32)
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#CHECK: error: invalid operand
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#CHECK: fidbra %f0, 0, %f0, -1
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#CHECK: error: invalid operand
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@ -679,6 +679,11 @@
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chy %r0, -524289
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chy %r0, 524288
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#CHECK: error: {{(instruction requires: high-word)?}}
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#CHECK: cih %r0, 0
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cih %r0, 0
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#CHECK: error: invalid operand
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#CHECK: cij %r0, -129, 0, 0
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#CHECK: error: invalid operand
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@ -961,6 +966,11 @@
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cli 0, -1
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cli 0, 256
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#CHECK: error: {{(instruction requires: high-word)?}}
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#CHECK: clih %r0, 0
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clih %r0, 0
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#CHECK: error: invalid operand
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#CHECK: clij %r0, -1, 0, 0
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#CHECK: error: invalid operand
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@ -135,6 +135,30 @@
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ark %r15,%r0,%r0
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ark %r7,%r8,%r9
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#CHECK: cih %r0, -2147483648 # encoding: [0xcc,0x0d,0x80,0x00,0x00,0x00]
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#CHECK: cih %r0, -1 # encoding: [0xcc,0x0d,0xff,0xff,0xff,0xff]
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#CHECK: cih %r0, 0 # encoding: [0xcc,0x0d,0x00,0x00,0x00,0x00]
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#CHECK: cih %r0, 1 # encoding: [0xcc,0x0d,0x00,0x00,0x00,0x01]
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#CHECK: cih %r0, 2147483647 # encoding: [0xcc,0x0d,0x7f,0xff,0xff,0xff]
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#CHECK: cih %r15, 0 # encoding: [0xcc,0xfd,0x00,0x00,0x00,0x00]
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cih %r0, -1 << 31
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cih %r0, -1
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cih %r0, 0
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cih %r0, 1
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cih %r0, (1 << 31) - 1
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cih %r15, 0
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#CHECK: clih %r0, 0 # encoding: [0xcc,0x0f,0x00,0x00,0x00,0x00]
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#CHECK: clih %r0, 1 # encoding: [0xcc,0x0f,0x00,0x00,0x00,0x01]
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#CHECK: clih %r0, 4294967295 # encoding: [0xcc,0x0f,0xff,0xff,0xff,0xff]
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#CHECK: clih %r15, 0 # encoding: [0xcc,0xff,0x00,0x00,0x00,0x00]
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clih %r0, 0
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clih %r0, 1
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clih %r0, (1 << 32) - 1
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clih %r15, 0
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#CHECK: fidbra %f0, 0, %f0, 0 # encoding: [0xb3,0x5f,0x00,0x00]
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#CHECK: fidbra %f0, 0, %f0, 15 # encoding: [0xb3,0x5f,0x0f,0x00]
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#CHECK: fidbra %f0, 0, %f15, 0 # encoding: [0xb3,0x5f,0x00,0x0f]
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