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[TableGen] Add a knob for MCOperandInfo expansion in gen-instr-info 

Control the MCOperandInfo expansion with `-instr-info-expand-mi-operand-info`.
For X86, this would make it possible to see memory operand type e.g.:
```
    /* MOV8rm */
    GR8, i8mem,
    /* MOV8rm_NOREX */
    GR8_NOREX, i8mem_NOREX,
```

The intended use is a follow-up diff D126116 (`getMemOperandSize`).

Reviewed By: skan

Differential Revision: https://reviews.llvm.org/D127932
This commit is contained in:
Amir Ayupov 2022-06-29 00:59:01 -07:00 committed by Amir Ayupov
parent b405407a48
commit a97a79da02
2 changed files with 55 additions and 1 deletions
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48
llvm/test/TableGen/get-operand-type-no-expand.td Normal file
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@ -0,0 +1,48 @@
// Test -instr-info-expand-mi-operand-info=0 mode which keeps complex operands
// that contain a DAG of basic operands unexpanded (the default is to expand).
include "llvm/Target/Target.td"
def archInstrInfo : InstrInfo { }
def arch : Target {
let InstructionSet = archInstrInfo;
}
def Reg : Register<"reg">;
def RegClass : RegisterClass<"foo", [i32], 0, (add Reg)>;
class ComplexOperand<int size> : Operand<iPTR> {
let MIOperandInfo = (ops i8imm, i32imm);
int Size = size;
}
def i8complex : ComplexOperand<8>;
def i512complex: ComplexOperand<512>;
def InstA : Instruction {
let Size = 1;
let OutOperandList = (outs i512complex:$a);
let InOperandList = (ins i8complex:$b, i32imm:$c);
field bits<8> Inst;
field bits<8> SoftFail = 0;
let Namespace = "MyNamespace";
}
// RUN: llvm-tblgen -gen-instr-info -I %p/../../include %s \
// RUN: -instr-info-expand-mi-operand-info=1 \
// RUN: | FileCheck %s --check-prefix=CHECK-EXPAND
// CHECK-EXPAND: #ifdef GET_INSTRINFO_OPERAND_TYPE
// CHECK-EXPAND: OpcodeOperandTypes[] = {
// CHECK-EXPAND: /* InstA */
// CHECK-EXPAND-NEXT: i8imm, i32imm, i8imm, i32imm, i32imm,
// CHECK-EXPAND: #endif // GET_INSTRINFO_OPERAND_TYPE
// RUN: llvm-tblgen -gen-instr-info -I %p/../../include %s \
// RUN: -instr-info-expand-mi-operand-info=0 \
// RUN: | FileCheck %s --check-prefix=CHECK-NOEXPAND
// CHECK-NOEXPAND: #ifdef GET_INSTRINFO_OPERAND_TYPE
// CHECK-NOEXPAND: OpcodeOperandTypes[] = {
// CHECK-NOEXPAND: /* InstA */
// CHECK-NOEXPAND-NEXT: i512complex, i8complex, i32imm,
// CHECK-NOEXPAND: #endif // GET_INSTRINFO_OPERAND_TYPE

8
llvm/utils/TableGen/InstrInfoEmitter.cpp
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@ -36,6 +36,12 @@
using namespace llvm;
cl::OptionCategory InstrInfoEmitterCat("Options for -gen-instr-info");
static cl::opt<bool> ExpandMIOperandInfo(
"instr-info-expand-mi-operand-info",
cl::desc("Expand operand's MIOperandInfo DAG into suboperands"),
cl::cat(InstrInfoEmitterCat), cl::init(true));
namespace {
class InstrInfoEmitter {
@ -391,7 +397,7 @@ void InstrInfoEmitter::emitOperandTypeMappings(
OperandOffsets.push_back(CurrentOffset);
for (const auto &Op : Inst->Operands) {
const DagInit *MIOI = Op.MIOperandInfo;
if (!MIOI || MIOI->getNumArgs() == 0) {
if (!ExpandMIOperandInfo || !MIOI || MIOI->getNumArgs() == 0) {
// Single, anonymous, operand.
OperandRecords.push_back(Op.Rec);
++CurrentOffset;