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[RISCV] eliminate the repetition declare of SDLoc DL 

Differential revision: https://reviews.llvm.org/D85002
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StephenFan 2020-07-31 13:31:48 +08:00 committed by StephenFann
parent b497665d98
commit a96921afa7
1 changed files with 0 additions and 1 deletions
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llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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@ -1003,7 +1003,6 @@ void RISCVTargetLowering::ReplaceNodeResults(SDNode *N,
case ISD::BITCAST: { case ISD::BITCAST: {
assert(N->getValueType(0) == MVT::i32 && Subtarget.is64Bit() && assert(N->getValueType(0) == MVT::i32 && Subtarget.is64Bit() &&
Subtarget.hasStdExtF() && "Unexpected custom legalisation"); Subtarget.hasStdExtF() && "Unexpected custom legalisation");
SDLoc DL(N);
SDValue Op0 = N->getOperand(0); SDValue Op0 = N->getOperand(0);
if (Op0.getValueType() != MVT::f32) if (Op0.getValueType() != MVT::f32)
return; return;