forked from OSchip/llvm-project
parent
8ff666fcb6
commit
a954e92053
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@ -90,9 +90,10 @@ def ARMWrapperPIC : SDNode<"ARMISD::WrapperPIC", SDTIntUnaryOp>;
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def ARMWrapperJT : SDNode<"ARMISD::WrapperJT", SDTIntBinOp>;
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def ARMcallseq_start : SDNode<"ISD::CALLSEQ_START", SDT_ARMCallSeqStart,
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[SDNPHasChain, SDNPOutGlue]>;
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[SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>;
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def ARMcallseq_end : SDNode<"ISD::CALLSEQ_END", SDT_ARMCallSeqEnd,
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[SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
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[SDNPHasChain, SDNPSideEffect,
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SDNPOptInGlue, SDNPOutGlue]>;
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def ARMcopystructbyval : SDNode<"ARMISD::COPY_STRUCT_BYVAL" ,
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SDT_ARMStructByVal,
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[SDNPHasChain, SDNPInGlue, SDNPOutGlue,
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@ -148,14 +149,16 @@ def ARMsube : SDNode<"ARMISD::SUBE", SDTBinaryArithWithFlagsInOut>;
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def ARMthread_pointer: SDNode<"ARMISD::THREAD_POINTER", SDT_ARMThreadPointer>;
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def ARMeh_sjlj_setjmp: SDNode<"ARMISD::EH_SJLJ_SETJMP",
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SDT_ARMEH_SJLJ_Setjmp, [SDNPHasChain]>;
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SDT_ARMEH_SJLJ_Setjmp,
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[SDNPHasChain, SDNPSideEffect]>;
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def ARMeh_sjlj_longjmp: SDNode<"ARMISD::EH_SJLJ_LONGJMP",
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SDT_ARMEH_SJLJ_Longjmp, [SDNPHasChain]>;
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SDT_ARMEH_SJLJ_Longjmp,
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[SDNPHasChain, SDNPSideEffect]>;
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def ARMMemBarrier : SDNode<"ARMISD::MEMBARRIER", SDT_ARMMEMBARRIER,
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[SDNPHasChain]>;
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[SDNPHasChain, SDNPSideEffect]>;
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def ARMMemBarrierMCR : SDNode<"ARMISD::MEMBARRIER_MCR", SDT_ARMMEMBARRIER,
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[SDNPHasChain]>;
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[SDNPHasChain, SDNPSideEffect]>;
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def ARMPreload : SDNode<"ARMISD::PRELOAD", SDT_ARMPREFETCH,
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[SDNPHasChain, SDNPMayLoad, SDNPMayStore]>;
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@ -74,9 +74,10 @@ def MipsRet : SDNode<"MipsISD::Ret", SDTNone, [SDNPHasChain, SDNPOptInGlue]>;
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// These are target-independent nodes, but have target-specific formats.
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def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_MipsCallSeqStart,
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[SDNPHasChain, SDNPOutGlue]>;
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[SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>;
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def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_MipsCallSeqEnd,
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[SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
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[SDNPHasChain, SDNPSideEffect,
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SDNPOptInGlue, SDNPOutGlue]>;
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// MAdd*/MSub* nodes
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def MipsMAdd : SDNode<"MipsISD::MAdd", SDT_MipsMAddMSub,
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@ -110,7 +111,7 @@ def MipsWrapper : SDNode<"MipsISD::Wrapper", SDTIntBinOp>;
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def MipsDynAlloc : SDNode<"MipsISD::DynAlloc", SDT_MipsDynAlloc,
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[SDNPHasChain, SDNPInGlue]>;
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def MipsSync : SDNode<"MipsISD::Sync", SDT_Sync, [SDNPHasChain]>;
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def MipsSync : SDNode<"MipsISD::Sync", SDT_Sync, [SDNPHasChain,SDNPSideEffect]>;
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def MipsExt : SDNode<"MipsISD::Ext", SDT_Ext>;
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def MipsIns : SDNode<"MipsISD::Ins", SDT_Ins>;
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@ -123,9 +123,11 @@ def PPCnop : SDNode<"PPCISD::NOP", SDT_PPCnop, [SDNPInGlue, SDNPOutGlue]>;
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def PPCload : SDNode<"PPCISD::LOAD", SDTypeProfile<1, 1, []>,
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[SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
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def PPCload_toc : SDNode<"PPCISD::LOAD_TOC", SDTypeProfile<0, 1, []>,
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[SDNPHasChain, SDNPInGlue, SDNPOutGlue]>;
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[SDNPHasChain, SDNPSideEffect,
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SDNPInGlue, SDNPOutGlue]>;
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def PPCtoc_restore : SDNode<"PPCISD::TOC_RESTORE", SDTypeProfile<0, 0, []>,
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[SDNPHasChain, SDNPInGlue, SDNPOutGlue]>;
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[SDNPHasChain, SDNPSideEffect,
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SDNPInGlue, SDNPOutGlue]>;
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def PPCmtctr : SDNode<"PPCISD::MTCTR", SDT_PPCCall,
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[SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
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def PPCbctrl_Darwin : SDNode<"PPCISD::BCTRL_Darwin", SDTNone,
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