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All v2f64 shuffle cases can be handled. 

llvm-svn: 27044
This commit is contained in:
Evan Cheng 2006-03-24 06:40:32 +00:00
parent 2204bc276d
commit a91d8a5b43
2 changed files with 8 additions and 1 deletions
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4
llvm/lib/Target/X86/README.txt
View File

@ -655,3 +655,7 @@ call _foo
Obviously it would have been better for the first mov (or any op) to store
directly %esp[0] if there are no other uses.
//===---------------------------------------------------------------------===//
Add more vector shuffle special cases using unpckhps and unpcklps.

5
llvm/lib/Target/X86/X86ISelLowering.cpp
View File

@ -2329,7 +2329,10 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1,
DAG.getNode(ISD::UNDEF, V1.getValueType()),
PermMask);
} else if (NumElems == 2 || X86::isSHUFPMask(PermMask.Val)) {
} else if (NumElems == 2) {
// All v2f64 cases are handled.
return SDOperand();
} else if (X86::isSHUFPMask(PermMask.Val)) {
SDOperand Elt = PermMask.getOperand(0);
if (cast<ConstantSDNode>(Elt)->getValue() >= NumElems) {
// Swap the operands and change mask.