From a917e885852099ba4967aeb9a19ce9be69fdb5d4 Mon Sep 17 00:00:00 2001 From: Dmitry Preobrazhensky Date: Wed, 28 Mar 2018 14:53:13 +0000 Subject: [PATCH] [AMDGPU][MC][GFX9] Added buffer_*_format_d16_hi_x See bug 36835: https://bugs.llvm.org/show_bug.cgi?id=36835 Differential Revision: https://reviews.llvm.org/D44825 Reviewers: artem.tamazov, arsenm, timcorringham llvm-svn: 328707 --- llvm/lib/Target/AMDGPU/BUFInstructions.td | 10 ++++ llvm/test/MC/AMDGPU/mubuf-gfx9.s | 48 +++++++++++++++++++ .../MC/Disassembler/AMDGPU/mubuf_gfx9.txt | 22 +++++++++ 3 files changed, 80 insertions(+) create mode 100644 llvm/test/MC/Disassembler/AMDGPU/mubuf_gfx9.txt diff --git a/llvm/lib/Target/AMDGPU/BUFInstructions.td b/llvm/lib/Target/AMDGPU/BUFInstructions.td index 521e7a5267b5..40b73c7c23fa 100644 --- a/llvm/lib/Target/AMDGPU/BUFInstructions.td +++ b/llvm/lib/Target/AMDGPU/BUFInstructions.td @@ -949,6 +949,13 @@ defm BUFFER_STORE_SHORT_D16_HI : MUBUF_Pseudo_Stores < "buffer_store_short_d16_hi", VGPR_32, i32 >; +defm BUFFER_LOAD_FORMAT_D16_HI_X : MUBUF_Pseudo_Loads < + "buffer_load_format_d16_hi_x", VGPR_32 +>; +defm BUFFER_STORE_FORMAT_D16_HI_X : MUBUF_Pseudo_Stores < + "buffer_store_format_d16_hi_x", VGPR_32 +>; + } // End HasD16LoadStore def BUFFER_WBINVL1 : MUBUF_Invalidate <"buffer_wbinvl1", @@ -1946,6 +1953,9 @@ defm BUFFER_LOAD_SBYTE_D16_HI : MUBUF_Real_AllAddr_vi <0x23>; defm BUFFER_LOAD_SHORT_D16 : MUBUF_Real_AllAddr_vi <0x24>; defm BUFFER_LOAD_SHORT_D16_HI : MUBUF_Real_AllAddr_vi <0x25>; +defm BUFFER_LOAD_FORMAT_D16_HI_X : MUBUF_Real_AllAddr_vi <0x26>; +defm BUFFER_STORE_FORMAT_D16_HI_X : MUBUF_Real_AllAddr_vi <0x27>; + defm BUFFER_ATOMIC_SWAP : MUBUF_Real_Atomic_vi <0x40>; defm BUFFER_ATOMIC_CMPSWAP : MUBUF_Real_Atomic_vi <0x41>; defm BUFFER_ATOMIC_ADD : MUBUF_Real_Atomic_vi <0x42>; diff --git a/llvm/test/MC/AMDGPU/mubuf-gfx9.s b/llvm/test/MC/AMDGPU/mubuf-gfx9.s index 390aeab350a7..d9c3fc39cfd8 100644 --- a/llvm/test/MC/AMDGPU/mubuf-gfx9.s +++ b/llvm/test/MC/AMDGPU/mubuf-gfx9.s @@ -32,3 +32,51 @@ buffer_store_byte_d16_hi v1, off, s[4:7], s1 buffer_store_short_d16_hi v1, off, s[4:7], s1 // GFX9: buffer_store_short_d16_hi v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x6c,0xe0,0x00,0x01,0x01,0x01] // VI-ERR: error: instruction not supported on this GPU + +buffer_load_format_d16_hi_x v5, off, s[8:11], s3 +// GFX9: buffer_load_format_d16_hi_x v5, off, s[8:11], s3 ; encoding: [0x00,0x00,0x98,0xe0,0x00,0x05,0x02,0x03] +// VI-ERR: error: instruction not supported on this GPU + +buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:4095 +// GFX9: buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x98,0xe0,0x00,0x05,0x02,0x03] +// VI-ERR: error + +buffer_load_format_d16_hi_x v5, v0, s[8:11], s3 idxen offset:4095 +// GFX9: buffer_load_format_d16_hi_x v5, v0, s[8:11], s3 idxen offset:4095 ; encoding: [0xff,0x2f,0x98,0xe0,0x00,0x05,0x02,0x03] +// VI-ERR: error + +buffer_load_format_d16_hi_x v5, v0, s[8:11], s3 offen offset:4095 +// GFX9: buffer_load_format_d16_hi_x v5, v0, s[8:11], s3 offen offset:4095 ; encoding: [0xff,0x1f,0x98,0xe0,0x00,0x05,0x02,0x03] +// VI-ERR: error + +buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:4095 glc +// GFX9: buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x98,0xe0,0x00,0x05,0x02,0x03] +// VI-ERR: error + +buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:4095 slc +// GFX9: buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x9a,0xe0,0x00,0x05,0x02,0x03] +// VI-ERR: error + +buffer_store_format_d16_hi_x v255, off, s[12:15], s4 +// GFX9: buffer_store_format_d16_hi_x v255, off, s[12:15], s4 ; encoding: [0x00,0x00,0x9c,0xe0,0x00,0xff,0x03,0x04] +// VI-ERR: error: instruction not supported on this GPU + +buffer_store_format_d16_hi_x v255, off, s[12:15], s4 offset:4095 +// GFX9: buffer_store_format_d16_hi_x v255, off, s[12:15], s4 offset:4095 ; encoding: [0xff,0x0f,0x9c,0xe0,0x00,0xff,0x03,0x04] +// VI-ERR: error + +buffer_store_format_d16_hi_x v1, v0, s[12:15], s4 idxen offset:4095 +// GFX9: buffer_store_format_d16_hi_x v1, v0, s[12:15], s4 idxen offset:4095 ; encoding: [0xff,0x2f,0x9c,0xe0,0x00,0x01,0x03,0x04] +// VI-ERR: error + +buffer_store_format_d16_hi_x v1, v0, s[12:15], s4 offen offset:4095 +// GFX9: buffer_store_format_d16_hi_x v1, v0, s[12:15], s4 offen offset:4095 ; encoding: [0xff,0x1f,0x9c,0xe0,0x00,0x01,0x03,0x04] +// VI-ERR: error + +buffer_store_format_d16_hi_x v1, off, s[12:15], s4 offset:4095 glc +// GFX9: buffer_store_format_d16_hi_x v1, off, s[12:15], s4 offset:4095 glc ; encoding: [0xff,0x4f,0x9c,0xe0,0x00,0x01,0x03,0x04] +// VI-ERR: error + +buffer_store_format_d16_hi_x v1, off, s[12:15], s4 offset:4095 slc +// GFX9: buffer_store_format_d16_hi_x v1, off, s[12:15], s4 offset:4095 slc ; encoding: [0xff,0x0f,0x9e,0xe0,0x00,0x01,0x03,0x04] +// VI-ERR: error diff --git a/llvm/test/MC/Disassembler/AMDGPU/mubuf_gfx9.txt b/llvm/test/MC/Disassembler/AMDGPU/mubuf_gfx9.txt new file mode 100644 index 000000000000..436c69459f50 --- /dev/null +++ b/llvm/test/MC/Disassembler/AMDGPU/mubuf_gfx9.txt @@ -0,0 +1,22 @@ +# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX9 + +# GFX9: buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:4095 glc slc ; encoding: [0xff,0x4f,0x9a,0xe0,0x00,0x05,0x02,0x03] +0xff,0x4f,0x9a,0xe0,0x00,0x05,0x02,0x03 + +# GFX9: buffer_load_format_d16_hi_x v5, v0, s[8:11], s3 idxen offset:4095 ; encoding: [0xff,0x2f,0x98,0xe0,0x00,0x05,0x02,0x03] +0xff,0x2f,0x98,0xe0,0x00,0x05,0x02,0x03 + +# GFX9: buffer_load_format_d16_hi_x v5, v0, s[8:11], s3 offen offset:4095 ; encoding: [0xff,0x1f,0x98,0xe0,0x00,0x05,0x02,0x03] +0xff,0x1f,0x98,0xe0,0x00,0x05,0x02,0x03 + +# GFX9: buffer_store_format_d16_hi_x v1, v0, s[12:15], s4 idxen offset:4095 ; encoding: [0xff,0x2f,0x9c,0xe0,0x00,0x01,0x03,0x04] +0xff,0x2f,0x9c,0xe0,0x00,0x01,0x03,0x04 + +# GFX9: buffer_store_format_d16_hi_x v1, v0, s[12:15], s4 offen offset:4095 ; encoding: [0xff,0x1f,0x9c,0xe0,0x00,0x01,0x03,0x04] +0xff,0x1f,0x9c,0xe0,0x00,0x01,0x03,0x04 + +# GFX9: buffer_store_format_d16_hi_x v1, off, s[12:15], s4 offset:4095 glc ; encoding: [0xff,0x4f,0x9c,0xe0,0x00,0x01,0x03,0x04] +0xff,0x4f,0x9c,0xe0,0x00,0x01,0x03,0x04 + +# GFX9: buffer_store_format_d16_hi_x v1, off, s[12:15], s4 offset:4095 slc ; encoding: [0xff,0x0f,0x9e,0xe0,0x00,0x01,0x03,0x04] +0xff,0x0f,0x9e,0xe0,0x00,0x01,0x03,0x04