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[AArch64][InstructionSelector] Fix unintended test changes in r283973. 

I screwed up my merge conflict and lost some of the CHECK lines.

llvm-svn: 283974
This commit is contained in:
Quentin Colombet 2016-10-12 04:12:44 +00:00
parent 9de30faeac
commit a907b5ca7c
1 changed files with 6 additions and 3 deletions
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llvm/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir
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@ -1447,15 +1447,18 @@ regBankSelected: true
# CHECK: registers: # CHECK: registers:
# CHECK-NEXT: - { id: 0, class: gpr64all } # CHECK-NEXT: - { id: 0, class: gpr64all }
# CHECK-NEXT: - { id: 1, class: gpr64all } # CHECK-NEXT: - { id: 1, class: fpr64 }
# CHECK-NEXT: - { id: 2, class: gpr64all } # CHECK-NEXT: - { id: 2, class: gpr64all }
# CHECK-NEXT: - { id: 3, class: gpr64all } # CHECK-NEXT: - { id: 3, class: gpr64all }
registers: registers:
- { id: 0, class: gpr } - { id: 0, class: gpr }
- { id: 1, class: gpr } - { id: 1, class: fpr }
- { id: 2, class: gpr } - { id: 2, class: gpr }
- { id: 3, class: gpr } - { id: 3, class: gpr }
# CHECK: %2 = COPY %0 # CHECK: body:
# CHECK: %0 = COPY %x0
# CHECK: %1 = COPY %0
# CHECK: %2 = COPY %0
# CHECK: %3 = COPY %2 # CHECK: %3 = COPY %2
body: | body: |
bb.0: bb.0: