maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[CodeGen] Support freeze expand for ppc_fp128 

Summary:
The patch D29014 has added the new ISD::FREEZE and can deal with the
integer.
The patch D76980 has added SoftenFloatRes_FREEZE for float point.
But we still lack of expand for ppc_fp128, this will cause assertion for
some cases.
This patch is to support freeze expand for ppc_fp128.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D78278
This commit is contained in:
Kang Zhang 2020-04-20 07:27:41 +00:00
parent ad9988f4da
commit a8e15ee04a
3 changed files with 48 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
View File

@ -1173,6 +1173,7 @@ void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
case ISD::FPOW: ExpandFloatRes_FPOW(N, Lo, Hi); break;
case ISD::STRICT_FPOWI:
case ISD::FPOWI: ExpandFloatRes_FPOWI(N, Lo, Hi); break;
case ISD::FREEZE: ExpandFloatRes_FREEZE(N, Lo, Hi); break;
case ISD::STRICT_FRINT:
case ISD::FRINT: ExpandFloatRes_FRINT(N, Lo, Hi); break;
case ISD::STRICT_FROUND:
@ -1466,6 +1467,17 @@ void DAGTypeLegalizer::ExpandFloatRes_FPOWI(SDNode *N,
RTLIB::POWI_PPCF128), Lo, Hi);
}
void DAGTypeLegalizer::ExpandFloatRes_FREEZE(SDNode *N,
SDValue &Lo, SDValue &Hi) {
assert(N->getValueType(0) == MVT::ppcf128 &&
"Logic only correct for ppcf128!");
SDLoc dl(N);
GetExpandedFloat(N->getOperand(0), Lo, Hi);
Lo = DAG.getNode(ISD::FREEZE, dl, Lo.getValueType(), Lo);
Hi = DAG.getNode(ISD::FREEZE, dl, Hi.getValueType(), Hi);
}
void DAGTypeLegalizer::ExpandFloatRes_FREM(SDNode *N,
SDValue &Lo, SDValue &Hi) {
ExpandFloatRes_Binary(N, GetFPLibCall(N->getValueType(0),

1
llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
View File

@ -599,6 +599,7 @@ private:
void ExpandFloatRes_FP_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
void ExpandFloatRes_FPOW (SDNode *N, SDValue &Lo, SDValue &Hi);
void ExpandFloatRes_FPOWI (SDNode *N, SDValue &Lo, SDValue &Hi);
void ExpandFloatRes_FREEZE (SDNode *N, SDValue &Lo, SDValue &Hi);
void ExpandFloatRes_FREM (SDNode *N, SDValue &Lo, SDValue &Hi);
void ExpandFloatRes_FRINT (SDNode *N, SDValue &Lo, SDValue &Hi);
void ExpandFloatRes_FROUND (SDNode *N, SDValue &Lo, SDValue &Hi);

35
llvm/test/CodeGen/PowerPC/ppcf128-freeze.mir Normal file
View File

@ -0,0 +1,35 @@
# RUN: llc -mtriple powerpc64le-unknown-linux-gnu -start-after=codegenprepare \
# RUN: -o - %s -verify-machineinstrs | FileCheck %s
--- |
define ppc_fp128 @freeze_select(ppc_fp128 %a, ppc_fp128 %b) {
%sel.frozen = freeze ppc_fp128 %a
%cmp = fcmp one ppc_fp128 %sel.frozen, 0xM00000000000000000000000000000000
br i1 %cmp, label %select.end, label %select.false
select.false: ; preds = %0
br label %select.end
select.end: ; preds = %0, %select.false
%sel = phi ppc_fp128 [ %a, %0 ], [ %b, %select.false ]
ret ppc_fp128 %sel
}
; CHECK-LABEL: freeze_select
; CHECK: # %bb.0:
; CHECK-NEXT: xxlxor 0, 0, 0
; CHECK-NEXT: fcmpu 5, 2, 2
; CHECK-NEXT: fcmpu 1, 1, 1
; CHECK-NEXT: fcmpu 6, 2, 0
; CHECK-NEXT: fcmpu 0, 1, 0
; CHECK-NEXT: crnor 20, 23, 26
; CHECK-NEXT: crand 20, 2, 20
; CHECK-NEXT: bclr 12, 20, 0
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: crnor 20, 7, 2
; CHECK-NEXT: bclr 12, 20, 0
; CHECK-NEXT: # %bb.2: # %select.false
; CHECK-NEXT: fmr 1, 3
; CHECK-NEXT: fmr 2, 4
; CHECK-NEXT: blr
...