forked from OSchip/llvm-project
Revert "[DebugInfo] MachineSink: Insert undef DBG_VALUEs when sinking instructions"
This reverts commit ee50590e16.
PR43855 reports a performance regression from this commit, which I'll
look into.
This commit is contained in:
Jeremy Morse
parent
d382a8a768
commit
a8db456b53
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@ -736,9 +736,6 @@ static bool SinkingPreventsImplicitNullCheck(MachineInstr &MI,
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static void performSink(MachineInstr &MI, MachineBasicBlock &SuccToSinkTo,
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MachineBasicBlock::iterator InsertPos,
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SmallVectorImpl<MachineInstr *> *DbgVals = nullptr) {
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const MachineRegisterInfo &MRI = MI.getMF()->getRegInfo();
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const TargetInstrInfo &TII = *MI.getMF()->getSubtarget().getInstrInfo();
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// If debug values are provided use those, otherwise call collectDebugValues.
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SmallVector<MachineInstr *, 2> DbgValuesToSink;
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if (DbgVals)
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@ -761,57 +758,13 @@ static void performSink(MachineInstr &MI, MachineBasicBlock &SuccToSinkTo,
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SuccToSinkTo.splice(InsertPos, ParentBlock, MI,
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++MachineBasicBlock::iterator(MI));
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// Sink a copy of debug users to the insert position. Mark the original
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// DBG_VALUE location as 'undef', indicating that any earlier variable
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// location should be terminated as we've optimised away the value at this
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// point.
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// If the sunk instruction is a copy, try to forward the copy instead of
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// leaving an 'undef' DBG_VALUE in the original location. Don't do this if
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// there's any subregister weirdness involved.
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// Move previously adjacent debug value instructions to the insert position.
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for (SmallVectorImpl<MachineInstr *>::iterator DBI = DbgValuesToSink.begin(),
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DBE = DbgValuesToSink.end();
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DBI != DBE; ++DBI) {
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MachineInstr *DbgMI = *DBI;
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MachineInstr *NewDbgMI = DbgMI->getMF()->CloneMachineInstr(*DBI);
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SuccToSinkTo.insert(InsertPos, NewDbgMI);
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// Copy DBG_VALUE operand and set the original to undef. We then check to
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// see whether this is something that can be copy-forwarded. If it isn't,
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// continue around the loop.
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MachineOperand DbgMO = DbgMI->getOperand(0);
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DbgMI->getOperand(0).setReg(0);
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const MachineOperand *SrcMO = nullptr, *DstMO = nullptr;
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if (!TII.isCopyInstr(MI, SrcMO, DstMO))
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continue;
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// Check validity of forwarding this copy.
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bool PostRA = MRI.getNumVirtRegs() == 0;
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// Trying to forward between physical and virtual registers is too hard.
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if (DbgMO.getReg().isVirtual() != SrcMO->getReg().isVirtual())
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continue;
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// Only try virtual register copy-forwarding before regalloc, and physical
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// register copy-forwarding after regalloc.
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bool arePhysRegs = !DbgMO.getReg().isVirtual();
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if (arePhysRegs != PostRA)
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continue;
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// Pre-regalloc, only forward if all subregisters agree (or there are no
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// subregs at all). More analysis might recover some forwardable copies.
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if (!PostRA && (DbgMO.getSubReg() != SrcMO->getSubReg() ||
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DbgMO.getSubReg() != DstMO->getSubReg()))
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continue;
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// Post-regalloc, we may be sinking a DBG_VALUE of a sub or super-register
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// of this copy. Only forward the copy if the DBG_VALUE operand exactly
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// matches the copy destination.
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if (PostRA && DbgMO.getReg() != DstMO->getReg())
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continue;
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DbgMI->getOperand(0).setReg(SrcMO->getReg());
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DbgMI->getOperand(0).setSubReg(SrcMO->getSubReg());
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SuccToSinkTo.splice(InsertPos, ParentBlock, DbgMI,
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++MachineBasicBlock::iterator(DbgMI));
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}
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}
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@ -69,10 +69,7 @@ body: |
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: liveins: $edi
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; CHECK: DBG_VALUE $edi, $noreg, ![[BARVAR]]
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; CHECK-NEXT: DBG_VALUE $edi, $noreg, ![[ARGVAR]]
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; CHECK-NEXT: DBG_VALUE $noreg, $noreg, ![[BAZVAR]]
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; CHECK-NEXT: renamable $cl = MOV8ri 1
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; CHECK-NEXT: DBG_VALUE $noreg, $noreg, ![[FOOVAR]]
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; CHECK-NEXT: JMP_1 %bb.1
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; CHECK: bb.1.return:
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; CHECK: liveins: $cl, $edi
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@ -1,105 +0,0 @@
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# RUN: llc %s -o - -run-pass=machine-sink -mtriple=x86_64-- | FileCheck %s
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# This is a copy of test/CodeGen/X86/MachineSink-DbgValue.ll, where we
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# additionally test that when the MOV32rm defining %0 is sunk, it leaves
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# an 'undef' DBG_VALUE behind to terminate earlier location ranges.
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--- |
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.7.0"
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; Function Attrs: nounwind readonly ssp uwtable
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define i32 @foo(i32 %i, i32* nocapture %c) !dbg !4 {
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call void @llvm.dbg.value(metadata i32 %i, metadata !9, metadata !DIExpression()), !dbg !14
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%ab = load i32, i32* %c, align 1, !dbg !15
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call void @llvm.dbg.value(metadata i32* %c, metadata !10, metadata !DIExpression()), !dbg !16
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call void @llvm.dbg.value(metadata i32 %ab, metadata !12, metadata !DIExpression()), !dbg !15
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%cd = icmp eq i32 %i, 42, !dbg !17
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br i1 %cd, label %bb1, label %bb2, !dbg !17
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bb1: ; preds = %0
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%gh = add nsw i32 %ab, 2, !dbg !18
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br label %bb2, !dbg !18
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bb2: ; preds = %bb1, %0
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%.0 = phi i32 [ %gh, %bb1 ], [ 0, %0 ]
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ret i32 %.0, !dbg !19
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}
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; Function Attrs: nounwind readnone speculatable
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declare void @llvm.dbg.value(metadata, metadata, metadata)
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; Function Attrs: nounwind
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declare void @llvm.stackprotector(i8*, i8**)
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!3}
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!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "Apple clang version 3.0 (tags/Apple/clang-211.10.1) (based on LLVM 3.0svn)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2)
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!1 = !DIFile(filename: "a.c", directory: "/private/tmp")
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!2 = !{}
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!3 = !{i32 1, !"Debug Info Version", i32 3}
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!4 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 2, type: !5, virtualIndex: 6, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !8)
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!5 = !DISubroutineType(types: !6)
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!6 = !{!7}
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!7 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
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!8 = !{!9, !10, !12}
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!9 = !DILocalVariable(name: "i", arg: 1, scope: !4, file: !1, line: 2, type: !7)
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!10 = !DILocalVariable(name: "c", arg: 2, scope: !4, file: !1, line: 2, type: !11)
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!11 = !DIDerivedType(tag: DW_TAG_pointer_type, scope: !0, baseType: !7, size: 64, align: 64)
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!12 = !DILocalVariable(name: "a", scope: !13, file: !1, line: 3, type: !7)
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!13 = distinct !DILexicalBlock(scope: !4, file: !1, line: 2, column: 25)
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!14 = !DILocation(line: 2, column: 13, scope: !4)
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!15 = !DILocation(line: 3, column: 14, scope: !13)
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!16 = !DILocation(line: 2, column: 22, scope: !4)
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!17 = !DILocation(line: 4, column: 3, scope: !13)
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!18 = !DILocation(line: 5, column: 5, scope: !13)
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!19 = !DILocation(line: 7, column: 1, scope: !13)
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; CHECK: ![[VARNUM:[0-9]+]] = !DILocalVariable(name: "a",
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...
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---
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name: foo
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alignment: 4
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gr32 }
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- { id: 1, class: gr32 }
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- { id: 2, class: gr32 }
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- { id: 3, class: gr32 }
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- { id: 4, class: gr64 }
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- { id: 5, class: gr32 }
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- { id: 6, class: gr32 }
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liveins:
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- { reg: '$edi', virtual-reg: '%3' }
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- { reg: '$rsi', virtual-reg: '%4' }
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body: |
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bb.0 (%ir-block.0):
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successors: %bb.1, %bb.2
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liveins: $edi, $rsi
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; CHECK-LABEL: bb.0 (%ir-block.0):
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; CHECK: DBG_VALUE $noreg, $noreg, ![[VARNUM]]
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DBG_VALUE $edi, $noreg, !9, !DIExpression(), debug-location !14
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DBG_VALUE $rsi, $noreg, !10, !DIExpression(), debug-location !16
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%4:gr64 = COPY $rsi
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DBG_VALUE %4, $noreg, !10, !DIExpression(), debug-location !16
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%3:gr32 = COPY $edi
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DBG_VALUE %3, $noreg, !9, !DIExpression(), debug-location !14
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%0:gr32 = MOV32rm %4, 1, $noreg, 0, $noreg, debug-location !15 :: (load 4 from %ir.c, align 1)
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DBG_VALUE %0, $noreg, !12, !DIExpression(), debug-location !15
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%5:gr32 = MOV32r0 implicit-def dead $eflags
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%6:gr32 = SUB32ri8 %3, 42, implicit-def $eflags, debug-location !17
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JCC_1 %bb.2, 5, implicit $eflags, debug-location !17
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JMP_1 %bb.1, debug-location !17
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bb.1.bb1:
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; CHECK-LABEL: bb.1.bb1:
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; CHECK: %[[VREG:[0-9]+]]:gr32 = MOV32rm
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; CHECK-NEXT: DBG_VALUE %[[VREG]], $noreg, ![[VARNUM]]
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; CHECK-NEXT: ADD32ri8
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%1:gr32 = nsw ADD32ri8 %0, 2, implicit-def dead $eflags, debug-location !18
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bb.2.bb2:
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%2:gr32 = PHI %5, %bb.0, %1, %bb.1
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$eax = COPY %2, debug-location !19
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RET 0, $eax, debug-location !19
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...
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