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TableGen: Allow signed immediates for instruction aliases 

Patch by Daniel Cederman.

Reviewers: stoklund, arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: https://reviews.llvm.org/D27046

llvm-svn: 287856
This commit is contained in:
Jacob Baungard Hansen 2016-11-24 08:53:28 +00:00
parent f23b995f78
commit a8cbbdc9b6
1 changed files with 1 additions and 1 deletions
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2
llvm/utils/TableGen/AsmWriterEmitter.cpp
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@ -879,7 +879,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
IAP.addCond(Op + ".isImm()");
Cond = Op + ".getImm() == " +
llvm::utostr(CGA.ResultOperands[i].getImm());
llvm::itostr(CGA.ResultOperands[i].getImm());
IAP.addCond(Cond);
break;
}