forked from OSchip/llvm-project
AMDGPU/GlobalISel: Legalize addrspacecast
Use a placeholder constant for now on targets that need the load from the queue ptr. llvm-svn: 353497
This commit is contained in:
Matt Arsenault
parent
0d9f3f7f95
commit
a8b4339c2f
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@ -2174,6 +2174,7 @@ LegalizerHelper::fewerElementsVector(MachineInstr &MI, unsigned TypeIdx,
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case G_FPTOUI:
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case G_INTTOPTR:
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case G_PTRTOINT:
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case G_ADDRSPACE_CAST:
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return fewerElementsVectorCasts(MI, TypeIdx, NarrowTy);
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case G_ICMP:
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case G_FCMP:
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@ -14,6 +14,9 @@
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#include "AMDGPU.h"
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#include "AMDGPULegalizerInfo.h"
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#include "AMDGPUTargetMachine.h"
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#include "SIMachineFunctionInfo.h"
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#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
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#include "llvm/CodeGen/TargetOpcodes.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/IR/DerivedTypes.h"
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@ -316,6 +319,12 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST,
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return std::make_pair(0, LLT::scalar(Query.Types[1].getSizeInBits()));
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});
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if (ST.hasFlatAddressSpace()) {
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getActionDefinitionsBuilder(G_ADDRSPACE_CAST)
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.scalarize(0)
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.custom();
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}
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getActionDefinitionsBuilder({G_LOAD, G_STORE})
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.narrowScalarIf([](const LegalityQuery &Query) {
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unsigned Size = Query.Types[0].getSizeInBits();
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@ -587,3 +596,171 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST,
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computeTables();
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verify(*ST.getInstrInfo());
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}
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bool AMDGPULegalizerInfo::legalizeCustom(MachineInstr &MI,
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MachineRegisterInfo &MRI,
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MachineIRBuilder &MIRBuilder,
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GISelChangeObserver &Observer) const {
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switch (MI.getOpcode()) {
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case TargetOpcode::G_ADDRSPACE_CAST:
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return legalizeAddrSpaceCast(MI, MRI, MIRBuilder);
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default:
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return false;
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}
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llvm_unreachable("expected switch to return");
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}
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unsigned AMDGPULegalizerInfo::getSegmentAperture(
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unsigned AS,
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MachineRegisterInfo &MRI,
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MachineIRBuilder &MIRBuilder) const {
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MachineFunction &MF = MIRBuilder.getMF();
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const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
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const LLT S32 = LLT::scalar(32);
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if (ST.hasApertureRegs()) {
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// FIXME: Use inline constants (src_{shared, private}_base) instead of
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// getreg.
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unsigned Offset = AS == AMDGPUAS::LOCAL_ADDRESS ?
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AMDGPU::Hwreg::OFFSET_SRC_SHARED_BASE :
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AMDGPU::Hwreg::OFFSET_SRC_PRIVATE_BASE;
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unsigned WidthM1 = AS == AMDGPUAS::LOCAL_ADDRESS ?
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AMDGPU::Hwreg::WIDTH_M1_SRC_SHARED_BASE :
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AMDGPU::Hwreg::WIDTH_M1_SRC_PRIVATE_BASE;
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unsigned Encoding =
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AMDGPU::Hwreg::ID_MEM_BASES << AMDGPU::Hwreg::ID_SHIFT_ |
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Offset << AMDGPU::Hwreg::OFFSET_SHIFT_ |
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WidthM1 << AMDGPU::Hwreg::WIDTH_M1_SHIFT_;
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unsigned ShiftAmt = MRI.createGenericVirtualRegister(S32);
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unsigned ApertureReg = MRI.createGenericVirtualRegister(S32);
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unsigned GetReg = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);
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MIRBuilder.buildInstr(AMDGPU::S_GETREG_B32)
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.addDef(GetReg)
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.addImm(Encoding);
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MRI.setType(GetReg, S32);
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MIRBuilder.buildConstant(ShiftAmt, WidthM1 + 1);
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MIRBuilder.buildInstr(TargetOpcode::G_SHL)
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.addDef(ApertureReg)
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.addUse(GetReg)
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.addUse(ShiftAmt);
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return ApertureReg;
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}
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unsigned QueuePtr = MRI.createGenericVirtualRegister(
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LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64));
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// FIXME: Placeholder until we can track the input registers.
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MIRBuilder.buildConstant(QueuePtr, 0xdeadbeef);
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// Offset into amd_queue_t for group_segment_aperture_base_hi /
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// private_segment_aperture_base_hi.
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uint32_t StructOffset = (AS == AMDGPUAS::LOCAL_ADDRESS) ? 0x40 : 0x44;
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// FIXME: Don't use undef
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Value *V = UndefValue::get(PointerType::get(
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Type::getInt8Ty(MF.getFunction().getContext()),
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AMDGPUAS::CONSTANT_ADDRESS));
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MachinePointerInfo PtrInfo(V, StructOffset);
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MachineMemOperand *MMO = MF.getMachineMemOperand(
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PtrInfo,
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MachineMemOperand::MOLoad |
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MachineMemOperand::MODereferenceable |
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MachineMemOperand::MOInvariant,
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4,
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MinAlign(64, StructOffset));
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unsigned LoadResult = MRI.createGenericVirtualRegister(S32);
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unsigned LoadAddr = AMDGPU::NoRegister;
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MIRBuilder.materializeGEP(LoadAddr, QueuePtr, LLT::scalar(64), StructOffset);
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MIRBuilder.buildLoad(LoadResult, LoadAddr, *MMO);
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return LoadResult;
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}
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bool AMDGPULegalizerInfo::legalizeAddrSpaceCast(
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MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &MIRBuilder) const {
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MachineFunction &MF = MIRBuilder.getMF();
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MIRBuilder.setInstr(MI);
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unsigned Dst = MI.getOperand(0).getReg();
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unsigned Src = MI.getOperand(1).getReg();
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LLT DstTy = MRI.getType(Dst);
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LLT SrcTy = MRI.getType(Src);
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unsigned DestAS = DstTy.getAddressSpace();
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unsigned SrcAS = SrcTy.getAddressSpace();
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// TODO: Avoid reloading from the queue ptr for each cast, or at least each
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// vector element.
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assert(!DstTy.isVector());
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const AMDGPUTargetMachine &TM
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= static_cast<const AMDGPUTargetMachine &>(MF.getTarget());
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const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
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if (ST.getTargetLowering()->isNoopAddrSpaceCast(SrcAS, DestAS)) {
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MI.setDesc(MIRBuilder.getTII().get(TargetOpcode::COPY));
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return true;
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}
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if (SrcAS == AMDGPUAS::FLAT_ADDRESS) {
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assert(DestAS == AMDGPUAS::LOCAL_ADDRESS ||
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DestAS == AMDGPUAS::PRIVATE_ADDRESS);
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unsigned NullVal = TM.getNullPointerValue(DestAS);
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unsigned SegmentNullReg = MRI.createGenericVirtualRegister(DstTy);
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unsigned FlatNullReg = MRI.createGenericVirtualRegister(SrcTy);
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MIRBuilder.buildConstant(SegmentNullReg, NullVal);
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MIRBuilder.buildConstant(FlatNullReg, 0);
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unsigned PtrLo32 = MRI.createGenericVirtualRegister(DstTy);
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// Extract low 32-bits of the pointer.
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MIRBuilder.buildExtract(PtrLo32, Src, 0);
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unsigned CmpRes = MRI.createGenericVirtualRegister(LLT::scalar(1));
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MIRBuilder.buildICmp(CmpInst::ICMP_NE, CmpRes, Src, FlatNullReg);
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MIRBuilder.buildSelect(Dst, CmpRes, PtrLo32, SegmentNullReg);
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MI.eraseFromParent();
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return true;
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}
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assert(SrcAS == AMDGPUAS::LOCAL_ADDRESS ||
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SrcAS == AMDGPUAS::PRIVATE_ADDRESS);
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unsigned FlatNullReg = MRI.createGenericVirtualRegister(DstTy);
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unsigned SegmentNullReg = MRI.createGenericVirtualRegister(SrcTy);
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MIRBuilder.buildConstant(SegmentNullReg, TM.getNullPointerValue(SrcAS));
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MIRBuilder.buildConstant(FlatNullReg, TM.getNullPointerValue(DestAS));
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unsigned ApertureReg = getSegmentAperture(DestAS, MRI, MIRBuilder);
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unsigned CmpRes = MRI.createGenericVirtualRegister(LLT::scalar(1));
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MIRBuilder.buildICmp(CmpInst::ICMP_NE, CmpRes, Src, SegmentNullReg);
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unsigned BuildPtr = MRI.createGenericVirtualRegister(DstTy);
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// Coerce the type of the low half of the result so we can use merge_values.
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unsigned SrcAsInt = MRI.createGenericVirtualRegister(LLT::scalar(32));
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MIRBuilder.buildInstr(TargetOpcode::G_PTRTOINT)
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.addDef(SrcAsInt)
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.addUse(Src);
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// TODO: Should we allow mismatched types but matching sizes in merges to
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// avoid the ptrtoint?
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MIRBuilder.buildMerge(BuildPtr, {SrcAsInt, ApertureReg});
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MIRBuilder.buildSelect(Dst, CmpRes, BuildPtr, FlatNullReg);
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MI.eraseFromParent();
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return true;
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}
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@ -27,6 +27,17 @@ class AMDGPULegalizerInfo : public LegalizerInfo {
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public:
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AMDGPULegalizerInfo(const GCNSubtarget &ST,
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const GCNTargetMachine &TM);
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bool legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &MIRBuilder,
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GISelChangeObserver &Observer) const override;
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unsigned getSegmentAperture(unsigned AddrSpace,
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MachineRegisterInfo &MRI,
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MachineIRBuilder &MIRBuilder) const;
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bool legalizeAddrSpaceCast(MachineInstr &MI, MachineRegisterInfo &MRI,
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MachineIRBuilder &MIRBuilder) const;
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};
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} // End llvm namespace.
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#endif
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@ -1217,7 +1217,8 @@ EVT SITargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign,
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static bool isFlatGlobalAddrSpace(unsigned AS) {
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return AS == AMDGPUAS::GLOBAL_ADDRESS ||
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AS == AMDGPUAS::FLAT_ADDRESS ||
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AS == AMDGPUAS::CONSTANT_ADDRESS;
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AS == AMDGPUAS::CONSTANT_ADDRESS ||
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AS > AMDGPUAS::MAX_AMDGPU_ADDRESS;
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}
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bool SITargetLowering::isNoopAddrSpaceCast(unsigned SrcAS,
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@ -0,0 +1,393 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=fiji -O0 -run-pass=legalizer -global-isel-abort=0 -o - %s | FileCheck -check-prefix=VI %s
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# RUN: llc -march=amdgcn -mcpu=gfx900 -O0 -run-pass=legalizer -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
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---
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name: test_addrspacecast_p0_to_p1
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; VI-LABEL: name: test_addrspacecast_p0_to_p1
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; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
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; VI: [[COPY1:%[0-9]+]]:_(p1) = COPY [[COPY]](p0)
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; VI: $vgpr0_vgpr1 = COPY [[COPY1]](p1)
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; GFX9-LABEL: name: test_addrspacecast_p0_to_p1
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; GFX9: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
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; GFX9: [[COPY1:%[0-9]+]]:_(p1) = COPY [[COPY]](p0)
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; GFX9: $vgpr0_vgpr1 = COPY [[COPY1]](p1)
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%0:_(p0) = COPY $vgpr0_vgpr1
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%1:_(p1) = G_ADDRSPACE_CAST %0
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: test_addrspacecast_p1_to_p0
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; VI-LABEL: name: test_addrspacecast_p1_to_p0
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; VI: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; VI: [[COPY1:%[0-9]+]]:_(p0) = COPY [[COPY]](p1)
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; VI: $vgpr0_vgpr1 = COPY [[COPY1]](p0)
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; GFX9-LABEL: name: test_addrspacecast_p1_to_p0
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; GFX9: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
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; GFX9: [[COPY1:%[0-9]+]]:_(p0) = COPY [[COPY]](p1)
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; GFX9: $vgpr0_vgpr1 = COPY [[COPY1]](p0)
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%0:_(p1) = COPY $vgpr0_vgpr1
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%1:_(p0) = G_ADDRSPACE_CAST %0
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: test_addrspacecast_p0_to_p4
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; VI-LABEL: name: test_addrspacecast_p0_to_p4
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; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
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; VI: [[COPY1:%[0-9]+]]:_(p4) = COPY [[COPY]](p0)
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; VI: $vgpr0_vgpr1 = COPY [[COPY1]](p4)
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; GFX9-LABEL: name: test_addrspacecast_p0_to_p4
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; GFX9: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
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; GFX9: [[COPY1:%[0-9]+]]:_(p4) = COPY [[COPY]](p0)
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; GFX9: $vgpr0_vgpr1 = COPY [[COPY1]](p4)
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%0:_(p0) = COPY $vgpr0_vgpr1
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%1:_(p4) = G_ADDRSPACE_CAST %0
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: test_addrspacecast_p4_to_p0
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; VI-LABEL: name: test_addrspacecast_p4_to_p0
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; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1
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; VI: [[COPY1:%[0-9]+]]:_(p0) = COPY [[COPY]](p4)
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; VI: $vgpr0_vgpr1 = COPY [[COPY1]](p0)
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; GFX9-LABEL: name: test_addrspacecast_p4_to_p0
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; GFX9: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1
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; GFX9: [[COPY1:%[0-9]+]]:_(p0) = COPY [[COPY]](p4)
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; GFX9: $vgpr0_vgpr1 = COPY [[COPY1]](p0)
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%0:_(p4) = COPY $vgpr0_vgpr1
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%1:_(p0) = G_ADDRSPACE_CAST %0
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: test_addrspacecast_p0_to_p999
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; VI-LABEL: name: test_addrspacecast_p0_to_p999
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; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
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; VI: [[COPY1:%[0-9]+]]:_(p999) = COPY [[COPY]](p0)
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; VI: $vgpr0_vgpr1 = COPY [[COPY1]](p999)
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; GFX9-LABEL: name: test_addrspacecast_p0_to_p999
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; GFX9: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
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; GFX9: [[COPY1:%[0-9]+]]:_(p999) = COPY [[COPY]](p0)
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; GFX9: $vgpr0_vgpr1 = COPY [[COPY1]](p999)
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%0:_(p0) = COPY $vgpr0_vgpr1
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%1:_(p999) = G_ADDRSPACE_CAST %0
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: test_addrspacecast_p999_to_p0
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; VI-LABEL: name: test_addrspacecast_p999_to_p0
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; VI: [[COPY:%[0-9]+]]:_(p999) = COPY $vgpr0_vgpr1
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; VI: [[COPY1:%[0-9]+]]:_(p0) = COPY [[COPY]](p999)
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; VI: $vgpr0_vgpr1 = COPY [[COPY1]](p0)
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; GFX9-LABEL: name: test_addrspacecast_p999_to_p0
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; GFX9: [[COPY:%[0-9]+]]:_(p999) = COPY $vgpr0_vgpr1
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; GFX9: [[COPY1:%[0-9]+]]:_(p0) = COPY [[COPY]](p999)
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; GFX9: $vgpr0_vgpr1 = COPY [[COPY1]](p0)
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%0:_(p999) = COPY $vgpr0_vgpr1
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%1:_(p0) = G_ADDRSPACE_CAST %0
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$vgpr0_vgpr1 = COPY %1
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...
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---
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name: test_addrspacecast_p5_to_p0
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body: |
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bb.0:
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liveins: $vgpr0
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; VI-LABEL: name: test_addrspacecast_p5_to_p0
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; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0
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; VI: [[C:%[0-9]+]]:_(p5) = G_CONSTANT i32 0
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; VI: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
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; VI: [[C2:%[0-9]+]]:_(p4) = G_CONSTANT i64 3735928559
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; VI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 68
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; VI: [[GEP:%[0-9]+]]:_(p4) = G_GEP [[C2]], [[C3]](s64)
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; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4)
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; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[COPY]](p5), [[C]]
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; VI: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY]](p5)
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; VI: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[LOAD]](s32)
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; VI: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], [[C1]]
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; VI: $vgpr0_vgpr1 = COPY [[SELECT]](p0)
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; GFX9-LABEL: name: test_addrspacecast_p5_to_p0
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; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0
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; GFX9: [[C:%[0-9]+]]:_(p5) = G_CONSTANT i32 0
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; GFX9: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
|
||||
; GFX9: [[S_GETREG_B32_:%[0-9]+]]:sreg_32(s32) = S_GETREG_B32 30735
|
||||
; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
||||
; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[S_GETREG_B32_]], [[C2]](s32)
|
||||
; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[COPY]](p5), [[C]]
|
||||
; GFX9: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY]](p5)
|
||||
; GFX9: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[SHL]](s32)
|
||||
; GFX9: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], [[C1]]
|
||||
; GFX9: $vgpr0_vgpr1 = COPY [[SELECT]](p0)
|
||||
%0:_(p5) = COPY $vgpr0
|
||||
%1:_(p0) = G_ADDRSPACE_CAST %0
|
||||
$vgpr0_vgpr1 = COPY %1
|
||||
...
|
||||
|
||||
---
|
||||
name: test_addrspacecast_p0_to_p5
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1
|
||||
|
||||
; VI-LABEL: name: test_addrspacecast_p0_to_p5
|
||||
; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
|
||||
; VI: [[C:%[0-9]+]]:_(p5) = G_CONSTANT i32 0
|
||||
; VI: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
|
||||
; VI: [[EXTRACT:%[0-9]+]]:_(p5) = G_EXTRACT [[COPY]](p0), 0
|
||||
; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[COPY]](p0), [[C1]]
|
||||
; VI: [[SELECT:%[0-9]+]]:_(p5) = G_SELECT [[ICMP]](s1), [[EXTRACT]], [[C]]
|
||||
; VI: $vgpr0 = COPY [[SELECT]](p5)
|
||||
; GFX9-LABEL: name: test_addrspacecast_p0_to_p5
|
||||
; GFX9: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
|
||||
; GFX9: [[C:%[0-9]+]]:_(p5) = G_CONSTANT i32 0
|
||||
; GFX9: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
|
||||
; GFX9: [[EXTRACT:%[0-9]+]]:_(p5) = G_EXTRACT [[COPY]](p0), 0
|
||||
; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[COPY]](p0), [[C1]]
|
||||
; GFX9: [[SELECT:%[0-9]+]]:_(p5) = G_SELECT [[ICMP]](s1), [[EXTRACT]], [[C]]
|
||||
; GFX9: $vgpr0 = COPY [[SELECT]](p5)
|
||||
%0:_(p0) = COPY $vgpr0_vgpr1
|
||||
%1:_(p5) = G_ADDRSPACE_CAST %0
|
||||
$vgpr0 = COPY %1
|
||||
...
|
||||
|
||||
---
|
||||
name: test_addrspacecast_p3_to_p0
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0
|
||||
|
||||
; VI-LABEL: name: test_addrspacecast_p3_to_p0
|
||||
; VI: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
|
||||
; VI: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
|
||||
; VI: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
|
||||
; VI: [[C2:%[0-9]+]]:_(p4) = G_CONSTANT i64 3735928559
|
||||
; VI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 68
|
||||
; VI: [[GEP:%[0-9]+]]:_(p4) = G_GEP [[C2]], [[C3]](s64)
|
||||
; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4)
|
||||
; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[COPY]](p3), [[C]]
|
||||
; VI: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY]](p3)
|
||||
; VI: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[LOAD]](s32)
|
||||
; VI: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], [[C1]]
|
||||
; VI: $vgpr0_vgpr1 = COPY [[SELECT]](p0)
|
||||
; GFX9-LABEL: name: test_addrspacecast_p3_to_p0
|
||||
; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
|
||||
; GFX9: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
|
||||
; GFX9: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
|
||||
; GFX9: [[S_GETREG_B32_:%[0-9]+]]:sreg_32(s32) = S_GETREG_B32 30735
|
||||
; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
||||
; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[S_GETREG_B32_]], [[C2]](s32)
|
||||
; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[COPY]](p3), [[C]]
|
||||
; GFX9: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY]](p3)
|
||||
; GFX9: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[SHL]](s32)
|
||||
; GFX9: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], [[C1]]
|
||||
; GFX9: $vgpr0_vgpr1 = COPY [[SELECT]](p0)
|
||||
%0:_(p3) = COPY $vgpr0
|
||||
%1:_(p0) = G_ADDRSPACE_CAST %0
|
||||
$vgpr0_vgpr1 = COPY %1
|
||||
...
|
||||
|
||||
---
|
||||
name: test_addrspacecast_p0_to_p3
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1
|
||||
|
||||
; VI-LABEL: name: test_addrspacecast_p0_to_p3
|
||||
; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
|
||||
; VI: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
|
||||
; VI: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
|
||||
; VI: [[EXTRACT:%[0-9]+]]:_(p3) = G_EXTRACT [[COPY]](p0), 0
|
||||
; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[COPY]](p0), [[C1]]
|
||||
; VI: [[SELECT:%[0-9]+]]:_(p3) = G_SELECT [[ICMP]](s1), [[EXTRACT]], [[C]]
|
||||
; VI: $vgpr0 = COPY [[SELECT]](p3)
|
||||
; GFX9-LABEL: name: test_addrspacecast_p0_to_p3
|
||||
; GFX9: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
|
||||
; GFX9: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
|
||||
; GFX9: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
|
||||
; GFX9: [[EXTRACT:%[0-9]+]]:_(p3) = G_EXTRACT [[COPY]](p0), 0
|
||||
; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[COPY]](p0), [[C1]]
|
||||
; GFX9: [[SELECT:%[0-9]+]]:_(p3) = G_SELECT [[ICMP]](s1), [[EXTRACT]], [[C]]
|
||||
; GFX9: $vgpr0 = COPY [[SELECT]](p3)
|
||||
%0:_(p0) = COPY $vgpr0_vgpr1
|
||||
%1:_(p3) = G_ADDRSPACE_CAST %0
|
||||
$vgpr0 = COPY %1
|
||||
...
|
||||
|
||||
---
|
||||
name: test_addrspacecast_v2p0_to_v2p1
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
|
||||
; VI-LABEL: name: test_addrspacecast_v2p0_to_v2p1
|
||||
; VI: [[COPY:%[0-9]+]]:_(<2 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; VI: [[UV:%[0-9]+]]:_(p0), [[UV1:%[0-9]+]]:_(p0) = G_UNMERGE_VALUES [[COPY]](<2 x p0>)
|
||||
; VI: [[COPY1:%[0-9]+]]:_(p1) = COPY [[UV]](p0)
|
||||
; VI: [[COPY2:%[0-9]+]]:_(p1) = COPY [[UV1]](p0)
|
||||
; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p1>) = G_BUILD_VECTOR [[COPY1]](p1), [[COPY2]](p1)
|
||||
; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p1>)
|
||||
; GFX9-LABEL: name: test_addrspacecast_v2p0_to_v2p1
|
||||
; GFX9: [[COPY:%[0-9]+]]:_(<2 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; GFX9: [[UV:%[0-9]+]]:_(p0), [[UV1:%[0-9]+]]:_(p0) = G_UNMERGE_VALUES [[COPY]](<2 x p0>)
|
||||
; GFX9: [[COPY1:%[0-9]+]]:_(p1) = COPY [[UV]](p0)
|
||||
; GFX9: [[COPY2:%[0-9]+]]:_(p1) = COPY [[UV1]](p0)
|
||||
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p1>) = G_BUILD_VECTOR [[COPY1]](p1), [[COPY2]](p1)
|
||||
; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p1>)
|
||||
%0:_(<2 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
%1:_(<2 x p1>) = G_ADDRSPACE_CAST %0
|
||||
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
|
||||
...
|
||||
|
||||
---
|
||||
name: test_addrspacecast_v2p1_to_v2p0
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
|
||||
; VI-LABEL: name: test_addrspacecast_v2p1_to_v2p0
|
||||
; VI: [[COPY:%[0-9]+]]:_(<2 x p1>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; VI: [[UV:%[0-9]+]]:_(p1), [[UV1:%[0-9]+]]:_(p1) = G_UNMERGE_VALUES [[COPY]](<2 x p1>)
|
||||
; VI: [[COPY1:%[0-9]+]]:_(p0) = COPY [[UV]](p1)
|
||||
; VI: [[COPY2:%[0-9]+]]:_(p0) = COPY [[UV1]](p1)
|
||||
; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[COPY1]](p0), [[COPY2]](p0)
|
||||
; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p0>)
|
||||
; GFX9-LABEL: name: test_addrspacecast_v2p1_to_v2p0
|
||||
; GFX9: [[COPY:%[0-9]+]]:_(<2 x p1>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; GFX9: [[UV:%[0-9]+]]:_(p1), [[UV1:%[0-9]+]]:_(p1) = G_UNMERGE_VALUES [[COPY]](<2 x p1>)
|
||||
; GFX9: [[COPY1:%[0-9]+]]:_(p0) = COPY [[UV]](p1)
|
||||
; GFX9: [[COPY2:%[0-9]+]]:_(p0) = COPY [[UV1]](p1)
|
||||
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[COPY1]](p0), [[COPY2]](p0)
|
||||
; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p0>)
|
||||
%0:_(<2 x p1>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
%1:_(<2 x p0>) = G_ADDRSPACE_CAST %0
|
||||
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
|
||||
...
|
||||
|
||||
---
|
||||
name: test_addrspacecast_v2p0_to_v2p3
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
|
||||
; VI-LABEL: name: test_addrspacecast_v2p0_to_v2p3
|
||||
; VI: [[COPY:%[0-9]+]]:_(<2 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; VI: [[UV:%[0-9]+]]:_(p0), [[UV1:%[0-9]+]]:_(p0) = G_UNMERGE_VALUES [[COPY]](<2 x p0>)
|
||||
; VI: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
|
||||
; VI: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
|
||||
; VI: [[EXTRACT:%[0-9]+]]:_(p3) = G_EXTRACT [[UV]](p0), 0
|
||||
; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV]](p0), [[C1]]
|
||||
; VI: [[SELECT:%[0-9]+]]:_(p3) = G_SELECT [[ICMP]](s1), [[EXTRACT]], [[C]]
|
||||
; VI: [[C2:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
|
||||
; VI: [[C3:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
|
||||
; VI: [[EXTRACT1:%[0-9]+]]:_(p3) = G_EXTRACT [[UV1]](p0), 0
|
||||
; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV1]](p0), [[C3]]
|
||||
; VI: [[SELECT1:%[0-9]+]]:_(p3) = G_SELECT [[ICMP1]](s1), [[EXTRACT1]], [[C2]]
|
||||
; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p3>) = G_BUILD_VECTOR [[SELECT]](p3), [[SELECT1]](p3)
|
||||
; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x p3>)
|
||||
; GFX9-LABEL: name: test_addrspacecast_v2p0_to_v2p3
|
||||
; GFX9: [[COPY:%[0-9]+]]:_(<2 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; GFX9: [[UV:%[0-9]+]]:_(p0), [[UV1:%[0-9]+]]:_(p0) = G_UNMERGE_VALUES [[COPY]](<2 x p0>)
|
||||
; GFX9: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
|
||||
; GFX9: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
|
||||
; GFX9: [[EXTRACT:%[0-9]+]]:_(p3) = G_EXTRACT [[UV]](p0), 0
|
||||
; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV]](p0), [[C1]]
|
||||
; GFX9: [[SELECT:%[0-9]+]]:_(p3) = G_SELECT [[ICMP]](s1), [[EXTRACT]], [[C]]
|
||||
; GFX9: [[C2:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
|
||||
; GFX9: [[C3:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
|
||||
; GFX9: [[EXTRACT1:%[0-9]+]]:_(p3) = G_EXTRACT [[UV1]](p0), 0
|
||||
; GFX9: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV1]](p0), [[C3]]
|
||||
; GFX9: [[SELECT1:%[0-9]+]]:_(p3) = G_SELECT [[ICMP1]](s1), [[EXTRACT1]], [[C2]]
|
||||
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p3>) = G_BUILD_VECTOR [[SELECT]](p3), [[SELECT1]](p3)
|
||||
; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x p3>)
|
||||
%0:_(<2 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
%1:_(<2 x p3>) = G_ADDRSPACE_CAST %0
|
||||
$vgpr0_vgpr1 = COPY %1
|
||||
...
|
||||
|
||||
---
|
||||
name: test_addrspacecast_v2p3_to_v2p0
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1
|
||||
|
||||
; VI-LABEL: name: test_addrspacecast_v2p3_to_v2p0
|
||||
; VI: [[COPY:%[0-9]+]]:_(<2 x p3>) = COPY $vgpr0_vgpr1
|
||||
; VI: [[UV:%[0-9]+]]:_(p3), [[UV1:%[0-9]+]]:_(p3) = G_UNMERGE_VALUES [[COPY]](<2 x p3>)
|
||||
; VI: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
|
||||
; VI: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
|
||||
; VI: [[C2:%[0-9]+]]:_(p4) = G_CONSTANT i64 3735928559
|
||||
; VI: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 68
|
||||
; VI: [[GEP:%[0-9]+]]:_(p4) = G_GEP [[C2]], [[C3]](s64)
|
||||
; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4)
|
||||
; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV]](p3), [[C]]
|
||||
; VI: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[UV]](p3)
|
||||
; VI: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[LOAD]](s32)
|
||||
; VI: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], [[C1]]
|
||||
; VI: [[C4:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
|
||||
; VI: [[C5:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
|
||||
; VI: [[C6:%[0-9]+]]:_(p4) = G_CONSTANT i64 3735928559
|
||||
; VI: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 68
|
||||
; VI: [[GEP1:%[0-9]+]]:_(p4) = G_GEP [[C6]], [[C7]](s64)
|
||||
; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[GEP1]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4)
|
||||
; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV1]](p3), [[C4]]
|
||||
; VI: [[PTRTOINT1:%[0-9]+]]:_(s32) = G_PTRTOINT [[UV1]](p3)
|
||||
; VI: [[MV1:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT1]](s32), [[LOAD1]](s32)
|
||||
; VI: [[SELECT1:%[0-9]+]]:_(p0) = G_SELECT [[ICMP1]](s1), [[MV1]], [[C5]]
|
||||
; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[SELECT]](p0), [[SELECT1]](p0)
|
||||
; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p0>)
|
||||
; GFX9-LABEL: name: test_addrspacecast_v2p3_to_v2p0
|
||||
; GFX9: [[COPY:%[0-9]+]]:_(<2 x p3>) = COPY $vgpr0_vgpr1
|
||||
; GFX9: [[UV:%[0-9]+]]:_(p3), [[UV1:%[0-9]+]]:_(p3) = G_UNMERGE_VALUES [[COPY]](<2 x p3>)
|
||||
; GFX9: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
|
||||
; GFX9: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
|
||||
; GFX9: [[S_GETREG_B32_:%[0-9]+]]:sreg_32(s32) = S_GETREG_B32 30735
|
||||
; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
||||
; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[S_GETREG_B32_]], [[C2]](s32)
|
||||
; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV]](p3), [[C]]
|
||||
; GFX9: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[UV]](p3)
|
||||
; GFX9: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[SHL]](s32)
|
||||
; GFX9: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], [[C1]]
|
||||
; GFX9: [[C3:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
|
||||
; GFX9: [[C4:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
|
||||
; GFX9: [[S_GETREG_B32_1:%[0-9]+]]:sreg_32(s32) = S_GETREG_B32 30735
|
||||
; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
|
||||
; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[S_GETREG_B32_1]], [[C5]](s32)
|
||||
; GFX9: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV1]](p3), [[C3]]
|
||||
; GFX9: [[PTRTOINT1:%[0-9]+]]:_(s32) = G_PTRTOINT [[UV1]](p3)
|
||||
; GFX9: [[MV1:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT1]](s32), [[SHL1]](s32)
|
||||
; GFX9: [[SELECT1:%[0-9]+]]:_(p0) = G_SELECT [[ICMP1]](s1), [[MV1]], [[C4]]
|
||||
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[SELECT]](p0), [[SELECT1]](p0)
|
||||
; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p0>)
|
||||
%0:_(<2 x p3>) = COPY $vgpr0_vgpr1
|
||||
%1:_(<2 x p0>) = G_ADDRSPACE_CAST %0
|
||||
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
|
||||
...
|
||||
Loading…
Reference in New Issue