forked from OSchip/llvm-project
TargetConstant immediates won't be placed into registers so tighten
up the valid constant check earlier. rdar://9692967 llvm-svn: 134286
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8e25253e14
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@ -23,6 +23,7 @@
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#include "llvm/Intrinsics.h"
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#include "llvm/Intrinsics.h"
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#include "llvm/Support/CFG.h"
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#include "llvm/Support/CFG.h"
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#include "llvm/Type.h"
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#include "llvm/Type.h"
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#include "llvm/CodeGen/FunctionLoweringInfo.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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@ -1351,7 +1352,7 @@ SDNode *X86DAGToDAGISel::SelectAtomicLoadAdd(SDNode *Node, EVT NVT) {
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bool isInc = false, isDec = false, isSub = false, isCN = false;
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bool isInc = false, isDec = false, isSub = false, isCN = false;
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ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Val);
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ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Val);
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if (CN) {
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if (CN && CN->getSExtValue() == (int32_t)CN->getSExtValue()) {
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isCN = true;
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isCN = true;
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int64_t CNVal = CN->getSExtValue();
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int64_t CNVal = CN->getSExtValue();
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if (CNVal == 1)
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if (CNVal == 1)
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@ -1371,6 +1372,7 @@ SDNode *X86DAGToDAGISel::SelectAtomicLoadAdd(SDNode *Node, EVT NVT) {
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Val = Val.getOperand(1);
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Val = Val.getOperand(1);
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}
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}
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DebugLoc dl = Node->getDebugLoc();
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unsigned Opc = 0;
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unsigned Opc = 0;
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switch (NVT.getSimpleVT().SimpleTy) {
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switch (NVT.getSimpleVT().SimpleTy) {
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default: return 0;
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default: return 0;
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@ -1462,7 +1464,6 @@ SDNode *X86DAGToDAGISel::SelectAtomicLoadAdd(SDNode *Node, EVT NVT) {
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break;
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break;
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}
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}
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DebugLoc dl = Node->getDebugLoc();
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SDValue Undef = SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF,
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SDValue Undef = SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF,
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dl, NVT), 0);
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dl, NVT), 0);
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MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1);
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MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1);
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@ -1579,7 +1580,7 @@ SDNode *X86DAGToDAGISel::SelectAtomicLoadArith(SDNode *Node, EVT NVT) {
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bool isCN = false;
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bool isCN = false;
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ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Val);
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ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Val);
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if (CN) {
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if (CN && (int32_t)CN->getSExtValue() == CN->getSExtValue()) {
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isCN = true;
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isCN = true;
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Val = CurDAG->getTargetConstant(CN->getSExtValue(), NVT);
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Val = CurDAG->getTargetConstant(CN->getSExtValue(), NVT);
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}
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}
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@ -2,17 +2,35 @@
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; rdar://9692967
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; rdar://9692967
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define void @do_the_sync(i64* %p, i32 %b) nounwind {
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define void @t1(i64* %p, i32 %b) nounwind {
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entry:
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entry:
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%p.addr = alloca i64*, align 8
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%p.addr = alloca i64*, align 8
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store i64* %p, i64** %p.addr, align 8
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store i64* %p, i64** %p.addr, align 8
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%tmp = load i64** %p.addr, align 8
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%tmp = load i64** %p.addr, align 8
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call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
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call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
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; CHECK: t1:
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; CHECK: movl $2147483648, %eax
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; CHECK: lock
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; CHECK: lock
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; CHECK-NEXT: orq $2147483648
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; CHECK-NEXT: orq %rax, (%rdi)
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%0 = call i64 @llvm.atomic.load.or.i64.p0i64(i64* %tmp, i64 2147483648)
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%0 = call i64 @llvm.atomic.load.or.i64.p0i64(i64* %tmp, i64 2147483648)
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call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
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call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
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ret void
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ret void
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}
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}
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define void @t2(i64* %p, i32 %b) nounwind {
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entry:
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%p.addr = alloca i64*, align 8
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store i64* %p, i64** %p.addr, align 8
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%tmp = load i64** %p.addr, align 8
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call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
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; CHECK: t2:
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; CHECK-NOT: movl
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; CHECK: lock
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; CHECK-NEXT: orq $2147483644, (%rdi)
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%0 = call i64 @llvm.atomic.load.or.i64.p0i64(i64* %tmp, i64 2147483644)
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call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
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ret void
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}
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declare i64 @llvm.atomic.load.or.i64.p0i64(i64* nocapture, i64) nounwind
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declare i64 @llvm.atomic.load.or.i64.p0i64(i64* nocapture, i64) nounwind
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declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind
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declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind
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