forked from OSchip/llvm-project
Pull out the ppc incompatible features check into a separate function.
llvm-svn: 246467
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a894266d28
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@ -1226,8 +1226,35 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
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// __NO_FPRS__
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// __NO_FPRS__
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}
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}
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bool PPCTargetInfo::initFeatureMap(
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// Handle explicit options being passed to the compiler here: if we've
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llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
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// explicitly turned off vsx and turned on power8-vector or direct-move then
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// go ahead and error since the customer has expressed a somewhat incompatible
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// set of options.
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static bool ppcUserFeaturesCheck(DiagnosticsEngine &Diags,
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std::vector<std::string> &FeaturesVec) {
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if (std::find(FeaturesVec.begin(), FeaturesVec.end(), "-vsx") !=
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FeaturesVec.end()) {
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if (std::find(FeaturesVec.begin(), FeaturesVec.end(), "+power8-vector") !=
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FeaturesVec.end()) {
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Diags.Report(diag::err_opt_not_valid_with_opt) << "-mpower8-vector"
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<< "-mno-vsx";
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return false;
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}
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if (std::find(FeaturesVec.begin(), FeaturesVec.end(), "+direct-move") !=
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FeaturesVec.end()) {
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Diags.Report(diag::err_opt_not_valid_with_opt) << "-mdirect-move"
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<< "-mno-vsx";
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return false;
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}
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}
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return true;
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}
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bool PPCTargetInfo::initFeatureMap(llvm::StringMap<bool> &Features,
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DiagnosticsEngine &Diags, StringRef CPU,
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std::vector<std::string> &FeaturesVec) const {
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std::vector<std::string> &FeaturesVec) const {
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Features["altivec"] = llvm::StringSwitch<bool>(CPU)
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Features["altivec"] = llvm::StringSwitch<bool>(CPU)
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.Case("7400", true)
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.Case("7400", true)
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@ -1272,26 +1299,9 @@ bool PPCTargetInfo::initFeatureMap(
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.Case("pwr7", true)
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.Case("pwr7", true)
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.Default(false);
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.Default(false);
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// Handle explicit options being passed to the compiler here: if we've
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if (!ppcUserFeaturesCheck(Diags, FeaturesVec))
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// explicitly turned off vsx and turned on power8-vector or direct-move then
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// go ahead and error since the customer has expressed a somewhat incompatible
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// set of options.
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if (std::find(FeaturesVec.begin(), FeaturesVec.end(), "-vsx") !=
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FeaturesVec.end()) {
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if (std::find(FeaturesVec.begin(), FeaturesVec.end(), "+power8-vector") !=
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FeaturesVec.end()) {
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Diags.Report(diag::err_opt_not_valid_with_opt) << "-mpower8-vector"
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<< "-mno-vsx";
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return false;
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return false;
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}
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if (std::find(FeaturesVec.begin(), FeaturesVec.end(), "+direct-move") !=
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FeaturesVec.end()) {
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Diags.Report(diag::err_opt_not_valid_with_opt) << "-mdirect-move"
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<< "-mno-vsx";
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return false;
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}
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}
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return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
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return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
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}
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}
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@ -2492,7 +2502,6 @@ bool X86TargetInfo::initFeatureMap(
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llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
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llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
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std::vector<std::string> &FeaturesVec) const {
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std::vector<std::string> &FeaturesVec) const {
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// FIXME: This *really* should not be here.
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// FIXME: This *really* should not be here.
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// X86_64 always has SSE2.
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// X86_64 always has SSE2.
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if (getTriple().getArch() == llvm::Triple::x86_64)
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if (getTriple().getArch() == llvm::Triple::x86_64)
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setFeatureEnabledImpl(Features, "sse2", true);
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setFeatureEnabledImpl(Features, "sse2", true);
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