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Use the correct variable names so that the encodings will be correct. 

llvm-svn: 119403
This commit is contained in:
Bill Wendling 2010-11-16 23:44:49 +00:00
parent 4f29b49de1
commit a8974af320
2 changed files with 4 additions and 4 deletions
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4
llvm/lib/Target/ARM/ARMInstrInfo.td
View File

@ -1870,9 +1870,9 @@ def : MnemonicAlias<"stm", "stmia">;
let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1,
hasExtraDefRegAllocReq = 1, isCodeGenOnly = 1 in
def LDMIA_RET : AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p,
reglist:$dsts, variable_ops),
reglist:$regs, variable_ops),
IndexModeUpd, LdStMulFrm, IIC_iLoad_mBr,
"ldmia${p}\t$Rn!, $dsts",
"ldmia${p}\t$Rn!, $regs",
"$Rn = $wb", []> {
let Inst{24-23} = 0b01; // Increment After
let Inst{21} = 1; // Writeback

4
llvm/lib/Target/ARM/ARMInstrThumb2.td
View File

@ -2760,9 +2760,9 @@ let Defs =
let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1,
hasExtraDefRegAllocReq = 1, isCodeGenOnly = 1 in
def t2LDMIA_RET: T2XIt<(outs GPR:$wb), (ins GPR:$Rn, pred:$p,
reglist:$dsts, variable_ops),
reglist:$regs, variable_ops),
IIC_iLoad_mBr,
"ldmia${p}.w\t$Rn!, $dsts",
"ldmia${p}.w\t$Rn!, $regs",
"$Rn = $wb", []> {
bits<4> Rn;
bits<16> regs;