maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Replace dregsingle operand modifier with explicit escaped curly brackets. 

For other VLDn and VSTn operations, we need to list the multiple registers
explicitly anyway, so there's no point in special-casing this one usage.

llvm-svn: 78109
This commit is contained in:
Bob Wilson 2009-08-04 21:39:33 +00:00
parent 2b60721464
commit a8720101b5
2 changed files with 2 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
llvm/lib/Target/ARM/ARMInstrNEON.td
View File

@ -142,7 +142,7 @@ def VSTRQ : NI<(outs), (ins QPR:$src, GPR:$addr),
// VLD1 : Vector Load (multiple single elements)
class VLD1D<string OpcodeStr, ValueType Ty, Intrinsic IntOp>
: NLdSt<(outs DPR:$dst), (ins addrmode6:$addr),
!strconcat(OpcodeStr, "\t${dst:dregsingle}, $addr"),
!strconcat(OpcodeStr, "\t\\{$dst\\}, $addr"),
[(set DPR:$dst, (Ty (IntOp addrmode6:$addr)))]>;
class VLD1Q<string OpcodeStr, ValueType Ty, Intrinsic IntOp>
: NLdSt<(outs QPR:$dst), (ins addrmode6:$addr),
@ -164,7 +164,7 @@ def VLD1q64 : VLD1Q<"vld1.64", v2i64, int_arm_neon_vld1i>;
// VST1 : Vector Store (multiple single elements)
class VST1D<string OpcodeStr, ValueType Ty, Intrinsic IntOp>
: NLdSt<(outs), (ins addrmode6:$addr, DPR:$src),
!strconcat(OpcodeStr, "\t${src:dregsingle}, $addr"),
!strconcat(OpcodeStr, "\t\\{$src\\}, $addr"),
[(IntOp addrmode6:$addr, (Ty DPR:$src))]>;
class VST1Q<string OpcodeStr, ValueType Ty, Intrinsic IntOp>
: NLdSt<(outs), (ins addrmode6:$addr, QPR:$src),

2
llvm/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
View File

@ -348,8 +348,6 @@ void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
O << '{'
<< TRI->getAsmName(DRegLo) << ',' << TRI->getAsmName(DRegHi)
<< '}';
} else if (Modifier && strcmp(Modifier, "dregsingle") == 0) {
O << '{' << TRI->getAsmName(Reg) << '}';
} else {
O << TRI->getAsmName(Reg);
}