forked from OSchip/llvm-project
Moved and expanded convertOpcodeFromRegToImm() to conver more opcodes.
Code beautification for the rest of the code: changed layout to match the rest of the code base. llvm-svn: 6446
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Load Diff
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@ -8,6 +8,7 @@
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#define SPARC_INSTR_SELECTION_SUPPORT_h
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#include "llvm/DerivedTypes.h"
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#include "SparcInternals.h"
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inline MachineOpCode
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ChooseLoadInstruction(const Type *DestTy)
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@ -77,4 +78,82 @@ ChooseAddInstructionByType(const Type* resultType)
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return opCode;
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}
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static unsigned
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convertOpcodeFromRegToImm(unsigned Opcode) {
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switch (Opcode) {
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/* arithmetic */
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case V9::ADDr: return V9::ADDi;
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case V9::ADDccr: return V9::ADDcci;
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case V9::ADDCr: return V9::ADDCi;
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case V9::ADDCccr: return V9::ADDCcci;
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case V9::SUBr: return V9::SUBi;
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case V9::SUBccr: return V9::SUBcci;
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case V9::SUBCr: return V9::SUBCi;
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case V9::SUBCccr: return V9::SUBCcci;
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case V9::MULXr: return V9::MULXi;
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case V9::SDIVXr: return V9::SDIVXi;
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case V9::UDIVXr: return V9::UDIVXi;
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/* logical */
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case V9::ANDr: return V9::ANDi;
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case V9::ANDccr: return V9::ANDcci;
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case V9::ANDNr: return V9::ANDNi;
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case V9::ANDNccr: return V9::ANDNcci;
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case V9::ORr: return V9::ORi;
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case V9::ORccr: return V9::ORcci;
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case V9::ORNr: return V9::ORNi;
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case V9::ORNccr: return V9::ORNcci;
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case V9::XORr: return V9::XORi;
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case V9::XORccr: return V9::XORcci;
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case V9::XNORr: return V9::XNORi;
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case V9::XNORccr: return V9::XNORcci;
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/* shift */
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case V9::SLLr6: return V9::SLLi6;
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case V9::SRLr6: return V9::SRLi6;
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case V9::SRAr6: return V9::SRAi6;
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case V9::SLLXr6: return V9::SLLXi6;
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case V9::SRLXr6: return V9::SRLXi6;
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case V9::SRAXr6: return V9::SRAXi6;
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/* load */
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case V9::LDSBr: return V9::LDSBi;
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case V9::LDSHr: return V9::LDSHi;
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case V9::LDSWr: return V9::LDSWi;
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case V9::LDUBr: return V9::LDUBi;
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case V9::LDUHr: return V9::LDUHi;
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case V9::LDUWr: return V9::LDUWi;
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case V9::LDXr: return V9::LDXi;
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case V9::LDFr: return V9::LDFi;
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case V9::LDDFr: return V9::LDDFi;
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case V9::LDQFr: return V9::LDQFi;
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case V9::LDFSRr: return V9::LDFSRi;
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case V9::LDXFSRr: return V9::LDXFSRi;
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/* store */
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case V9::STBr: return V9::STBi;
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case V9::STHr: return V9::STHi;
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case V9::STWr: return V9::STWi;
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case V9::STXr: return V9::STXi;
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case V9::STFr: return V9::STFi;
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case V9::STDFr: return V9::STDFi;
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case V9::STFSRr: return V9::STFSRi;
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case V9::STXFSRr: return V9::STXFSRi;
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/* jump & return */
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case V9::JMPLCALLr: return V9::JMPLCALLi;
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case V9::JMPLRETr: return V9::JMPLRETi;
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case V9::RETURNr: return V9::RETURNi;
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/* save and restore */
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case V9::SAVEr: return V9::SAVEi;
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case V9::RESTOREr: return V9::RESTOREi;
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default:
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// It's already in correct format
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return Opcode;
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}
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}
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#endif
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