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When optimzing a mul by immediate into two, the resulting mul's should get a x86 specific node to avoid dag combiner from hacking on them further. 

llvm-svn: 68066
This commit is contained in:
Evan Cheng 2009-03-30 21:36:47 +00:00
parent 09f5be8146
commit a84a318873
5 changed files with 12 additions and 5 deletions
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1
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
View File

@ -852,6 +852,7 @@ bool X86DAGToDAGISel::MatchAddress(SDValue N, X86ISelAddressMode &AM,
if (N.getResNo() != 0) break;
// FALL THROUGH
case ISD::MUL:
case X86ISD::MUL_IMM:
// X*[3,5,9] -> X+X*[2,4,8]
if (AM.BaseType == X86ISelAddressMode::RegBase &&
AM.Base.Reg.getNode() == 0 &&

5
llvm/lib/Target/X86/X86ISelLowering.cpp
View File

@ -7176,6 +7176,7 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
case X86ISD::UMUL: return "X86ISD::UMUL";
case X86ISD::INC: return "X86ISD::INC";
case X86ISD::DEC: return "X86ISD::DEC";
case X86ISD::MUL_IMM: return "X86ISD::MUL_IMM";
}
}
@ -8458,14 +8459,14 @@ static SDValue PerformMulCombine(SDNode *N, SelectionDAG &DAG,
NewMul = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0),
DAG.getConstant(Log2_64(MulAmt1), MVT::i8));
else
NewMul = DAG.getNode(ISD::MUL, DL, VT, N->getOperand(0),
NewMul = DAG.getNode(X86ISD::MUL_IMM, DL, VT, N->getOperand(0),
DAG.getConstant(MulAmt1, VT));
if (isPowerOf2_64(MulAmt2))
NewMul = DAG.getNode(ISD::SHL, DL, VT, NewMul,
DAG.getConstant(Log2_64(MulAmt2), MVT::i8));
else
NewMul = DAG.getNode(ISD::MUL, DL, VT, NewMul,
NewMul = DAG.getNode(X86ISD::MUL_IMM, DL, VT, NewMul,
DAG.getConstant(MulAmt2, VT));
// Do not add new nodes to DAG combiner worklist.

5
llvm/lib/Target/X86/X86ISelLowering.h
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@ -237,7 +237,10 @@ namespace llvm {
// ADD, SUB, SMUL, UMUL, etc. - Arithmetic operations with FLAGS results.
ADD, SUB, SMUL, UMUL,
INC, DEC
INC, DEC,
// MUL_IMM - X86 specific multiply by immediate.
MUL_IMM
};
}

4
llvm/lib/Target/X86/X86Instr64bit.td
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@ -36,8 +36,8 @@ def lea64_32mem : Operand<i32> {
// Complex Pattern Definitions.
//
def lea64addr : ComplexPattern<i64, 4, "SelectLEAAddr",
[add, mul, shl, or, frameindex, X86Wrapper],
[]>;
[add, mul, X86mul_imm, shl, or, frameindex, X86Wrapper],
[]>;
//===----------------------------------------------------------------------===//
// Pattern fragments.

2
llvm/lib/Target/X86/X86InstrInfo.td
View File

@ -157,6 +157,8 @@ def X86umul_flag : SDNode<"X86ISD::UMUL", SDTUnaryArithWithFlags>;
def X86inc_flag : SDNode<"X86ISD::INC", SDTUnaryArithWithFlags>;
def X86dec_flag : SDNode<"X86ISD::DEC", SDTUnaryArithWithFlags>;
def X86mul_imm : SDNode<"X86ISD::MUL_IMM", SDTIntBinOp>;
//===----------------------------------------------------------------------===//
// X86 Operand Definitions.
//