[AMDGPU] Preliminary patch for divergence driven instruction selection. Fold immediate SMRD offset.

Differential revision: https://reviews.llvm.org/D51610

Reviewer: rampitec
llvm-svn: 341636
This commit is contained in:
Alexander Timofeev 2018-09-07 09:05:34 +00:00
parent 99124cc082
commit a805c96c65
2 changed files with 34 additions and 3 deletions

View File

@ -4063,9 +4063,17 @@ void SIInstrInfo::moveToVALU(MachineInstr &TopInst) const {
getNamedOperand(*Add, SrcNames[i]);
if (Src->isReg()) {
auto Mov = MRI.getUniqueVRegDef(Src->getReg());
if (Mov && Mov->getOpcode() == AMDGPU::S_MOV_B32)
Src = &Mov->getOperand(1);
MachineInstr *Def = MRI.getUniqueVRegDef(Src->getReg());
if (Def) {
if (Def->isMoveImmediate())
Src = &Def->getOperand(1);
else if (Def->isCopy()) {
auto Mov = MRI.getUniqueVRegDef(Def->getOperand(1).getReg());
if (Mov && Mov->isMoveImmediate()) {
Src = &Mov->getOperand(1);
}
}
}
}
if (Src) {

View File

@ -0,0 +1,23 @@
# RUN: llc -march=amdgcn -run-pass si-fix-sgpr-copies -o - %s | FileCheck -check-prefix=GCN %s
# GCN: BUFFER_LOAD_DWORD_OFFEN %{{[0-9]+}}, killed %{{[0-9]+}}, 0, 4095
---
name: smrd_vgpr_offset_imm
body: |
bb.0:
liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $vgpr0
%4:vgpr_32 = COPY $vgpr0
%3:sgpr_32 = COPY $sgpr3
%2:sgpr_32 = COPY $sgpr2
%1:sgpr_32 = COPY $sgpr1
%0:sgpr_32 = COPY $sgpr0
%5:sgpr_128 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %2, %subreg.sub2, %3, %subreg.sub3
%6:sreg_32_xm0 = S_MOV_B32 4095
%8:vgpr_32 = COPY %6
%7:vgpr_32 = V_ADD_I32_e32 %4, killed %8, implicit-def dead $vcc, implicit $exec
%10:sreg_32 = COPY %7
%9:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR killed %5, killed %10, 0
$vgpr0 = COPY %9
SI_RETURN_TO_EPILOG $vgpr0
...