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[AArch64][SVE] Asm: Add support for (mov|dup) of scalar 

Summary: This patch adds support for 'dup' (Scalar -> SVE) and its corresponding 'mov' alias.

Reviewers: fhahn, rengolin, evandro, echristo

Reviewed By: fhahn

Subscribers: aemerson, javed.absar, tschuett, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D41822

llvm-svn: 322172
This commit is contained in:
Sander de Smalen 2018-01-10 11:32:47 +00:00
parent e3591f3a17
commit a7ec090eaa
6 changed files with 187 additions and 0 deletions
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2
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
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@ -23,4 +23,6 @@ let Predicates = [HasSVE] in {
defm ZIP1_PPP : sve_int_perm_bin_perm_pp<0b000, "zip1">;
defm ZIP2_PPP : sve_int_perm_bin_perm_pp<0b001, "zip2">;
defm DUP_ZR : sve_int_perm_dup_r<"dup">;
}

35
llvm/lib/Target/AArch64/SVEInstrFormats.td
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@ -11,6 +11,41 @@
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// SVE Permute - Cross Lane Group
//===----------------------------------------------------------------------===//
class sve_int_perm_dup_r<bits<2> sz8_64, string asm, ZPRRegOp zprty,
RegisterClass srcRegType>
: I<(outs zprty:$Zd), (ins srcRegType:$Rn),
asm, "\t$Zd, $Rn",
"",
[]>, Sched<[]> {
bits<5> Rn;
bits<5> Zd;
let Inst{31-24} = 0b00000101;
let Inst{23-22} = sz8_64;
let Inst{21-10} = 0b100000001110;
let Inst{9-5} = Rn;
let Inst{4-0} = Zd;
}
multiclass sve_int_perm_dup_r<string asm> {
def _B : sve_int_perm_dup_r<0b00, asm, ZPR8, GPR32sp>;
def _H : sve_int_perm_dup_r<0b01, asm, ZPR16, GPR32sp>;
def _S : sve_int_perm_dup_r<0b10, asm, ZPR32, GPR32sp>;
def _D : sve_int_perm_dup_r<0b11, asm, ZPR64, GPR64sp>;
def : InstAlias<"mov $Zd, $Rn",
(!cast<Instruction>(NAME # _B) ZPR8:$Zd, GPR32sp:$Rn), 1>;
def : InstAlias<"mov $Zd, $Rn",
(!cast<Instruction>(NAME # _H) ZPR16:$Zd, GPR32sp:$Rn), 1>;
def : InstAlias<"mov $Zd, $Rn",
(!cast<Instruction>(NAME # _S) ZPR32:$Zd, GPR32sp:$Rn), 1>;
def : InstAlias<"mov $Zd, $Rn",
(!cast<Instruction>(NAME # _D) ZPR64:$Zd, GPR64sp:$Rn), 1>;
}
//===----------------------------------------------------------------------===//
// SVE Integer Arithmetic - Unpredicated Group.
//===----------------------------------------------------------------------===//

19
llvm/test/MC/AArch64/SVE/dup-diagnostics.s Normal file
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@ -0,0 +1,19 @@
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
// input should be a 64bit scalar register
dup z0.d, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: dup z0.d, w0
// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}:
// wzr is not a valid operand to dup
dup z0.s, wzr
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: dup z0.s, wzr
// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}:
// xzr is not a valid operand to dup
dup z0.d, xzr
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: dup z0.d, xzr
// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}:

56
llvm/test/MC/AArch64/SVE/dup.s Normal file
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@ -0,0 +1,56 @@
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
dup z0.b, w0
// CHECK-INST: mov z0.b, w0
// CHECK-ENCODING: [0x00,0x38,0x20,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 38 20 05 <unknown>
dup z0.h, w0
// CHECK-INST: mov z0.h, w0
// CHECK-ENCODING: [0x00,0x38,0x60,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 38 60 05 <unknown>
dup z0.s, w0
// CHECK-INST: mov z0.s, w0
// CHECK-ENCODING: [0x00,0x38,0xa0,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 38 a0 05 <unknown>
dup z0.d, x0
// CHECK-INST: mov z0.d, x0
// CHECK-ENCODING: [0x00,0x38,0xe0,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 38 e0 05 <unknown>
dup z31.h, wsp
// CHECK-INST: mov z31.h, wsp
// CHECK-ENCODING: [0xff,0x3b,0x60,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b 60 05 <unknown>
dup z31.s, wsp
// CHECK-INST: mov z31.s, wsp
// CHECK-ENCODING: [0xff,0x3b,0xa0,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b a0 05 <unknown>
dup z31.d, sp
// CHECK-INST: mov z31.d, sp
// CHECK-ENCODING: [0xff,0x3b,0xe0,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b e0 05 <unknown>
dup z31.b, wsp
// CHECK-INST: mov z31.b, wsp
// CHECK-ENCODING: [0xff,0x3b,0x20,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b 20 05 <unknown>

19
llvm/test/MC/AArch64/SVE/mov-diagnostics.s Normal file
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@ -0,0 +1,19 @@
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
// input should be a 64bit scalar register
mov z0.d, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: mov z0.d, w0
// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}:
// wzr is not a valid operand to mov
mov z0.s, wzr
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: mov z0.s, wzr
// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}:
// xzr is not a valid operand to mov
mov z0.d, xzr
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: mov z0.d, xzr
// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}:

56
llvm/test/MC/AArch64/SVE/mov.s Normal file
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@ -0,0 +1,56 @@
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
mov z0.b, w0
// CHECK-INST: mov z0.b, w0
// CHECK-ENCODING: [0x00,0x38,0x20,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 38 20 05 <unknown>
mov z0.h, w0
// CHECK-INST: mov z0.h, w0
// CHECK-ENCODING: [0x00,0x38,0x60,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 38 60 05 <unknown>
mov z0.s, w0
// CHECK-INST: mov z0.s, w0
// CHECK-ENCODING: [0x00,0x38,0xa0,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 38 a0 05 <unknown>
mov z0.d, x0
// CHECK-INST: mov z0.d, x0
// CHECK-ENCODING: [0x00,0x38,0xe0,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: 00 38 e0 05 <unknown>
mov z31.h, wsp
// CHECK-INST: mov z31.h, wsp
// CHECK-ENCODING: [0xff,0x3b,0x60,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b 60 05 <unknown>
mov z31.s, wsp
// CHECK-INST: mov z31.s, wsp
// CHECK-ENCODING: [0xff,0x3b,0xa0,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b a0 05 <unknown>
mov z31.d, sp
// CHECK-INST: mov z31.d, sp
// CHECK-ENCODING: [0xff,0x3b,0xe0,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b e0 05 <unknown>
mov z31.b, wsp
// CHECK-INST: mov z31.b, wsp
// CHECK-ENCODING: [0xff,0x3b,0x20,0x05]
// CHECK-ERROR: instruction requires: sve
// CHECK-UNKNOWN: ff 3b 20 05 <unknown>