forked from OSchip/llvm-project
[NFC][X86][AArch64] Add tests for sinking of add/sub by constant through add/sub
Looks we can transform all 8 variants of the pattern: https://rise4fun.com/Alive/auH This comes up as an issue on the path towards https://bugs.llvm.org/show_bug.cgi?id=41952 llvm-svn: 361303
This commit is contained in:
Roman Lebedev
parent
3af7cf58bb
commit
a7e88f8570
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64-unknown-unknown | FileCheck %s
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; Scalar tests. Trying to avoid LEA here, so the output is actually readable..
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define i32 @sink_add_of_const_to_add(i32 %a, i32 %b, i32 %c) {
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; CHECK-LABEL: sink_add_of_const_to_add:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: add w8, w8, w2
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; CHECK-NEXT: add w0, w8, #32 // =32
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; CHECK-NEXT: ret
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%t0 = add i32 %a, %b
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%t1 = add i32 %t0, 32
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%r = add i32 %t1, %c
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ret i32 %r
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}
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define i32 @sink_sub_of_const_to_add(i32 %a, i32 %b, i32 %c) {
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; CHECK-LABEL: sink_sub_of_const_to_add:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: add w8, w8, w2
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; CHECK-NEXT: sub w0, w8, #32 // =32
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; CHECK-NEXT: ret
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%t0 = add i32 %a, %b
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%t1 = sub i32 %t0, 32
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%r = add i32 %t1, %c
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ret i32 %r
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}
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define i32 @sink_add_of_const_to_sub(i32 %a, i32 %b, i32 %c) {
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; CHECK-LABEL: sink_add_of_const_to_sub:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: add w8, w8, #32 // =32
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; CHECK-NEXT: sub w0, w8, w2
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; CHECK-NEXT: ret
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%t0 = add i32 %a, %b
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%t1 = add i32 %t0, 32
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%r = sub i32 %t1, %c
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ret i32 %r
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}
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define i32 @sink_sub_of_const_to_sub2(i32 %a, i32 %b, i32 %c) {
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; CHECK-LABEL: sink_sub_of_const_to_sub2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: mov w9, #32
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; CHECK-NEXT: sub w8, w9, w8
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; CHECK-NEXT: add w0, w2, w8
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; CHECK-NEXT: ret
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%t0 = add i32 %a, %b
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%t1 = sub i32 %t0, 32
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%r = sub i32 %c, %t1
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ret i32 %r
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}
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define i32 @sink_add_of_const_to_sub2(i32 %a, i32 %b, i32 %c) {
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; CHECK-LABEL: sink_add_of_const_to_sub2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: add w8, w8, #32 // =32
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; CHECK-NEXT: sub w0, w2, w8
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; CHECK-NEXT: ret
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%t0 = add i32 %a, %b
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%t1 = add i32 %t0, 32
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%r = sub i32 %c, %t1
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ret i32 %r
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}
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define i32 @sink_sub_of_const_to_sub(i32 %a, i32 %b, i32 %c) {
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; CHECK-LABEL: sink_sub_of_const_to_sub:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: sub w8, w8, #32 // =32
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; CHECK-NEXT: sub w0, w8, w2
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; CHECK-NEXT: ret
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%t0 = add i32 %a, %b
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%t1 = sub i32 %t0, 32
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%r = sub i32 %t1, %c
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ret i32 %r
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}
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; Basic vector tests. Here it is easier to see where the constant operand is.
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define <4 x i32> @vec_sink_add_of_const_to_add(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
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; CHECK-LABEL: vec_sink_add_of_const_to_add:
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; CHECK: // %bb.0:
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; CHECK-NEXT: adrp x8, .LCPI6_0
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; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI6_0]
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; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: add v0.4s, v0.4s, v2.4s
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; CHECK-NEXT: add v0.4s, v0.4s, v3.4s
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; CHECK-NEXT: ret
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%t0 = add <4 x i32> %a, %b
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%t1 = add <4 x i32> %t0, <i32 31, i32 undef, i32 33, i32 66>
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%r = add <4 x i32> %t1, %c
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ret <4 x i32> %r
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}
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define <4 x i32> @vec_sink_sub_of_const_to_add(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
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; CHECK-LABEL: vec_sink_sub_of_const_to_add:
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; CHECK: // %bb.0:
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; CHECK-NEXT: adrp x8, .LCPI7_0
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; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI7_0]
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; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: sub v0.4s, v0.4s, v3.4s
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; CHECK-NEXT: add v0.4s, v0.4s, v2.4s
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; CHECK-NEXT: ret
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%t0 = add <4 x i32> %a, %b
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%t1 = sub <4 x i32> %t0, <i32 12, i32 undef, i32 44, i32 32>
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%r = add <4 x i32> %t1, %c
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ret <4 x i32> %r
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}
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define <4 x i32> @vec_sink_add_of_const_to_sub(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
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; CHECK-LABEL: vec_sink_add_of_const_to_sub:
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; CHECK: // %bb.0:
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; CHECK-NEXT: adrp x8, .LCPI8_0
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; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI8_0]
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; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: add v0.4s, v0.4s, v3.4s
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; CHECK-NEXT: sub v0.4s, v0.4s, v2.4s
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; CHECK-NEXT: ret
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%t0 = add <4 x i32> %a, %b
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%t1 = add <4 x i32> %t0, <i32 86, i32 undef, i32 65, i32 47>
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%r = sub <4 x i32> %t1, %c
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ret <4 x i32> %r
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}
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define <4 x i32> @vec_sink_sub_of_const_to_sub2(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
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; ALL-LABEL: vec_sink_sub_of_const_to_sub2:
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; ALL: # %bb.0:
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; ALL-NEXT: paddd %xmm1, %xmm0
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; ALL-NEXT: movdqa {{.*#+}} xmm1 = <93,u,45,81>
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; ALL-NEXT: psubd %xmm0, %xmm1
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; ALL-NEXT: paddd %xmm2, %xmm1
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; ALL-NEXT: movdqa %xmm1, %xmm0
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; ALL-NEXT: ret{{[l|q]}}
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; CHECK-LABEL: vec_sink_sub_of_const_to_sub2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: adrp x8, .LCPI9_0
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; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI9_0]
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; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: sub v0.4s, v3.4s, v0.4s
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; CHECK-NEXT: add v0.4s, v2.4s, v0.4s
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; CHECK-NEXT: ret
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%t0 = add <4 x i32> %a, %b
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%t1 = sub <4 x i32> %t0, <i32 93, i32 undef, i32 45, i32 81>
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%r = sub <4 x i32> %c, %t1
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ret <4 x i32> %r
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}
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define <4 x i32> @vec_sink_add_of_const_to_sub2(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
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; CHECK-LABEL: vec_sink_add_of_const_to_sub2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: adrp x8, .LCPI10_0
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; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI10_0]
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; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: add v0.4s, v0.4s, v3.4s
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; CHECK-NEXT: sub v0.4s, v2.4s, v0.4s
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; CHECK-NEXT: ret
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%t0 = add <4 x i32> %a, %b
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%t1 = add <4 x i32> %t0, <i32 51, i32 undef, i32 61, i32 92>
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%r = sub <4 x i32> %c, %t1
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ret <4 x i32> %r
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}
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define <4 x i32> @vec_sink_sub_of_const_to_sub(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
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; CHECK-LABEL: vec_sink_sub_of_const_to_sub:
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; CHECK: // %bb.0:
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; CHECK-NEXT: adrp x8, .LCPI11_0
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; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI11_0]
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; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: sub v0.4s, v0.4s, v3.4s
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; CHECK-NEXT: sub v0.4s, v0.4s, v2.4s
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; CHECK-NEXT: ret
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%t0 = add <4 x i32> %a, %b
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%t1 = sub <4 x i32> %t0, <i32 49, i32 undef, i32 45, i32 21>
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%r = sub <4 x i32> %t1, %c
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ret <4 x i32> %r
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}
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@ -0,0 +1,258 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+slow-lea,+slow-3ops-lea,+sse,+sse2 | FileCheck %s --check-prefixes=ALL,X32
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+slow-lea,+slow-3ops-lea,+sse,+sse2 | FileCheck %s --check-prefixes=ALL,X64
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; Scalar tests. Trying to avoid LEA here, so the output is actually readable..
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define i32 @sink_add_of_const_to_add(i32 %a, i32 %b, i32 %c) {
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; X32-LABEL: sink_add_of_const_to_add:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: addl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: addl %ecx, %eax
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; X32-NEXT: addl $32, %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: sink_add_of_const_to_add:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $edx killed $edx def $rdx
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: addl %esi, %edi
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; X64-NEXT: leal 32(%rdx,%rdi), %eax
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; X64-NEXT: retq
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%t0 = add i32 %a, %b
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%t1 = add i32 %t0, 32
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%r = add i32 %t1, %c
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ret i32 %r
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}
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define i32 @sink_sub_of_const_to_add(i32 %a, i32 %b, i32 %c) {
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; X32-LABEL: sink_sub_of_const_to_add:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: addl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: addl %ecx, %eax
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; X32-NEXT: addl $-32, %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: sink_sub_of_const_to_add:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $edx killed $edx def $rdx
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: addl %esi, %edi
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; X64-NEXT: leal -32(%rdx,%rdi), %eax
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; X64-NEXT: retq
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%t0 = add i32 %a, %b
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%t1 = sub i32 %t0, 32
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%r = add i32 %t1, %c
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ret i32 %r
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}
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define i32 @sink_add_of_const_to_sub(i32 %a, i32 %b, i32 %c) {
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; X32-LABEL: sink_add_of_const_to_sub:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: addl %ecx, %eax
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; X32-NEXT: addl $32, %eax
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; X32-NEXT: subl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: sink_add_of_const_to_sub:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $esi killed $esi def $rsi
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: leal 32(%rdi,%rsi), %eax
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; X64-NEXT: subl %edx, %eax
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; X64-NEXT: retq
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%t0 = add i32 %a, %b
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%t1 = add i32 %t0, 32
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%r = sub i32 %t1, %c
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ret i32 %r
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}
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define i32 @sink_sub_of_const_to_sub2(i32 %a, i32 %b, i32 %c) {
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; X32-LABEL: sink_sub_of_const_to_sub2:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: addl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl $32, %eax
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; X32-NEXT: subl %ecx, %eax
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; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: sink_sub_of_const_to_sub2:
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; X64: # %bb.0:
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; X64-NEXT: addl %esi, %edi
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; X64-NEXT: movl $32, %eax
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; X64-NEXT: subl %edi, %eax
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; X64-NEXT: addl %edx, %eax
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; X64-NEXT: retq
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%t0 = add i32 %a, %b
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%t1 = sub i32 %t0, 32
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%r = sub i32 %c, %t1
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ret i32 %r
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}
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define i32 @sink_add_of_const_to_sub2(i32 %a, i32 %b, i32 %c) {
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; X32-LABEL: sink_add_of_const_to_sub2:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X32-NEXT: addl %edx, %ecx
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; X32-NEXT: addl $32, %ecx
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; X32-NEXT: subl %ecx, %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: sink_add_of_const_to_sub2:
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; X64: # %bb.0:
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; X64-NEXT: movl %edx, %eax
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; X64-NEXT: # kill: def $esi killed $esi def $rsi
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: leal 32(%rdi,%rsi), %ecx
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; X64-NEXT: subl %ecx, %eax
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; X64-NEXT: retq
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%t0 = add i32 %a, %b
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%t1 = add i32 %t0, 32
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%r = sub i32 %c, %t1
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ret i32 %r
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}
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define i32 @sink_sub_of_const_to_sub(i32 %a, i32 %b, i32 %c) {
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; X32-LABEL: sink_sub_of_const_to_sub:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: addl %ecx, %eax
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; X32-NEXT: addl $-32, %eax
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; X32-NEXT: subl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: sink_sub_of_const_to_sub:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $esi killed $esi def $rsi
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: leal -32(%rdi,%rsi), %eax
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; X64-NEXT: subl %edx, %eax
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; X64-NEXT: retq
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%t0 = add i32 %a, %b
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%t1 = sub i32 %t0, 32
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%r = sub i32 %t1, %c
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ret i32 %r
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}
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; Basic vector tests. Here it is easier to see where the constant operand is.
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define <4 x i32> @vec_sink_add_of_const_to_add(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
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; X32-LABEL: vec_sink_add_of_const_to_add:
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; X32: # %bb.0:
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; X32-NEXT: paddd %xmm2, %xmm1
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; X32-NEXT: paddd %xmm1, %xmm0
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; X32-NEXT: paddd {{\.LCPI.*}}, %xmm0
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; X32-NEXT: retl
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;
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; X64-LABEL: vec_sink_add_of_const_to_add:
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; X64: # %bb.0:
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; X64-NEXT: paddd %xmm2, %xmm1
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; X64-NEXT: paddd %xmm1, %xmm0
|
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; X64-NEXT: paddd {{.*}}(%rip), %xmm0
|
||||
; X64-NEXT: retq
|
||||
%t0 = add <4 x i32> %a, %b
|
||||
%t1 = add <4 x i32> %t0, <i32 31, i32 undef, i32 33, i32 66>
|
||||
%r = add <4 x i32> %t1, %c
|
||||
ret <4 x i32> %r
|
||||
}
|
||||
define <4 x i32> @vec_sink_sub_of_const_to_add(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
|
||||
; X32-LABEL: vec_sink_sub_of_const_to_add:
|
||||
; X32: # %bb.0:
|
||||
; X32-NEXT: paddd %xmm1, %xmm0
|
||||
; X32-NEXT: psubd {{\.LCPI.*}}, %xmm0
|
||||
; X32-NEXT: paddd %xmm2, %xmm0
|
||||
; X32-NEXT: retl
|
||||
;
|
||||
; X64-LABEL: vec_sink_sub_of_const_to_add:
|
||||
; X64: # %bb.0:
|
||||
; X64-NEXT: paddd %xmm1, %xmm0
|
||||
; X64-NEXT: psubd {{.*}}(%rip), %xmm0
|
||||
; X64-NEXT: paddd %xmm2, %xmm0
|
||||
; X64-NEXT: retq
|
||||
%t0 = add <4 x i32> %a, %b
|
||||
%t1 = sub <4 x i32> %t0, <i32 12, i32 undef, i32 44, i32 32>
|
||||
%r = add <4 x i32> %t1, %c
|
||||
ret <4 x i32> %r
|
||||
}
|
||||
|
||||
define <4 x i32> @vec_sink_add_of_const_to_sub(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
|
||||
; X32-LABEL: vec_sink_add_of_const_to_sub:
|
||||
; X32: # %bb.0:
|
||||
; X32-NEXT: paddd %xmm1, %xmm0
|
||||
; X32-NEXT: paddd {{\.LCPI.*}}, %xmm0
|
||||
; X32-NEXT: psubd %xmm2, %xmm0
|
||||
; X32-NEXT: retl
|
||||
;
|
||||
; X64-LABEL: vec_sink_add_of_const_to_sub:
|
||||
; X64: # %bb.0:
|
||||
; X64-NEXT: paddd %xmm1, %xmm0
|
||||
; X64-NEXT: paddd {{.*}}(%rip), %xmm0
|
||||
; X64-NEXT: psubd %xmm2, %xmm0
|
||||
; X64-NEXT: retq
|
||||
%t0 = add <4 x i32> %a, %b
|
||||
%t1 = add <4 x i32> %t0, <i32 86, i32 undef, i32 65, i32 47>
|
||||
%r = sub <4 x i32> %t1, %c
|
||||
ret <4 x i32> %r
|
||||
}
|
||||
define <4 x i32> @vec_sink_sub_of_const_to_sub2(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
|
||||
; ALL-LABEL: vec_sink_sub_of_const_to_sub2:
|
||||
; ALL: # %bb.0:
|
||||
; ALL-NEXT: paddd %xmm1, %xmm0
|
||||
; ALL-NEXT: movdqa {{.*#+}} xmm1 = <93,u,45,81>
|
||||
; ALL-NEXT: psubd %xmm0, %xmm1
|
||||
; ALL-NEXT: paddd %xmm2, %xmm1
|
||||
; ALL-NEXT: movdqa %xmm1, %xmm0
|
||||
; ALL-NEXT: ret{{[l|q]}}
|
||||
%t0 = add <4 x i32> %a, %b
|
||||
%t1 = sub <4 x i32> %t0, <i32 93, i32 undef, i32 45, i32 81>
|
||||
%r = sub <4 x i32> %c, %t1
|
||||
ret <4 x i32> %r
|
||||
}
|
||||
|
||||
define <4 x i32> @vec_sink_add_of_const_to_sub2(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
|
||||
; X32-LABEL: vec_sink_add_of_const_to_sub2:
|
||||
; X32: # %bb.0:
|
||||
; X32-NEXT: paddd %xmm1, %xmm0
|
||||
; X32-NEXT: paddd {{\.LCPI.*}}, %xmm0
|
||||
; X32-NEXT: psubd %xmm0, %xmm2
|
||||
; X32-NEXT: movdqa %xmm2, %xmm0
|
||||
; X32-NEXT: retl
|
||||
;
|
||||
; X64-LABEL: vec_sink_add_of_const_to_sub2:
|
||||
; X64: # %bb.0:
|
||||
; X64-NEXT: paddd %xmm1, %xmm0
|
||||
; X64-NEXT: paddd {{.*}}(%rip), %xmm0
|
||||
; X64-NEXT: psubd %xmm0, %xmm2
|
||||
; X64-NEXT: movdqa %xmm2, %xmm0
|
||||
; X64-NEXT: retq
|
||||
%t0 = add <4 x i32> %a, %b
|
||||
%t1 = add <4 x i32> %t0, <i32 51, i32 undef, i32 61, i32 92>
|
||||
%r = sub <4 x i32> %c, %t1
|
||||
ret <4 x i32> %r
|
||||
}
|
||||
define <4 x i32> @vec_sink_sub_of_const_to_sub(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
|
||||
; X32-LABEL: vec_sink_sub_of_const_to_sub:
|
||||
; X32: # %bb.0:
|
||||
; X32-NEXT: paddd %xmm1, %xmm0
|
||||
; X32-NEXT: psubd {{\.LCPI.*}}, %xmm0
|
||||
; X32-NEXT: psubd %xmm2, %xmm0
|
||||
; X32-NEXT: retl
|
||||
;
|
||||
; X64-LABEL: vec_sink_sub_of_const_to_sub:
|
||||
; X64: # %bb.0:
|
||||
; X64-NEXT: paddd %xmm1, %xmm0
|
||||
; X64-NEXT: psubd {{.*}}(%rip), %xmm0
|
||||
; X64-NEXT: psubd %xmm2, %xmm0
|
||||
; X64-NEXT: retq
|
||||
%t0 = add <4 x i32> %a, %b
|
||||
%t1 = sub <4 x i32> %t0, <i32 49, i32 undef, i32 45, i32 21>
|
||||
%r = sub <4 x i32> %t1, %c
|
||||
ret <4 x i32> %r
|
||||
}
|
||||
Loading…
Reference in New Issue