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GlobalISel: Fix IRTranslator for constantexpr selects 

This was assuming a select is always an instruction, which is not
true.
This commit is contained in:
Matt Arsenault 2020-05-19 08:59:16 -04:00
parent 500479dba3
commit a7759d1785
2 changed files with 41 additions and 3 deletions
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7
llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
View File

@ -1008,10 +1008,11 @@ bool IRTranslator::translateSelect(const User &U,
ArrayRef<Register> Op0Regs = getOrCreateVRegs(*U.getOperand(1));
ArrayRef<Register> Op1Regs = getOrCreateVRegs(*U.getOperand(2));
const SelectInst &SI = cast<SelectInst>(U);
uint16_t Flags = 0;
if (const CmpInst *Cmp = dyn_cast<CmpInst>(SI.getCondition()))
Flags = MachineInstr::copyFlagsFromInstruction(*Cmp);
if (const SelectInst *SI = dyn_cast<SelectInst>(&U)) {
if (const CmpInst *Cmp = dyn_cast<CmpInst>(SI->getCondition()))
Flags = MachineInstr::copyFlagsFromInstruction(*Cmp);
}
for (unsigned i = 0; i < ResRegs.size(); ++i) {
MIRBuilder.buildSelect(ResRegs[i], Tst, Op0Regs[i], Op1Regs[i], Flags);

37
llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll
View File

@ -22,3 +22,40 @@ define i32 @test() {
; CHECK: S_SETPC_B64_return [[COPY5]], implicit $vgpr0
ret i32 bitcast (<1 x i32> <i32 extractelement (<1 x i32> bitcast (i32 zext (i1 icmp eq (i32* @var, i32* inttoptr (i32 -1 to i32*)) to i32) to <1 x i32>), i64 0)> to i32)
}
@gint = external addrspace(1) global i8, align 4
; Technically we should be able to fold away the compare to true, but
; currently constexpr doesn't understand null in non-0 address spaces.
define amdgpu_kernel void @constantexpr_select_0() {
; CHECK-LABEL: name: constantexpr_select_0
; CHECK: bb.1 (%ir-block.0):
; CHECK: [[GV:%[0-9]+]]:_(p1) = G_GLOBAL_VALUE @gint
; CHECK: [[C:%[0-9]+]]:_(p1) = G_CONSTANT i64 0
; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[GV]](p1), [[C]]
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s1), [[C1]], [[C2]]
; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
; CHECK: G_STORE [[SELECT]](s32), [[DEF]](p1) :: (store 4 into `i32 addrspace(1)* undef`, addrspace 1)
; CHECK: S_ENDPGM 0
store i32 select (i1 icmp eq (i8 addrspace(1)* @gint, i8 addrspace(1)* null), i32 1, i32 0), i32 addrspace(1)* undef, align 4
ret void
}
define amdgpu_kernel void @constantexpr_select_1() {
; CHECK-LABEL: name: constantexpr_select_1
; CHECK: bb.1 (%ir-block.0):
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1024
; CHECK: [[INTTOPTR:%[0-9]+]]:_(p1) = G_INTTOPTR [[C]](s64)
; CHECK: [[GV:%[0-9]+]]:_(p1) = G_GLOBAL_VALUE @gint
; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[INTTOPTR]](p1), [[GV]]
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s1), [[C1]], [[C2]]
; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
; CHECK: G_STORE [[SELECT]](s32), [[DEF]](p1) :: (store 4 into `i32 addrspace(1)* undef`, addrspace 1)
; CHECK: S_ENDPGM 0
store i32 select (i1 icmp eq (i8 addrspace(1)* @gint, i8 addrspace(1)* inttoptr (i64 1024 to i8 addrspace(1)*)), i32 1, i32 0), i32 addrspace(1)* undef, align 4
ret void
}