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[WebAssembly] Fix inline asm support for i64 operands. 

llvm-svn: 254106
This commit is contained in:
Dan Gohman 2015-11-25 22:28:50 +00:00
parent 77b7779b48
commit a774d719a0
2 changed files with 18 additions and 1 deletions
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6
llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
View File

@ -220,7 +220,11 @@ WebAssemblyTargetLowering::getRegForInlineAsmConstraint(
if (Constraint.size() == 1) {
switch (Constraint[0]) {
case 'r':
return std::make_pair(0U, &WebAssembly::I32RegClass);
if (VT == MVT::i32)
return std::make_pair(0U, &WebAssembly::I32RegClass);
if (VT == MVT::i64)
return std::make_pair(0U, &WebAssembly::I64RegClass);
break;
default:
break;
}

13
llvm/test/CodeGen/WebAssembly/inline-asm.ll
View File

@ -43,6 +43,19 @@ entry:
ret i32 %0
}
; CHECK-LABEL: foo_i64:
; CHECK-NEXT: .param i64{{$}}
; CHECK-NEXT: .result i64{{$}}
; CHECK-NEXT: #APP{{$}}
; CHECK-NEXT: # $0 = aaa($0){{$}}
; CHECK-NEXT: #NO_APP{{$}}
; CHECK-NEXT: return $0{{$}}
define i64 @foo_i64(i64 %r) {
entry:
%0 = tail call i64 asm sideeffect "# $0 = aaa($1)", "=r,r"(i64 %r) #0, !srcloc !0
ret i64 %0
}
attributes #0 = { nounwind }
!0 = !{i32 47}