From a73a0cfaf4df392aaf42ca0f16732581035d7966 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Wed, 27 Jan 2016 16:51:57 +0000 Subject: [PATCH] [X86][SSE] Test insertps instrinsic calls with masks that can't combine to something simpler For these basic tests of the intrinsic, make sure the mask can't simplify to movss, blend-with-zero or something else llvm-svn: 258941 --- llvm/test/CodeGen/X86/avx-intrinsics-x86.ll | 6 +++--- llvm/test/CodeGen/X86/sse41.ll | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll b/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll index 206be2396cba..771039bac17e 100644 --- a/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll +++ b/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll @@ -1111,9 +1111,9 @@ declare <4 x float> @llvm.x86.sse41.dpps(<4 x float>, <4 x float>, i8) nounwind define <4 x float> @test_x86_sse41_insertps(<4 x float> %a0, <4 x float> %a1) { ; CHECK-LABEL: test_x86_sse41_insertps: ; CHECK: ## BB#0: -; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[3] +; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm1[0],zero,xmm0[3] ; CHECK-NEXT: retl - %res = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a0, <4 x float> %a1, i8 7) ; <<4 x float>> [#uses=1] + %res = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a0, <4 x float> %a1, i8 21) ; <<4 x float>> [#uses=1] ret <4 x float> %res } declare <4 x float> @llvm.x86.sse41.insertps(<4 x float>, <4 x float>, i8) nounwind readnone @@ -2992,7 +2992,7 @@ declare <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double>, <4 x i64>) no define <4 x double> @test_x86_avx_vpermilvar_pd_256_2(<4 x double> %a0) { ; CHECK-LABEL: test_x86_avx_vpermilvar_pd_256_2: ; CHECK: ## BB#0: -; CHECK-NEXT: vpermilpd {{.*}}, %ymm0, %ymm0 ## ymm0 = ymm0[1,0,2,3] +; CHECK-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,2,3] ; CHECK-NEXT: retl %res = call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %a0, <4 x i64> ) ; <<4 x double>> [#uses=1] ret <4 x double> %res diff --git a/llvm/test/CodeGen/X86/sse41.ll b/llvm/test/CodeGen/X86/sse41.ll index 16e43f26b67c..03538fea7c4c 100644 --- a/llvm/test/CodeGen/X86/sse41.ll +++ b/llvm/test/CodeGen/X86/sse41.ll @@ -141,14 +141,14 @@ define i32 @ext_3(<4 x i32> %v) nounwind { define <4 x float> @insertps_1(<4 x float> %t1, <4 x float> %t2) nounwind { ; X32-LABEL: insertps_1: ; X32: ## BB#0: -; X32-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[1,2,3] +; X32-NEXT: insertps {{.*#+}} xmm0 = zero,xmm1[0],zero,xmm0[3] ; X32-NEXT: retl ; ; X64-LABEL: insertps_1: ; X64: ## BB#0: -; X64-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[1,2,3] +; X64-NEXT: insertps {{.*#+}} xmm0 = zero,xmm1[0],zero,xmm0[3] ; X64-NEXT: retq - %tmp1 = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %t1, <4 x float> %t2, i32 1) nounwind readnone + %tmp1 = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %t1, <4 x float> %t2, i32 21) nounwind readnone ret <4 x float> %tmp1 }